FPGA in outer space seminar report

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  • Page 1 JSS ACADEMY OF TECHNICAL EDUCATION AND MANAGEMENT NOIDA Seminar Report On FPGA IN OUTER SPACE Submitted by RAHUL KUMAR VERMA 1009131069 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING 2012-2013
  • Page 2 ABSTRACT A quiet revolution is taking place. Over the past few years, the density of the average programmable logic device has begun to skyrocket. The maximum number of gates in an FPGA is currently around 500,000 and doubling every 18 months. Meanwhile, the price of these chips is dropping. What all of this means is that the price of an individual NAND or NOR is rapidly approaching zero! And the designers of embedded systems are taking note. The line between hardware and software has blurred. Hardware engineers create the bulk of their new digital circuitry in programming languages such as VHDL and Verilog and often target it to CPLDs and FPGAs. As this trend continues, it becomes more difficult to separate hardware from software. After all, both hardware and software designers are now describing logic in high-level terms, albeit in different languages, and downloading the compiled result to a piece of silicon. Surely no one would claim that language choice alone marks a real distinction between the two fields.
  • Page 3 ACKNOWLEDGEMENT I owe my sincere gratitude to my supervisor, Mrs. Suvarna N.A. (Assistant professor, < Department of ELECTRONICS AND COMMUNICATION>, JSSATE-NOIDA) who has constantly given me the encouragement, technical guidance and moral support throughout my thesis work. I would like to extend my heartfelt thanks and lifelong indebtedness to Prof.Dinesh Chandra (HOD, Department of EC, JSSATE-NOIDA) for his technical and moral support. RAHULKUMARVERMA 1009131069
  • Page 4 EC-2 [B2] TABLE OF CONTENTS 1.INTRODUCTION TO FPGA..6 1.1.Field Programmable GateArray...7 1.2. HistoryOfFPGA ...............................................................8 1.3. Inventors......9 2. Architecture and working.10 2.1. Architecture.10-12 2.2. Previous generation logic device..13 2.2.1. ASICs..14 3.Feature AndCharacterstics....15 4.FPGA design and programming....16 4.1.Hardware description language.....16
  • Page 5 4.2. High level language..17 5.Modern Development Of FPGA...17 5.1.The Xilinx Virtex-6 FPGA family...18 6.FPGA in Comparison To Other logic Devices.....19 7.Applications.....20 7.1.Outer Space Application..20-21 7.2.FGPA-Based Development ...22 for Defenseand AerospaceApplications 7.2.1FPGA-Based COTS Boards...22 7.2.2 The FPGA Developers Kit......23 8.Future Scope Of FPGA Technology.24 9.Major manufacturers.......25
  • Page 6 10. CONCLUSION...26 11. REFERENCES...27 1. INTRODUCTION TO FPGA FPGA stands for Field Programmable Gate Array. An FPGA is an integrated circuit (IC) that can be programmed and configured by the embedded system developer in the field after it has been manufactured. FPGA is a semi-conductor device which is not limited to any pre-defined hardware function; it is rather highly flexible in its functionality and may be configured by the embedded system developer according to his design requirements. FPGAs use pre-built logic blocks and programmable routing channels for implementing custom hardware functionality depending upon how embedded system developer configure these devices. The FPGAs are programmed and configured using hardware description languages (HDL) like Verilog and VHDL, similar to that used for an application-specific integrated circuit (ASIC). FPGAs give a lot of flexibility to the embedded systems developer to program features and functions of their FPGA based product even after the FPGA based product has been installed in the field. This is the reason why FPGA is termed field programmable, as FPGA may easily be reconfigured and reprogrammed in the
  • Page 7 field according to new features and end-users requirements. FPGAs are being widely used in digital electronic circuits and embedded systems design and FPGAs have a well-defined place in every embedded system developers toolbox. FPGAs may be used to implement any logical functions and features that an Application-Specific Integrated Circuit (ASIC) could possibly be utilized to implement. But in terms of flexibility of upgrading and modifying the functionality and features of FPGAs, even after the FPGA based product has been shipped to the end-user, FPGAs really have an edge over ASIC. . 1.1. Field Programmable Gate Array Field Programmable Gate Array Field : in the field Programmable : Re-Configurable Change Logic Functions Gate Array : reference to ASIC internal architecture A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturinghence "field- programmable". The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Contemporary FPGAs have large resources of logic gates and RAM blocks to implement complex digital computations. As FPGA designs employ very fast IOs and bidirectional data buses it becomes a challenge to verify correct timing of valid data within setup time and hold time.
  • Page 8 Floor planning enables resources allocation within FPGA to meet these time constraints. FPGAs can be used to implement any logical function that an ASIC could perform. The ability to update the functionality after shipping, partial re-configuration of a portion of the design and the low non-recurring engineering costs relative to an ASIC, offer advantages for many applications. FPGAs contain programmable logic components called "logic blocks", and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together"somewhat like many (changeable) logic gates that can be inter-wired in (many) different configurations. Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory. 1.2. History OfFPGA The FPGA industry sprouted from programmable read-only memory (PROM) and programmable logic devices (PLDs). PROMs and PLDs both had the option of being programmed in batches in a factory or in the field (field programmable), however programmable logic was hard-wired between logic gates. In the late 1980s the Naval Surface Warfare Department funded an experiment proposed by Steve Casselmanto develop a computer that would implement 600,000 reprogrammable gates. Casselman was successful and a patent related to the system was issued in 1992. Xilinx co-founders Ross Freeman and Bernard Vonderschmitt invented the first commercially viable fielprogrammable gate array in 1985 the XC2064.[10] The XC2064 had programmable gates and programmable interconnects between gates, the beginnings of a new technology and market. The XC2064 boasted a mere 64 configurable logic blocks (CLBs), with two 3- input lookup tables (LUTs).
  • Page 9 More than 20 years later, Freeman was entered into the National Inventors Hall of Fame for his invention Xilinx continued unchallenged and quickly growing from 1985 to the mid-1990s. The 1990s were an explosive period of time for FPGAs, both in sophistication and the volume of production. In the early 1990s, FPGAs were primarily used in telecommunications and networking. 1.3. Inventors
  • Page 10 Ross Freeman and Bernard Vonderschmitt They invented the first commercially viable field programmable gate array in 1985 2. Architecture and working The most common FPGA architecture consists of an array of logic blocks (called Configurable Logic Block) CLB, or Logic Array Block, LAB, depending on vendor), I/O pads, and routing channels. Generally, all therouting channels have the same width (number of wires). Multiple I/O pads may fit into the height of one row or the width of one column in the array. An application circuit must be mapped into an FPGA with adequate resources. While the number of CLBs/LABs and I/Os required is easily determined from the design, the number of routing tracks needed may vary considerably even among designs with the same amount of logic. For example, a crossbar switch requires much more routing than a systolic array with the same gate count. Since unused routing tracks increase the costof the part without providing any benefit, FPGA manufacturers try to provide just enough tracks so that most designs that will fit in terms of Lookup tables (LUTs) and IOs
  • Page 11 can be routed.This is determined by estimates such as those derived from Rent's rule or by experiments with existing designs. 2.1 Architecture CLB: The Configurable logic blocks are were the user specific functions are calculated. IOB: The Input/Output block make it possible to connect the FPGA to the other elements of the application Interconnect: Interconnect is essential for writing between CLB and from IOBs to CLBs. It is composed of a lookup table (LUT) controlled by 4 inputs to implement combinational logic and a D-Flip-Flop for sequential logic. A MUX is used to select between using the output of the combinational logic directly and using the output of the Flip-Flop. One CLB is programmed by downloading the truth table of the logical