CFD Cooling Study

D. Blanchet3B Associates05/04/07

Use a module that we know something aboutCooling design scenario “what-if” Air Flow thru core design – prompted by a recent customer inquiry

6U FPGA design 105 watts total 25 W, FPGA’s , 2 nodes 12CFM @ 40C – 10K ft , commercial

Change the design to keep (dirty) cooling air from touching the components

Possible scenario for platforms that would normally have conduction cooled modules?

Assume standard VME , 0.8 “ pitch

Model a sealed air core sink

FPGA

XBAR

QDRSRAM(back)

RLDRAM(front)

6U - VME , 0.8” pitch

0.25” finned core(aluminum)

12 CFM

pwb

FPGA

XBAR

QDRSRAM(back)

RLDRAM(front)

314,000 cells

FPGA

XBAR

QDRSRAM(back)

RLDRAM(front)

SequentialSolution

FlowThen

Heat transfer

Device Power(w) Tjmax Tj simulated

FPGA 25 85 (comm)100 (ind)

88

QDRSRAM(backside)

1.5 125 136

RLDRAM 1.8 110 86

XBAR 1 125 76

Air flow thru design provides adequate cooling for primary side industrial components – similar to the standard air cooled design at low air flow rates (12 CFM ).

Back side components exceed recommended operating temperatures – the heat conduction path through the pwb is inadequate with the current board design restrictions

Module to chassis air sealing interfaces become a design challenge

Matching of component heights to air core cold plate without requiring excessive thickness of TIM materials….?