AGING-AWARE COMPILER-DIRECTED VLIW

ASSIGNMENT FOR GPGPU ARCHITECTURES

Rajiv Kumar V13M510M.Tech CSE-13 NITH

DOES YOUR PROCESSOR AGE?

• DOES AGEING AFFECT THE PERFORMANCE?

• ARE THERE ANY EFFECTS OF AGING?

• DOES HARDWARE AGE UNIFORMLY?

A FEW TERMS

• VLIW (VERY LONG INSTRUCTION WORD)

• GPGPU (GENERAL PURPOSE GRAPHICAL

PROCESSING UNIT)

• OCAS (ON-CHIP AGING SENSOR)

• BTI (BIAS TEMPERATURE INSTABILITY)

NBTI (NEGATIVE BIAS TEMPERATURE INSTABILITY)

• OCCURS WHEN A PMOS IS NEGATIVELY BIASED

• MANIFESTS AS AN INCREASE OF THRESHOLD

VOLTAGE

• ACCELERATED BY TEMPERATURE

• LOGARITHMIC FUNCTION OF STRESS TIME

• DISTRIBUTED NON-UNIFORMLY

NBTI EXPLAINED

• DISSOCIATION OF SI−H BONDS ALONG SILICON

OXIDE INTERFACE

• GENERATION OF INTERFACE TRAPS

• THRESHOLD VOLTAGE INCREASES AS MORE TRAPS

FORM

• REDUCES THE DRIVE CURRENT

• AGING CAN BE RECOVERED PARTIALLY

• INTERFACE TRAPS CAN BE REDUCED BY ANNEALING

EFFECTS

• AGING OVER TIME

• VARIABILITY ACROSS MANUFACTURED PARTS

• IMPACTS LIFETIME UNCERTAINTY

• UNBALANCING

• SENSITIVE IN ANALOG BLOCKS E.G. DFT

EFFECTS: REAL OR NOT?

• ESTIMATED THRESHOLD INCREASE OF 5-15% PER

YEAR

• IMPACT ON CIRCUIT DELAY IS ABOUT 15 PERCENT ON

A 65NM

• WORSE IN SUB-65NM NODES

• DELAY DEGRADATION FOLLOWS THE SAME TREND

OUR PROBLEM

• HIGHLY CORRELATED WORKLOAD FOR GPGPU

• FREQUENT AND NON-UNIFORM EXECUTION OF

VLIW SLOTS

• CAUSES NON-UNIFORM AGING AND EXHAUSTING

• SHORTENING THEIR LIFETIME

• NO PE IS IMMUNE FROM UNBALANCED

UTILIZATION

GPU ARCHITECTURE

PE USAGE FOR VARIOUS KERNAL

POSSIBLE SOLUTIONS

• SELECTIVE FREQUENCY AND SPEED SCALING

• WEAR-OUT AND DISCARD FAULTY CORES

• ONLINE ADAPTIVE VLIW REALLOCATION

STRATEGY

• SELECTIVE SHUTDOWN DISABLING SLOW CORES

• RUNNING EACH CORE AT ITS MAXIMUM

FREQUENCY INDEPENDENTLY

AGING AWARE COMPILER

• DYNAMIC BINARY OPTIMIZER

• IDLING A FATIGUED PE

• REASSIGNING INSTRUCTIONS

• PREDICTING PERFORMANCE DEGRADATION AND AGING

RESULTS AND CONCLUSION:

• FULLY IN-PARALLEL WITH GPGPU ON A HOST CPU

• IMPOSES 0% THROUGHPUT PENALTY

• REDUCES ΔVTH: UP TO 49%(11%) AND ON

AVERAGE 34%(6%)

• TOTAL EXECUTION TIME OF THE ADAPTION

PROCESS IS 13 MS

• EQUALIZES EXPECTED LIFETIME OF PE WITHOUT

ARCHITECTURAL MODIFICATION

COMPARISON (NATIVE AND HEALTHY KERNEL)

COMPARISON (NATIVE AND HEALTHY KERNEL)

FUTURE:

• GENERALIZING THE APPROACH ON MEMORY

SUBSYSTEMS AND VARIETY OF ARCHITECTURES

REFERENCES

• ON-CHIP AGING SENSOR TO MONITOR NBTI EFFECT IN NANO-SCALE SRAM BY A. CERATTI, T. COPETTI, L. BOLZANI, F. VARGAS

• AGING-AWARE COMPILER-DIRECTED VLIW ASSIGNMENT FOR GPGPU ARCHITECTURES BY ABBAS RAHIMI, LUCA BENINI DEIS, RAJESH K. GUPTA CSE

THANK YOU

QUESTIONS?