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Politecnico di Milano Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB) XOHW16 Meeting Marco Bottino Pierandrea Cancian Guido Walter Di Donato [email protected] [email protected] [email protected] WHY FPGA 2/8

2. HaVIRAS - Why FPGA

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Page 1: 2. HaVIRAS - Why FPGA

PolitecnicodiMilanoDipartimentodiElettronica,InformazioneeBioingegneria(DEIB)

XOHW16Meeting

MarcoBottinoPierandreaCancian

GuidoWalterDiDonato

[email protected]

[email protected]

[email protected]

WHYFPGA2/8

Page 2: 2. HaVIRAS - Why FPGA

The target

● A biometric feature extractor

for an identification system

2

Acquisition

Preprocessing &&

ROI Individuation

Processing

Feature extraction

Storage

Matching &&

Decision

Page 3: 2. HaVIRAS - Why FPGA

The target

● A biometric feature extractor

for an identification system:

Safe

2

Acquisition

Preprocessing &&

ROI Individuation

Processing

Feature extraction

Matching &&

Decision

Storage

Encrypting

Page 4: 2. HaVIRAS - Why FPGA

The target

● A biometric feature extractor

for an identification system:

Safe

Embedded

SoC

Matching &&

Decision

Storage

Acquisition

Preprocessing &&

ROI Individuation

Processing

Feature extraction

Encrypting

2

Page 5: 2. HaVIRAS - Why FPGA

The target

● A biometric feature extractor

for an identification system:

Safe

Embedded

yet fast!

2

Page 6: 2. HaVIRAS - Why FPGA

Some of the involved processes

are computationally cumbersome,

such as:

● Median Filter

● Local thresholding

● Skeletonization

The problem

Tome_BIOSIG_2015

DOI: 10.1109/ICMA.2005.1626888 · IEEE Xplore

3

Page 7: 2. HaVIRAS - Why FPGA

The problem

Tome_BIOSIG_2015

http://images.clipartpanda.com/gary-the-snail-clipart-gary002.gif

Too slow in SW on an embedded system!

3

Some of the involved processes

are computationally cumbersome,

such as:

● Median Filter

● Local thresholding

● Skeletonization

Page 8: 2. HaVIRAS - Why FPGA

HW acceleration to reduce computation time:

The solution

FPGA

4

From “Personal Verification using Finger Vein Biometrics in FPGA-based System-on-Chip”. Available @ www.emo.org.tr/ekler/41b718e81e5a762_ek.pdf

Page 9: 2. HaVIRAS - Why FPGA

HW acceleration to reduce computation time:

The solution

FPGA

Embedded

+=

4

TM

Page 10: 2. HaVIRAS - Why FPGA

[email protected] [email protected] [email protected]

https://www.facebook.com/HaVIRAS2016/

https://twitter.com/HaVIRAS_NECST

HandVesselsInfraRedAuthenticationSystem

5

mailto:[email protected]
mailto:[email protected]
mailto:[email protected]?subject=

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