Blind People navigation by SOLAR and Battery charger

ABSTRACT

AIM: This project will helps the blind people to navigate and

indicates if any obstacle comes in to their way and the power

supply will taken from the solar panel.

DESCRIPTION:

This projects Blind People navigation by SOLAR and Battery

charger will be used to helps blind people for finding the any

obstacles are present on their way. This project uses the solar

panel and battery for the power supply purpose. Solar power

supply is costless natural energy. Using of this method will give

the low cost project design and costless power generation.

In this case we are going to use the 8051 based

microcontroller for storage and for processing of information. uC

flash software will be used for loading the hex file into the

microcontroller.

Software: Embedded ‘C’ language.

Tools: Keil uVision (keilC51), uC Flash Programmer

Target Device: 8051 microcontroller (AT89S52).

Applications: for blind navigation purpose

Advantages: Costless power generation, easy way to assist

the blind people.

Reference: The 8051 micro controller and embedded systems by Mazidi.

INDEX

1. Introduction to Embedded Systems

2. 8051 , Block diagram , Pin description

3. AT89S52 Microcontrollers

4. IR sensor , SOLAR panel.

5. Working flow of the project Block diagram and Schematic diagram

6. Source code

7. Keil software

8. Conclusion

9. Bibliography

Chapter 1

Introduction to Embedded Systems

INTRODUCTION TO EMBEDDED SYSTEMS

EMBEDDED SYSTEM

An embedded system is a special-purpose computer system

designed to perform one or a few dedicated functions, sometimes with

real-time computing constraints. It is usually embedded as part of a

complete device including hardware and mechanical parts. In

contrast, a general-purpose computer, such as a personal computer,

can do many different tasks depending on programming. Embedded

systems have become very important today as they control many of

the common devices we use.

Since the embedded system is dedicated to specific tasks, design

engineers can optimize it, reducing the size and cost of the product, or

increasing the reliability and performance. Some embedded systems

are mass-produced, benefiting from economies of scale.

Physically, embedded systems range from portable devices such

as digital watches and MP3 players, to large stationary installations

like traffic lights, factory controllers, or the systems controlling

nuclear power plants. Complexity varies from low, with a single

microcontroller chip, to very high with multiple units, peripherals and

networks mounted inside a large chassis or enclosure.

In general, "embedded system" is not an exactly defined term, as

many systems have some element of programmability. For example,

Handheld computers share some elements with embedded systems —

such as the operating systems and microprocessors which power them

— but are not truly embedded systems, because they allow different

applications to be loaded and peripherals to be connected.

An embedded system is some combination of computer hardware

and software, either fixed in capability or programmable, that is

specifically designed for a particular kind of application device.

Industrial machines, automobiles, medical equipment, cameras,

household appliances, airplanes, vending machines, and toys (as well

as the more obvious cellular phone and PDA) are among the myriad

possible hosts of an embedded system. Embedded systems that are

programmable are provided with a programming interface, and

embedded systems programming is a specialized occupation.

Certain operating systems or language platforms are tailored for

the embedded market, such as Embedded Java and Windows XP

Embedded. However, some low-end consumer products use very

inexpensive microprocessors and limited storage, with the application

and operating system both part of a single program. The program is

written permanently into the system's memory in this case, rather

than being loaded into RAM (random access memory), as programs on

a personal computer are.

APPLICATIONS OF EMBEDDED SYSTEM

We are living in the Embedded World. You are surrounded with

many embedded products and your daily life largely depends on the

proper functioning of these gadgets. Television, Radio, CD player of

your living room, Washing Machine or Microwave Oven in your

kitchen, Card readers, Access Controllers, Palm devices of your work

space enable you to do many of your tasks very effectively. Apart from

all these, many controllers embedded in your car take care of car

operations between the bumpers and most of the times you tend to

ignore all these controllers.

In recent days, you are showered with variety of information

about these embedded controllers in many places. All kinds of

magazines and journals regularly dish out details about latest

technologies, new devices; fast applications which make you believe

that your basic survival is controlled by these embedded products.

Now you can agree to the fact that these embedded products have

successfully invaded into our world. You must be wondering about

these embedded controllers or systems. What is this Embedded

System?

The computer you use to compose your mails, or create a

document or analyze the database is known as the standard desktop

computer. These desktop computers are manufactured to serve many

purposes and applications.

You need to install the relevant software to get the required

processing facility. So, these desktop computers can do many things.

In contrast, embedded controllers carryout a specific work for which

they are designed. Most of the time, engineers design these embedded

controllers with a specific goal in mind. So these controllers cannot be

used in any other place.

Theoretically, an embedded controller is a combination of a piece

of microprocessor based hardware and the suitable software to

undertake a specific task.

These days designers have many choices in

microprocessors/microcontrollers. Especially, in 8 bit and 32 bit, the

available variety really may overwhelm even an experienced designer.

Selecting a right microprocessor may turn out as a most difficult first

step and it is getting complicated as new devices continue to pop-up

very often.

In the 8 bit segment, the most popular and used architecture is

Intel's 8031. Market acceptance of this particular family has driven

many semiconductor manufacturers to develop something new based

on this particular architecture. Even after 25 years of existence,

semiconductor manufacturers still come out with some kind of device

using this 8031 core.

Military and aerospace software applications

From in-orbit embedded systems to jumbo jets to vital battlefield

networks, designers of mission-critical aerospace and defense systems

requiring real-time performance, scalability, and high-availability

facilities consistently turn to the LynxOS® RTOS and the LynxOS-178

RTOS for software certification to DO-178B.

Rich in system resources and networking services, LynxOS provides

an off-the-shelf software platform with hard real-time response backed

by powerful distributed computing (CORBA), high reliability, software

certification, and long-term support options.

The LynxOS-178 RTOS for software certification, based on the

RTCA DO-178B standard, assists developers in gaining certification

for their mission- and safety-critical systems. Real-time systems

programmers get a boost with LynuxWorks' DO-178B RTOS training

courses.

LynxOS-178 is the first DO-178B and EUROCAE/ED-12B

certifiable, POSIX®-compatible RTOS solution.

Communications applications

"Five-nines" availability, CompactPCI hot swap support, and hard

real-time response—LynxOS delivers on these key requirements and

more for today's carrier-class systems. Scalable kernel configurations,

distributed computing capabilities, integrated communications stacks,

and fault-management facilities make LynxOS the ideal choice for

companies looking for a single operating system for all embedded

telecommunications applications—from complex central controllers to

simple line/trunk cards.

LynuxWorks Jumpstart for Communications package enables

OEMs to rapidly develop mission-critical communications equipment,

with pre-integrated, state-of-the-art, data networking and porting

software components—including source code for easy customization.

The Lynx Certifiable Stack (LCS) is a secure TCP/IP protocol stack

designed especially for applications where standards certification is

required.

Electronics applications and consumer devices

As the number of powerful embedded processors in consumer

devices continues to rise, the BlueCat® Linux® operating system

provides a highly reliable and royalty-free option for systems

designers.

And as the wireless appliance revolution rolls on, web-enabled

navigation systems, radios, personal communication devices, phones

and PDAs all benefit from the cost-effective dependability, proven

stability and full product life-cycle support opportunities associated

with BlueCat embedded Linux. BlueCat has teamed up with industry

leaders to make it easier to build Linux mobile phones with Java

integration.

For makers of low-cost consumer electronic devices who wish to

integrate the LynxOS real-time operating system into their products,

we offer special MSRP-based pricing to reduce royalty fees to a

negligible portion of the device's MSRP.

Industrial automation and process control software

Designers of industrial and process control systems know from

experience that LynuxWorks operating systems provide the security

and reliability that their industrial applications require.

From ISO 9001 certification to fault-tolerance, POSIX conformance,

secure partitioning and high availability, we've got it all. Take

advantage of our 20 years of experience.

MICROCONTROLLER VERSUS MICROPROCESSOR

What is the difference between a Microprocessor and

Microcontroller? By microprocessor is meant the general purpose

Microprocessors such as Intel's X86 family (8086, 80286, 80386,

80486, and the Pentium) or Motorola's 680X0 family (68000, 68010,

68020, 68030, 68040, etc). These microprocessors contain no RAM,

no ROM, and no I/O ports on the chip itself. For this reason, they are

commonly referred to as general-purpose Microprocessors.

A system designer using a general-purpose microprocessor such

as the Pentium or the 68040 must add RAM, ROM, I/O ports, and

timers externally to make them functional. Although the addition of

external RAM, ROM, and I/O ports makes these systems bulkier and

much more expensive, they have the advantage of versatility such that

the designer can decide on the amount of RAM, ROM and I/O ports

needed to fit the task at hand. This is not the case with

Microcontrollers.

A Microcontroller has a CPU (a microprocessor) in addition to a

fixed amount of RAM, ROM, I/O ports, and a timer all on a single

chip. In other words, the processor, the RAM, ROM, I/O ports and the

timer are all embedded together on one chip; therefore, the designer

cannot add any external memory, I/O ports, or timer to it. The fixed

amount of on-chip ROM, RAM, and number of I/O ports in

Microcontrollers makes them ideal for many applications in which cost

and space are critical.

In many applications, for example a TV remote control, there is

no need for the computing power of a 486 or even an 8086

microprocessor. These applications most often require some I/O

operations to read signals and turn on and off certain bits.

MICROCONTROLLERS FOR EMBEDDED SYSTEMS

In the Literature discussing microprocessors, we often see the

term Embedded System. Microprocessors and Microcontrollers are

widely used in embedded system products. An embedded system

product uses a microprocessor (or Microcontroller) to do one task only.

A printer is an example of embedded system since the processor inside

it performs one task only; namely getting the data and printing it.

Contrast this with a Pentium based PC. A PC can be used for any

number of applications such as word processor, print-server, bank

teller terminal, Video game, network server, or Internet terminal.

Software for a variety of applications can be loaded and run. Of course

the reason a pc can perform myriad tasks is that it has RAM memory

and an operating system that loads the application software into RAM

memory and lets the CPU run it.

In an Embedded system, there is only one application software

that is typically burned into ROM. An x86 PC contains or is

connected to various embedded products such as keyboard, printer,

modem, disk controller, sound card, CD-ROM drives, mouse, and so

on. Each one of these peripherals has a Microcontroller inside it that

performs only one task. For example, inside every mouse there is a

Microcontroller to perform the task of finding the mouse position and

sending it to the PC. Table 1-1 lists some embedded products.

Chapter.2

8051,Block diagram, Pin description

8051 ARCHITECTURE

The generic 8051 architecture supports a Harvard

architecture, which contains two separate buses for both

program and data. So, it has two distinctive memory spaces of

64K X 8 size for both programmed and data. It is based on an 8

bit central processing unit with an 8 bit Accumulator and

another 8 bit B register as main processing blocks. Other

portions of the architecture include few 8 bit and 16 bit

registers and 8 bit memory locations.

Each 8051 device has some amount of data RAM built in

the device for internal processing. This area is used for stack

operations and temporary storage of data.

This bus architecture is supported with on-chip peripheral

functions like I/O ports, timers/counters, versatile serial

communication port. So it is clear that this 8051 architecture

was designed to cater many real time embedded needs.

FEATURES OF 8051 ARCHITECTURE

Optimized 8 bit CPU for control applications and extensive

Boolean processing capabilities.

64K Program Memory address space.

64K Data Memory address space.

128 bytes of on chip Data Memory.

32 Bi-directional and individually addressable I/O lines.

Two 16 bit timer/counters.

Full Duplex UART.

6-source / 5-vector interrupt structure with priority levels.

On chip clock oscillator.

Now we may be wondering about the non-mentioning of

memory space meant for the program storage, the most important

part of any embedded controller. Originally this 8051

architecture was introduced with on-chip, ‘one time

programmable’ version of Program Memory of size 4K X 8. Intel

delivered all these microcontrollers (8051) with user’s program

fused inside the device. The memory portion was mapped at the

lower end of the Program Memory area. But, after getting

devices, customers couldn’t change any thing in their program

code, which was already made available inside during device

fabrication.

BLOCK DIAGRAM OF 8051

Figure 4.1 - Block Diagram of the 8051 Core

So, very soon Intel introduced the 8051 devices with re-

programmable type of Program Memory using built-in EPROM of

size 4K X 8. Like a regular EPROM, this memory can be re-

programmed many times. Later on Intel started manufacturing

these 8031 devices without any on chip Program Memory.

MICROCONTROLLER LOGIC SYMBOL

ALE/PROG: Address Latch Enable output pulse for latching the low

byte of the address during accesses to external memory. ALE is

emitted at a constant rate of 1/6 of the oscillator frequency, for

external timing or clocking purposes, even when there are no accesses

to external memory. (However, one ALE pulse is skipped during each

access to external Data Memory.) This pin is also the program pulse

input (PROG) during EPROM programming.

PSEN : Program Store Enable is the read strobe to external Program

Memory. When the device is executing out of external Program

Memory, PSEN is activated twice each machine cycle (except that two

PSEN activations are skipped during accesses to external Data

Memory). PSEN is not activated when the device is executing out of

internal Program Memory.

EA/VPP: When EA is held high the CPU executes out of internal

Program Memory (unless the Program Counter exceeds 0FFFH in the

80C51). Holding EA low forces the CPU to execute out of external

memory regardless of the Program Counter value. In the 80C31, EA

must be externally wired low. In the EPROM devices, this pin also

receives the programming supply voltage (VPP) during EPROM

programming.

XTAL1: Input to the inverting oscillator amplifier.

XTAL2: Output from the inverting oscillator amplifier.

The 8051’s I/O port structure is extremely versatile and flexible.

The device has 32 I/O pins configured as four eight bit parallel

ports (P0, P1, P2 and P3). Each pin can be used as an input or

as an output under the software control. These I/O pins can be

accessed directly by memory instructions during program

execution to get required flexibility.

These port lines can be operated in different modes and all

the pins can be made to do many different tasks apart from their

regular I/O function executions. Instructions, which access

external memory, use port P0 as a multiplexed address/data

bus. At the beginning of an external memory cycle, low order 8

bits of the address bus are output on P0. The same pins

transfer data byte at the later stage of the instruction execution.

Also, any instruction that accesses external Program

Memory will output the higher order byte on P2 during read

cycle. Remaining ports, P1 and P3 are available for standard I/

O functions. But all the 8 lines of P3 support special functions:

Two external interrupt lines, two counter inputs, serial port’s

two data lines and two timing control strobe lines are designed

to use P3 port lines. When you don’t use these special

functions, you can use corresponding port lines as a standard

I/O. Even within a single port, I/O operations may be combined in

many ways. Different pins can be configured as input or outputs

independent of each other or the same pin can be used as an

input or as output at different times. You can comfortably

combine I/O operations and special operations for Port 3 lines.

All the Port 3 pins are multifunctional. They are not only port

pins, but also serve the functions of various special features as listed

below:

Port Pin Alternate Function

P3.0 RxD (serial input port)

P3.1 TxD (serial output port)

MEMORY ORGANISATION

The alternate functions can only be activated if the

corresponding bit latch in the port SFR contains a 1. Otherwise the

port pin remains at 0.All 80C51 devices have separate address spaces

for program and data memory, as shown in Figures 1 and 2. The

logical separation of program and data memory allows the data

memory to be accessed by 8-bit addresses, which can be quickly

stored and manipulated by an 8-bit CPU. Nevertheless, 16-bit data

memory addresses can also be generated through the DPTR register.

Program memory (ROM, EPROM) can only be read, not written

to. There can be up to 64k bytes of program memory. In the 80C51,

the lowest 4k bytes of program are on-chip. In the ROM less versions,

all program memory is external. The read strobe for external program

memory is the PSEN (program store enable). Data Memory (RAM)

occupies a separate address space from Program Memory. In the

80C51, the lowest 128 bytes of data memory are on-chip. Up to 64k

bytes of external RAM can be addressed in the external Data Memory

space. In the ROM less version, the lowest 128 bytes are on-chip. The

CPU generates read and write signals, RD and WR, as needed during

external Data Memory accesses.

External Program Memory and external Data Memory may be

combined if desired by applying the RD and PSEN signals to the

inputs of an AND gate and using the output of the gate as the read

strobe to the external Program/Data memory.

BASIC REGISTERS

A number of 8052 registers can be considered "basic." Very little

can be done without them and a detailed explanation of each one is

warranted to make sure the reader understands these registers before

getting into more complicated areas of development.

The Accumulator: If you've worked with any other assembly language

you will be familiar with the concept of an accumulator register.

The Accumulator, as its name suggests, is used as a general

register to accumulate the results of a large number of instructions. It

can hold an 8-bit (1-byte) value and is the most versatile register the

8052 has due to the sheer number of instructions that make use of

the accumulator. More than half of the 8052's 255 instructions

manipulate or use the Accumulator in some way. For example, if you

want to add the number 10 and 20, the resulting 30 will be stored in

the Accumulator. Once you have a value in the Accumulator you may

continue processing the value or you may store it in another register

or in memory.

The "R" Registers: The "R" registers are sets of eight registers that are

named R0, R1, through R7. These registers are used as auxiliary

registers in many operations. To continue with the above example,

perhaps you are adding 10 and 20. The original number 10 may be

stored in the Accumulator whereas the value 20 may be stored in, say,

register R4. To process the addition you would execute the command:

ADD A, R4

After executing this instruction the Accumulator will contain the value

30. You may think of the "R" registers as very important auxiliary, or

"helper", registers. The Accumulator alone would not be very useful if

it were not for these "R" registers.

The "R" registers are also used to store values temporarily. For

example, let’s say you want to add the values in R1 and R2 together

and then subtract the values of R3 and R4. One way to do this would

be:

MOV A, R3 ; Move the value of R3 to accumulator

ADD A, R4 ; add the value of R4

MOV R5, A ; Store the result in R5

MOV A, R1 ; Move the value of R1 to Acc

ADD A, R2 ; add the value of R2 with A

SUBB A, R5 ; Subtract the R5 (which has R3+R4)

As you can see, we used R5 to temporarily hold the sum of R3 and R4.

Of course, this isn't the most efficient way to calculate (R1+R2) - (R3

+R4) but it does illustrate the use of the "R" registers as a way to store

values temporarily.

As mentioned earlier, there are four sets of "R" registers-register bank

0, 1, 2, and 3. When the 8052 is first powered up, register bank 0

(addresses 00h through 07h) is used by default. In this case, for

example, R4 is the same as Internal RAM address 04h. However, your

program may instruct the 8052 to use one of the alternate register

banks; i.e., register banks 1, 2, or 3. In this case, R4 will no longer be

the same as Internal RAM address 04h. For example, if your program

instructs the 8052 to use register bank 1, register R4 will now be

synonymous with Internal RAM address 0Ch. If you select register

bank 2, R4 is synonymous with 14h, and if you select register bank 3

it is synonymous with address 1Ch.

The concept of register banks adds a great level of flexibility to

the 8052, especially when dealing with interrupts (we'll talk about

interrupts later). However, always remember that the register banks

really reside in the first 32 bytes of Internal RAM.

The B Register The "B" register is very similar to the Accumulator in

the sense that it may hold an 8-bit (1-byte) value. The "B" register is

only used implicitly by two 8052 instructions: MUL AB and DIV AB.

Thus, if you want to quickly and easily multiply or divide A by another

number, you may store the other number in "B" and make use of

these two instructions.

Aside from the MUL and DIV instructions, the "B" register are

often used as yet another temporary storage register much like a ninth

"R" register.

The Program Counter The Program Counter (PC) is a 2-byte

address that tells the 8052 where the next instruction to execute is

found in memory. When the 8052 is initialized PC always starts at

0000h and is incremented each time an instruction is executed. It is

important to note that PC isn't always incremented by one. Since some

instructions are 2 or 3 bytes in length the PC will be incremented by 2

or 3 in these cases.

The Program Counter is special in that there is no way to directly

modify its value. That is to say, you can't do something like

PC=2430h. On the other hand, if you execute LJMP 2430h you've

effectively accomplished the same thing.

It is also interesting to note that while you may change the value

of PC (by executing a jump instruction, etc.) there is no way to read

the value of PC. That is to say, there is no way to ask the 8052 "What

address are you about to execute?" As it turns out, this is not

completely true: There is one trick that may be used to determine the

current value of PC. This trick will be covered in a later chapter.

The Data Pointer: The Data Pointer (DPTR) is the 8052ís only user-

accessible 16-bit (2-byte) register. The Accumulator, "R" registers, and

"B" register are all 1-byte values. The PC just described is a 16-bit

value but isn't directly user-accessible as a working register.

DPTR, as the name suggests, is used to point to data. It is used

by a number of commands that allow the 8052 to access external

memory. When the 8052 accesses external memory it accesses the

memory at the address indicated by DPTR.

While DPTR is most often used to point to data in external

memory or code memory, many developers take advantage of the fact

that it's the only true 16-bit register available. It is often used to store

2-byte values that have nothing to do with memory locations.

The Stack Pointer: The Stack Pointer, like all registers except DPTR

and PC, may hold an 8-bit (1-byte) value. The Stack Pointer is used to

indicate where the next value to be removed from the stack should be

taken from.

When you push a value onto the stack, the 8052 first increments

the value of SP and then stores the value at the resulting memory

location. When you pop a value off the stack, the 8052 returns the

value from the memory location indicated by SP and then decrements

the value of SP.

This order of operation is important. When the 8052 is initialized

SP will be initialized to 07h. If you immediately push a value onto the

stack, the value will be stored in Internal RAM address 08h. This

makes sense taking into account what was mentioned two paragraphs

above: First the 8051 will increment the value of SP (from 07h to 08h)

and then will store the pushed value at that memory address (08h).

ADDRESSING MODES

The addressing modes in the 80C51 instruction set are as follows:

Direct Addressing: In direct addressing the operand is specified by an

8-bit address field in the instruction. Only internal Data RAM and

SFRs can be directly addressed.

Indirect Addressing: In indirect addressing the instruction specifies a

register which contains the address of the operand. Both internal and

external RAM can be indirectly addressed. The address register for 8-

bit addresses can be R0 or R1 of the selected bank, or the Stack

Pointer. The address register for 16-bit addresses can only be the 16-

bit “data pointer” register, DPTR.

Register Instructions The register banks, containing registers R0

through R7, can be accessed by certain instructions which carry a 3-

bit register specification within the opcode of the instruction.

Instructions that access the registers this way are code efficient, since

this mode eliminates an address byte. When the instruction is

executed, one of the eight registers in the selected bank is accessed.

One of four banks is selected at execution time by the two bank select

bits in the PSW.

Register-Specific Instructions Some instructions are specific to a

certain register. For example, some instructions always operate on the

Accumulator, or Data Pointer, etc., so no address byte is needed to

point to it. The opcode itself does that. Instructions that refer to the

Accumulator as A assemble as accumulator specific opcodes.

Immediate Constants

The value of a constant can follow the opcode in Program Memory. For

example,

MOV A, #100

loads the Accumulator with the decimal number 100. The same

number could be specified in hex digits as 64H.

Indexed Addressing

Only program Memory can be accessed with indexed addressing,

and it can only be read. This addressing mode is intended for reading

look-up tables in Program Memory A 16-bit base register (either DPTR

or the Program Counter) points to the base of the table, and the

Accumulator is set up with the table entry number. The address of the

table entry in Program Memory is formed by adding the Accumulator

data to the base pointer. Another type of indexed addressing is used in

the “case jump” instruction. In this case the destination address of a

jump instruction is computed as the sum of the base pointer and the

Accumulator data.

CENTRAL PROCESSING UNIT

The CPU is the brain of the microcontrollers reading user’s

programs and executing the expected task as per instructions

stored there in. Its primary elements are an 8 bit Arithmetic

Logic Unit (ALU ) , Accumulator (Acc ) , few more 8 bit registers

, B register, Stack Pointer (SP ) , Program Status Word (PSW)

and 16 bit registers, Program Counter (PC) and Data Pointer

Register (DPTR).

The ALU (Acc) performs arithmetic and logic functions on 8

bit input variables. Arithmetic operations include basic addition,

subtraction, and multiplication and division. Logical operations are

AND, OR, Exclusive OR as well as rotate, clear, complement and

etc. Apart from all the above, ALU is responsible in conditional

branching decisions, and provides a temporary place in data

transfer operations within the device.

B-register is mainly used in multiply and divides operations.

During execution, B register either keeps one of the two inputs

or then retains a portion of the result. For other instructions, it

can be used as another general purpose register.

Program Status Word (PSW) keeps the current status of the ALU

in different bits. Stack Pointer (SP) is an 8 bit register. This

pointer keeps track of memory space where the important

register information is stored when the program flow gets into

executing a subroutine. The stack portion may be placed in

any where in the on-chip RAM. But normally SP is initialized to

07H after a device reset and grows up from the location 08H.

The Stack Pointer is automatically incremented or decremented

for all PUSH or POP instructions and for all subroutine calls

and returns.

Program Counter (PC) is the 16 bit register giving address of

next instruction to be executed during program execution and

it always points to the Program Memory space. Data Pointer

(DPTR) is another 16 bit addressing register that can be used to

fetch any 8 bit data from the data memory space. When it is not

being used for this purpose, it can be used as two eight bit

registers.

TIMERS/COUNTERS

8051 has two 16 bit Timers/Counters capable of working in

different modes. Each consists of a ‘High’ byte and a ‘Low’ byte

which can be accessed under software. There is a mode control

register and a control register to configure these

timers/counters in number of ways.

These timers can be used to measure time intervals,

determine pulse widths or initiate events with one microsecond

resolution up to a maximum of 65 millisecond (corresponding to

65, 536 counts). Use software to get longer delays. Working as

counter, they can accumulate occurrences of external events

(from DC to 500 KHz) with 16 bit precision.

SERIAL PORTS

Each 8051 microcomputer contains a high speed full duplex

(means you can simultaneously use the same port for both

transmitting and receiving purposes) serial port which is

software configurable in 4 basic modes: 8 bit UART; 9 bit

UART; inter processor Communications link or as shift register

I/O expander.

For the standard serial communication facility, 8051 can be

programmed for UART operations and can be connected with

regular personal computers, teletype writers, modem at data

rates between 122 bauds and 31 kilo bauds. Getting this facility

is made very simple using simple routines with option to elect

even or odd parity. You can also establish a kind of Inter

processor communication facility among many microcomputers in

a distributed environment with automatic recognition of address/

data. Apart from all above, you can also get super fast I/O lines

using low cost simple TTL or CMOS shift registers.

MICROCONTROLLER

Micro controller is a true computer on a chip the design

incorporates all of the features found in a microprocessor CPU:

arithmetic and logic unit, stack pointer, program counter and

registers. It has also had added additional features like RAM, ROM,

serial I/O, counters and clock circuit.

Like the microprocessor, a microcontroller is a general purpose

device, but one that is meant to read data, perform limited

calculations on that data and control it’s environment based on those

calculations. The prime use of a microcontroller is to control the

operation of a machine using a fixed program that is stored in ROM

and that does not change over the lifetime of the system.

The design approach of a microcontroller uses a more limited set

of single byte and double byte instructions that are used to move code

and data from internal memory to ALU. Many instructions are coupled

with pins on the IC package; the pins are capable of having several

different functions depending on the wishes of the programmer.

The microcontroller is concerned with getting the data from and

on to its own pins; the architecture and instruction set are optimized

to handle data in bit and byte size.

FUNCTIONAL BLOCKS OF A MICROCONTROLLER

CRITERIA FOR CHOOSING A MICROCONTROLLER

1. The first and foremost criterion for choosing a microcontroller is that it

must meet task at hands efficiently and cost effectively. In analyzing

the needs of a microcontroller based project we must first see whether

it is an 8-bit, 16-bit or 32-bit microcontroller and how best it can

handle the computing needs of the task most effectively. The other

considerations in this category are:

(a) Speed: The highest speed that the microcontroller supports

(b) Packaging: Is it 40-pin DIP or QPF or some other packaging

format?

This is important in terms of space, assembling and prototyping the

End product.

(c) Power Consumption: This is especially critical for battery-powered

Products.

(d) The amount of RAM and ROM on chip

(e) The number of I/O pins and timers on the chip.

(f) Cost per unit: This is important in terms of final product in

which a microcontroller is used.

2. The second criteria in choosing a microcontroller are how easy it is to

develop products around it. Key considerations include the availability

of an assembler, debugger, a code efficient ‘C’ language compiler,

emulator, technical support and both in house and outside expertise.

In many cases third party vendor support for chip is required.

3. The third criteria in choosing a microcontroller is it readily available in

needed quantities both now and in future. For some designers this is

even more important than first two criteria’s. Currently, of leading 8–

bit microcontrollers, the 89C51 family has the largest number of

diversified (multiple source) suppliers. By suppliers meant a producer

besides the originator of microcontroller in the case of the 89C51,

which was originated by Intel, several companies are also currently

producing the 89C51. Viz: INTEL, PHILIPS, These companies include

PHILIPS, SIEMENS, and DALLAS-SEMICONDUCTOR. It should be

noted that Motorola, Zilog and Microchip Technologies have all

dedicated massive resource as to ensure wide and timely availability of

their product since their product is stable, mature and single sourced.

In recent years they also have begun to sell the ASIC library cell of the

microcontroller.

Chapter.3

AT89S52 MICROCONTROLLERS

AT89S52

Features

• Compatible with MCS®-51 Products

• 8K Bytes of In-System Programmable (ISP) Flash Memory

– Endurance: 10,000 Write/Erase Cycles

• 4.0V to 5.5V Operating Range

• Fully Static Operation: 0 Hz to 33 MHz

• Three-level Program Memory Lock

• 256 x 8-bit Internal RAM

• 32 Programmable I/O Lines

• Three 16-bit Timer/Counters

• Eight Interrupt Sources

• Full Duplex UART Serial Channel

• Low-power Idle and Power-down Modes

• Interrupt Recovery from Power-down Mode

• Watchdog Timer • Dual Data Pointer

• Power-off Flag • Fast Programming Time

• Flexible ISP Programming (Byte and Page Mode)

• Green (Pb/Halide-free) Packaging Option

Description

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller

with 8K bytes of in-system programmable Flash memory. The device is

manufactured using Atmel’s high-density nonvolatile memory technology

and is compatible with the indus-try-standard 80C51 instruction set and

pinout. The on-chip Flash allows the program memory to be reprogrammed

in-system or by a conventional nonvolatile memory pro-grammer. By

combining a versatile 8-bit CPU with in-system programmable Flash on a

monolithic chip, the Atmel AT89S52 is a powerful microcontroller which

provides a highly-flexible and cost-effective solution to many embedded

control applications. The AT89S52 provides the following standard features:

8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data

pointers, three 16-bit timer/counters, a six-vector two-level interrupt

architecture, a full duplex serial port, on-chip oscillator, and clock circuitry.

In addition, the AT89S52 is designed with static logic for operation down to

zero frequency and supports two software selectable power saving modes.

The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial

port, and interrupt system to continue functioning. The Power-down mode

saves the RAM con-tents but freezes the oscillator, disabling all other chip

functions until the next interrupt or hardware reset.

Block Diagram

Pin Configuration

Pin Description

VCC

Supply voltage.

GND

Ground.

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each

pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins

can be used as high-impedance inputs. Port 0 can also be configured to be

the multiplexed low-order address/data bus during accesses to external

program and data memory. In this mode, P0 has internal pull-ups. Port 0

also receives the code bytes during Flash programming and outputs the

code bytes dur-ing program verification.

External pull-ups are required during program verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1

output buffers can sink/source four TTL inputs. When 1s are written to Port

1 pins, they are pulled high by the inter-nal pull-ups and can be used as

inputs. As inputs, Port 1 pins that are externally being pulled low will

source current (IIL) because of the internal pull-ups. In addition, P1.0 and

P1.1 can be configured to be the timer/counter 2 external count input

(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively,

as shown in the follow-ing table. Port 1 also receives the low-order address

bytes during Flash programming and verification.

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2

output buffers can sink/source four TTL inputs. When 1s are written to Port

2 pins, they are pulled high by the inter-nal pull-ups and can be used as

inputs. As inputs, Port 2 pins that are externally being pulled low will

source current (IIL) because of the internal pull-ups. Port 2 emits the high-

order address byte during fetches from external program memory and dur-

ing accesses to external data memory that use 16-bit addresses (MOVX @

DPTR). In this application, Port 2 uses strong internal pull-ups when

emitting 1s. During accesses to external data memory that use 8-bit

addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function

Register. Port 2 also receives the high-order address bits and some control

signals during Flash program-ming and verification.

Port Pin Alternate Functions

P1.0 T2 (external count input to Timer/Counter 2), clock-out P1.1 T2EX

(Timer/Counter 2 capture/reload trigger and direction control) P1.5 MOSI

(used for In-System Programming) P1.6 MISO (used for In-System

Programming) P1.7 SCK (used for In-System Programming)5 1919D–

MICRO–6/

Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3

output buffers can sink/source four TTL inputs. When 1s are written to Port

3 pins, they are pulled high by the inter-nal pull-ups and can be used as

inputs. As inputs, Port 3 pins that are externally being pulled low will

source current (IIL) because of the pull-ups. Port 3 receives some control

signals for Flash programming and verification. Port 3 also serves the

functions of various special features of the AT89S52, as shown in the fol-

lowing table.

RST

Reset input. A high on this pin for two machine cycles while the oscillator is

running resets the device. This pin drives high for 98 oscillator periods after

the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be

used to disable this feature. In the default state of bit DISRTO, the RESET

HIGH out feature is enabled.

ALE/PROG

Address Latch Enable (ALE) is an output pulse for latching the low byte of

the address during accesses to external memory. This pin is also the

program pulse input (PROG) during Flash programming. In normal

operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency

and may be used for external timing or clocking purposes. Note, however,

that one ALE pulse is skipped dur-ing each access to external data memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location

8EH. With the bit set, ALE is active only during a MOVX or MOVC

instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-

disable bit has no effect if the microcontroller is in external execution mode

PSEN

Program Store Enable (PSEN) is the read strobe to external program

memory. When the AT89S52 is executing code from external program

memory, PSEN is activated twice each machine cycle, except that two PSEN

activations are skipped during each access to exter-nal data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the

device to fetch code from external program memory locations starting at

0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will

be internally latched on reset. EA should be strapped to VCC for internal

program executions. This pin also receives the 12-volt programming enable

voltage (VPP) during Flash programming.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock

operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

Special Function Registers

A map of the on-chip memory area called the Special Function Register

(SFR) space is shown in Table 5-1. Note that not all of the addresses are

occupied, and unoccupied addresses may not be imple-mented on the chip.

Read accesses to these addresses will in general return random data, and

write accesses will have an indeterminate effect. User software should not

write 1s to these unlisted locations, since they may be used in future

products to invoke new features. In that case, the reset or inactive values of

the new bits will always be 0.

Timer 2 Registers:

Control and status bits are contained in registers T2CON (shown in Table 5-

2) and T2MOD (shown in Table 10-2) for Timer 2. The register pair

(RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit

capture mode or 16-bit auto-reload mode.

Interrupt Registers:

The individual interrupt enable bits are in the IE register. Two priorities can

be set for each of the six interrupt sources in the IP register.

Memory Organization MCS-51 devices have a separate address space for

Program and Data Memory. Up to 64K bytes each of external Program and

Data Memory can be addressed.

Program Memory

If the EA pin is connected to GND, all program fetches are directed to

external memory. On the AT89S52, if EA is connected to VCC, program

fetches to addresses 0000H through 1FFFH are directed to internal memory

and fetches to addresses 2000H through FFFFH are to external memory.

Data Memory

The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes

occupy a parallel address space to the Special Function Registers. This

means that the upper 128 bytes have the same addresses as the SFR space

but are physically separate from SFR space. When an instruction accesses

an internal location above address 7FH, the address mode used in the

instruction specifies whether the CPU accesses the upper 128 bytes of RAM

or the SFR space. Instructions which use direct addressing access the SFR

space. For example, the following direct addressing instruction accesses the

SFR at location 0A0H (which is P2). MOV 0A0H, #data Instructions that use

indirect addressing access the upper 128 bytes of RAM. For example, the

following indirect addressing instruction, where R0 contains 0A0H, accesses

the data byte at address 0A0H, rather than P2 (whose address is 0A0H).

MOV @R0, #data Note that stack operations are examples of indirect

addressing, so the upper 128 bytes of data RAM are available as stack

space.

Watchdog Timer (One-time Enabled with Reset-out)

The WDT is intended as a recovery method in situations where the CPU may

be subjected to software upsets. The WDT consists of a 14-bit counter and

the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable

from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in

sequence to the WDTRST register (SFR location 0A6H). When the WDT is

enabled, it will increment every machine cycle while the oscillator is

running. The WDT timeout period is dependent on the external clock

frequency. There is no way to disable the WDT except through reset (either

hardware reset or WDT overflow reset). When WDT over-flows, it will drive

an output RESET HIGH pulse at the RST pin.

Using the WDT

To enable the WDT, a user must write 01EH and 0E1H in sequence to the

WDTRST register (SFR location 0A6H). When the WDT is enabled, the user

needs to service it by writing 01EH and 0E1H to WDTRST to avoid a WDT

overflow. The 14-bit counter overflows when it reaches 16383 (3FFFH), and

this will reset the device. When the WDT is enabled, it will increment every

machine cycle while the oscillator is running. This means the user must

reset the WDT at least every 16383 machine cycles. To reset the WDT the

user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only

register. The WDT counter cannot be read or written. WhenWDT overflows, it

will generate an output RESET pulse at the RST pin. The RESET pulse

dura-tion is 98xTOSC, where TOSC = 1/FOSC. To make the best use of the

WDT, it should be serviced in those sections of code that will periodically be

executed within the time required to prevent a WDT reset.

WDT During Power-down and Idle

In Power-down mode the oscillator stops, which means the WDT also stops.

While in Power-down mode, the user does not need to service the WDT.

There are two methods of exiting Power-down mode: by a hardware reset or

via a level-activated external interrupt which is enabled prior to entering

Power-down mode. When Power-down is exited with hardware reset,

servicing the WDT should occur as it normally does whenever the AT89S52

is reset. Exiting Power-down with an interrupt is significantly different. The

interrupt is held low long enough for the oscillator to stabilize. When the

interrupt is brought high, the interrupt is serviced. To prevent the WDT from

resetting the device while the interrupt pin is held low, the WDT is not

started until the interrupt is pulled high. It is suggested that the WDT be

reset during the interrupt service for the interrupt used to exit Power-down

mode. To ensure that the WDT does not overflow within a few states of

exiting Power-down, it is best to reset the WDT just before entering Power-

down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR

is used to determine whether the WDT continues to count if enabled. The

WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To

prevent the WDT from resetting the AT89S52 while in IDLE mode, the user

should always set up a timer that will periodically exit IDLE, service the

WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop

to count in IDLE mode and resumes the count upon exit from IDLE.

UART

The UART in the AT89S52 operates the same way as the UART in the

AT89S52 and AT89C52.

Timer 0 and 1

Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and

Timer 1 in the AT89S52 and AT89C52.

Timer 2

Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an

event counter. The type of operation is selected by bit C/T2 in the SFR

T2CON (shown in Table 5-2). Timer 2 has three operating modes: capture,

auto-reload (up or down counting), and baud rate generator. The modes are

selected by bits in T2CON, as shown in Table 10-1. Timer 2 consists of two

8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is

incremented every machine cycle. Since a machine cycle consists of 12

oscillator periods, the count rate is 1/12 of the oscil-lator frequency.

In the Counter function, the register is incremented in response to a 1-to-0

transition at its corre-sponding external input pin, T2. In this function, the

external input is sampled during S5P2 of every machine cycle. When the

samples show a high in one cycle and a low in the next cycle, the count is

incremented. The new count value appears in the register during S3P1 of

the cycle following the one in which the transition was detected. Since two

machine cycles (24 oscillator periods) are required to recognize a 1-to-0

transition, the maximum count rate is 1/24 of the oscillator frequency. To

ensure that a given level is sampled at least once before it changes, the level

should be held for at least one full machine cycle.

Capture Mode

In the capture mode, two options are selected by bit EXEN2 in T2CON. If

EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets

bit TF2 in T2CON. This bit can then be used to generate an interrupt. If

EXEN2 = 1, Timer 2 performs the same operation, but a 1-to-0 transi-tion at

external input T2EX also causes the current value in TH2 and TL2 to be

captured into RCAP2H and RCAP2L, respectively. In addition, the transition

at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can

generate an interrupt. The capture mode is illus-trated in Figure 10-1.

Auto-reload (Up or Down Counter)

Timer 2 can be programmed to count up or down when configured in its 16-

bit auto-reload mode. This feature is invoked by the DCEN (Down Counter

Enable) bit located in the SFR T2MOD (see Table 10-2). Upon reset, the

DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is

set, Timer 2 can count up or down, depending on the value of the T2EX pin.

Baud Rate Generator

Timer 2 is selected as the baud rate generator by setting TCLK and/or

RCLK in T2CON (Table 5-2). Note that the baud rates for transmit and

receive can be different if Timer 2 is used for the receiver or transmitter and

Timer 1 is used for the other function. Setting RCLK and/or TCLK puts

Timer 2 into its baud rate generator mode, as shown in Figure 11-1. The

baud rate generator mode is similar to the auto-reload mode, in that a

rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit

value in registers RCAP2H and RCAP2L, which are preset by software. The

baud rates in Modes 1 and 3 are determined by Timer 2’s overflow rate

according to the fol-lowing equation. The Timer can be configured for either

timer or counter operation. In most applications, it is con-figured for timer

operation (CP/T2 = 0). The timer operation is different for Timer 2 when it is

used as a baud rate generator. Normally, as a timer, it increments every

machine cycle (at 1/12 the oscillator frequency). As a baud rate generator,

however, it increments every state time (at 1/2 the oscillator frequency). The

baud rate formula is given below. where (RCAP2H, RCAP2L) is the content of

RCAP2H and RCAP2L taken as a 16-bit unsigned integer. Timer 2 as a baud

rate generator is shown in Figure 11-1. This figure is valid only if RCLK or

TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will

not generate an inter-rupt. Note too, that if EXEN2 is set, a 1-to-0 transition

in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to

(TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX

can be used as an extra external interrupt. Note that when Timer 2 is

running (TR2 = 1) as a timer in the baud rate generator mode, TH2 or TL2

should not be read from or written to. Under these conditions, the Timer is

incremented every state time, and the results of a read or write may not be

accurate. The RCAP2 registers may be read but should not be written to,

because a write might overlap a reload and cause write and/or reload errors.

The timer should be turned off (clear TR2) before accessing the Timer 2 or

RCAP2 registers.

Programmable Clock Out

A 50% duty cycle clock can be programmed to come out on P1.0, as shown

in Figure 12-1. This pin, besides being a regular I/O pin, has two alternate

functions. It can be programmed to input the external clock for

Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to

4 MHz (for a 16-MHz operating frequency). To configure the Timer/Counter

2 as a clock generator, bit C/T2 (T2CON.1) must be cleared and bit T2OE

(T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer. The

clock-out frequency depends on the oscillator frequency and the reload

value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the

following equation. In the clock-out mode, Timer 2 roll-overs will not

generate an interrupt. This behavior is similar to when Timer 2 is used as a

baud-rate generator. It is possible to use Timer 2 as a baud-rate gen-erator

and a clock generator simultaneously. Note, however, that the baud-rate

and clock-out frequencies cannot be determined independently from one

another since they both use RCAP2H and RCAP2L

Interrupts

The AT89S52 has a total of six interrupt vectors: two external interrupts

(INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial

port interrupt. These interrupts are all shown in Figure 13-1. Each of these

interrupt sources can be individually enabled or disabled by setting or

clearing a bit in Special Function Register IE. IE also contains a global

disable bit, EA, which disables all interrupts at once. Note that Table 13-1

shows that bit position IE.6 is unimplemented. User software should not

write a 1 to this bit position, since it may be used in future AT89 products.

Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in

register T2CON. Nei-ther of these flags is cleared by hardware when the

service routine is vectored to. In fact, the service routine may have to

determine whether it was TF2 or EXF2 that generated the interrupt, and

that bit will have to be cleared in software. The Timer 0 and Timer 1 flags,

TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The

values are then polled by the circuitry in the next cycle. However, the Timer

2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer

overflows.

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting

amplifier that can be configured for use as an on-chip oscillator, as shown

in Figure 16-1. Either a quartz crystal or ceramic resonator may be used. To

drive the device from an external clock source, XTAL2 should be left

unconnected while XTAL1 is driven, as shown in Figure 16-2. There are no

requirements on the duty cycle of the external clock signal, since the input

to the internal clock-ing circuitry is through a divide-by-two flip-flop, but

minimum and maximum voltage high and low time specifications must be

observed.

Idle Mode

In idle mode, the CPU puts itself to sleep while all the on-chip peripherals

remain active. The mode is invoked by software. The content of the on-chip

RAM and all the special functions regis-ters remain unchanged during this

mode. The idle mode can be terminated by any enabled interrupt or by a

hardware reset. Note that when idle mode is terminated by a hardware reset,

the device normally resumes pro-gram execution from where it left off, up to

two machine cycles before the internal reset algorithm takes control. On-

chip hardware inhibits access to internal RAM in this event, but access to

the port pins is not inhibited. To eliminate the possibility of an unexpected

write to a port pin when idle mode is terminated by a reset, the instruction

following the one that invokes idle mode should not write to a port pin or to

external memory

Power-down Mode

In the Power-down mode, the oscillator is stopped, and the instruction that

invokes Power-down is the last instruction executed. The on-chip RAM and

Special Function Registers retain their values until the Power-down mode is

terminated. Exit from Power-down mode can be initiated either by a

hardware reset or by an enabled external interrupt. Reset redefines the

SFRs but does not change the on-chip RAM. The reset should not be

activated before VCC is restored to its normal operating level and must be

held active long enough to allow the oscillator to restart and stabilize.

Oscillator Connections

Programming the Flash – Parallel Mode

The AT89S52 is shipped with the on-chip Flash memory array ready to be

programmed. The programming interface needs a high-voltage (12-volt)

program enable signal and is compatible with conventional third-party Flash

or EPROM programmers. The AT89S52 code memory array is programmed

byte-by-byte.

Programming Algorithm:

Before programming the AT89S52, the address, data, and control signals

should be set up according to the “Flash Programming Modes” (Table 22-1)

and Figure 22-1 and Figure 22-2. To program the AT89S52, take the

following steps: 1. Input the desired memory location on the address lines.

2. Input the appropriate data byte on the data lines. 3. Activate the correct

combination of control signals. 4. Raise EA/VPP to 12V. 5. Pulse ALE/PROG

once to program a byte in the Flash array or the lock bits. The byte-write

cycle is self-timed and typically takes no more than 50 μs. Repeat steps 1

through 5, changing the address and data for the entire array or until the

end of the object file is reached.

Data Polling:

The AT89S52 features Data Polling to indicate the end of a byte write cycle.

Dur-ing a write cycle, an attempted read of the last byte written will result in

the complement of the written data on P0.7. Once the write cycle has been

completed, true data is valid on all outputs, and the next cycle may begin.

Data Polling may begin any time after a write cycle has been initiated.

Ready/Busy:

The progress of byte programming can also be monitored by the RDY/BSY

output signal. P3.0 is pulled low after ALE goes high during programming to

indicate BUSY. P3.0 is pulled high again when programming is done to

indicate READY.

Program Verify:

If lock bits LB1 and LB2 have not been programmed, the programmed code

data can be read back via the address and data lines for verification.

The status of the individ-ual lock bits can be verified directly by reading

them back. Reading the Signature Bytes:

The signature bytes are read by the same procedure as a nor-mal

verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7

must be pulled to a logic low. The values returned are as follows. (000H) =

1EH indicates manufactured by Atmel (100H) = 52H indicates AT89S52

(200H) = 06H

Chip Erase:

In the parallel programming mode, a chip erase operation is initiated by

using the proper combination of control signals and by pulsing ALE/PROG

low for a duration of 200 ns - 500 ns. In the serial programming mode, a

chip erase operation is initiated by issuing the Chip Erase instruction. In

this mode, chip erase is self-timed and takes about 500 ms. During chip

erase, a serial read from any address location will return 00H at the data

output.

Programming the Flash – Serial Mode The Code memory array can be

programmed using the serial ISP interface while RST is pulled to VCC. The

serial interface consists of pins SCK, MOSI (input) and MISO (output). After

RST is set high, the Programming Enable instruction needs to be executed

first before other operations can be executed. Before a reprogramming

sequence can occur, a Chip Erase operation is required. The Chip Erase

operation turns the content of every memory location in the Code array into

FFH. Either an external system clock can be supplied at pin XTAL1 or a

crystal needs to be connected across pins XTAL1 and XTAL2. The maximum

serial clock (SCK) frequency should be less than 1/16 of the crystal

frequency. With a 33 MHz oscillator clock, the maximum SCK frequency is 2

MHz.

Serial Programming Algorithm

To program and verify the AT89S52 in the serial programming mode, the

following sequence is recommended: 1. Power-up sequence: a. Apply power

between VCC and GND pins. b. Set RST pin to “H”. If a crystal is not

connected across pins XTAL1 and XTAL2, apply a 3 MHz to 33 MHz clock to

XTAL1 pin and wait for at least 10 milliseconds. 2. Enable serial

programming by sending the Programming Enable serial instruction to pin

MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs

to be less than the CPU clock at XTAL1 divided by 16. 3. The Code array is

programmed one byte at a time in either the Byte or Page mode. The write

cycle is self-timed and typically takes less than 0.5 ms at 5V. 4. Any

memory location can be verified by using the Read instruction which returns

the content at the selected address at serial output MISO/P1.6. 5. At the

end of a programming session, RST can be set low to commence normal

device operation. Power-off sequence (if needed): 1. Set XTAL1 to “L” (if a

crystal is not used). 2. Set RST to “L”. 3. Turn VCC power off.

Data Polling:

The Data Polling feature is also available in the serial mode. In this mode,

during a write cycle an attempted read of the last byte written will result in

the complement of the MSB of the serial output byte on MISO.

Chapter.4

Solar Panel, IR sensor

SOLAR PANEL

A solar panel (photovoltaic module or photovoltaic panel) is a packaged

interconnected assembly of solar cells, also known as photovoltaic cells. The

solar panel is used as a component in a larger photovoltaic system to offer

electricity for commercial and residential applications.

Because a single solar panel can only produce a limited amount of power,

many installations contain several panels. This is known as a photovoltaic

array. A photovoltaic installation typically includes an array of solar panels,

an inverter, batteries and interconnection wiring.

Photovoltaic systems are used for either on- or off-grid applications, and

for solar panels on spacecraft.

Fig: Solar panel

(A photovoltaic module is composed of individual PV cells. This crystalline-

silicon module has an aluminum frame and glass on the front.)

Theory and Construction:

Solar panels use light energy (photons) from the sun to generate electricity

through the photovoltaic effect (this is the photo-electric effect). The

structural (load carrying) member of a module can either be the top layer

(superstrate) or the back layer (substrate). The majority of modules

use wafer-based crystalline silicon cells or a thin-film cell based

on cadmium telluride or silicon. Crystalline silicon, which is commonly used

in the wafer form in photovoltaic (PV) modules, is derived from silicon, a

commonly used semi-conductor.

In order to use the cells in practical applications, they must be:

connected electrically to one another and to the rest of the system

Protected from mechanical damage during manufacture, transport,

installation and use (in particular against hail impact, wind and snow

loads). This is especially important for wafer-based silicon cells which

are brittle.

Protected from moisture, which corrodes metal contacts and

interconnects, (and for thin-film cells the transparent conductive

oxide layer) thus decreasing performance and lifetime.

Most modules are usually rigid, but there are some flexible modules

available, based on thin-film cells.

Electrical connections are made in series to achieve a desired output voltage

and/or in parallel to provide a desired amount of current source capability.

Diodes are included to avoid overheating of cells in case of partial shading.

Since cell heating reduces the operating efficiency it is desirable to minimize

the heating. Very few modules incorporate any design features to decrease

temperature; however installers try to provide good ventilation behind the

module.

New designs of module include concentrator modules in which the light is

concentrated by an array of lenses or mirrors onto an array of small cells.

This allows the use of cells with a very high-cost per unit area (such

as gallium arsenide) in a cost-competitive way.

Depending on construction, the photovoltaic can cover a range

of frequencies of light and can produce electricity from them, but sometimes

cannot cover the entire solar spectrum (specifically, ultraviolet, infrared and

low or diffused light). Hence much of incident sunlight energy is wasted

when used for solar panels, although they can give far higher efficiencies if

illuminated with monochromatic light. Another design concept is to split the

light into different wavelength ranges and direct the beams onto different

cells tuned to the appropriate wavelength ranges. This is projected to raise

efficiency by 50%. Also, the use of infrared photovoltaic cells can increase

the efficiencies, producing power at night.

Sunlight conversion rates (module efficiencies) can vary from 5-18% in

commercial production (solar panels), that can be lower than cell

conversion.

The current market leader in efficient solar energy modules is Sun Power,

whose solar panels have a conversion ratio of 19.3%,[3] with Sanyo having

the most efficient modules at 20.4%.[4] However, a whole range of other

companies (HoloSun, Gamma Solar, NanoHorizons) are emerging which are

also offering new innovations in photovoltaic modules, with a conversion

ratio of around 18%. These new innovations include power generation on

the front and back sides and increased outputs; however, most of these

companies have not yet produced working systems from their design plans,

and are mostly still actively improving the technology.

Crystalline Silicon Module :

Most solar module are currently produced from silicon PV cells. These

are typically categorized into

either monocrystalline or multicrystalline modules.

Thin-film modules: Third generation solar cells are advanced thin-film cells. They produce

high-efficiency conversion at low cost

Rigid thin-film modules:

In rigid thin film modules, the cell and the module are manufactured in the

same production line.

The cell is created on a glass substrate or superstrate, and the electrical

connections are created in situ, a so called "monolithic integration". The

substrate or superstrate is laminatedwith an encapsulant to a front or

back sheet, usually another sheet of glass.

The main cell technologies in this category are CdTe, or a-Si, or a-Si+uc-Si

tandem, or CIGS (or variant). Amorphous silicon has a sunlight conversion

rate of 6-12%.

Flexible thin-film modules

Flexible thin film cells and modules are created on the same production line

by depositing the photoactive layer and other necessary layers on a flexible

substrate.

If the substrate is an insulator (e.g. polyester or polyimide film)

then monolithic integration can be used.

If it is a conductor then another technique for electrical connection must be

used.

The cells are assembled into modules by laminating them to a transparent

colorless fluoropolymer on the front side (typically ETFE or FEP) and a

polymer suitable for bonding to the final substrate on the other side. The

only commercially available (in MW quantities) flexible module

uses amorphous silicon triple junction (from Unisolar).

So-called inverted metamorphic (IMM) multi junction solar cells made

on compound-semiconductor technology are just becoming commercialized

in July 2008. The University of Michigan's solar car that won the North

American Solar challenge in July 2008 used IMM thin-film flexible solar

cells.

The requirements for residential and commercial are different in that the

residential needs are simple and can be packaged so that as technology at

the solar cell progress, the other base line equipment such as the battery,

inverter and voltage sensing transfer switch still need to be compacted and

unitized for residential use. Commercial use, depending on the size of the

service will be limited in the photovoltaic cell arena, and more complex

parabolic reflectors and solar concentrators are becoming the dominant

technology.

The global flexible and thin-film photovoltaic (PV) market, despite caution in

the overall PV industry, is expected to experience a CAGR of over 35% to

2019, surpassing 32GW according to a major new study by IntertechPira.

Module embedded electronics:

Several companies have begun embedding electronics into PV modules.

This enables performing Maximum Power Point Tracking (MPPT) for

each module individually, and the measurement of performance data

for monitoring and fault detection at module level. Some of these

solutions make use of Power Optimizers, a DC to DC converter

technology developed to maximize the power harvest from solar

photovoltaic systems.

MODULE PERFORMANCE AND LIFETIME:

Module performance is generally rated under Standard Test

Conditions(STC):irradiance of1000 W/m²,solar spectrum of AM 1.5 and

module temperature at 25°C.

Electrical characteristics include nominal power (PMAX, measured in W), open

circuit voltage (VOC), short circuit current (ISC, measured

in amperes), maximum power voltage (VMPP),maximum power current (IMPP)

and module efficiency (%).

In kWp, kW is kilowatt and the p means “peak” as peak performance. The

“p” however does not show the peak performance, but rather the maximum

output according to STC.

Solar panels must withstand heat, cold, rain and hail for many years.

Many Crystalline silicon module manufacturers offer warranties that

guarantee electrical production for 10 years at 90% of rated power output

and 25 years at 80%

Advantages and Disadvantages of Solar Power:

Solar power gets a lot of press these days as a renewable energy source,

and it's natural to consider it as a potential way to power some or all of

your home. Let's take a look at some of the advantages and

disadvantages of solar power when looking at power sources for the

homeowner or small business.

The key selling point is that solar is a renewable resource. There are

other potential renewable power sources, such as wind and low head

hydroelectric, but solar seems to have a lot of attention. There are

actually several ways that are possible to leverage solar for power

generation. Once that has been around for decades is to use the solar

heat to directly generate heat for the home, traditionally this is

primarily for sourcing hot water in the home, or another recent use is

to heat swimming pool water. The other popular use for home energy is

to generate electricity using photoelectric cells. Photoelectric panels

have been used in specialized applications for years (that's how most

long term space vehicles/ satellites are powered.) Finally, there have

been a lot of improvements recently in generating electricity using

solar heat to generate steam and drive traditional turbines, but these

are on a scale that is not going to be practical for the homeowner for

years to come.

Advantages of Solar Power

Clean - Solar is a clean resource. Once the panels are in place, there is little

impact on the environment, especially if the panels are mounted on the roof

of a home or business. This does need to be balanced with the

environmental impact of making the solar panels. This is more true with

photoelectric, as these are semiconductors ( like the electronics of your TV

or sound system) which do have an environmental impact. For more on the

carbon footprint of making solar panel look here. Certainly there are no

greenhouse gas emissions from the ongoing operation of a solar panel.

Ubiquitous - We like to think that sunshine is everywhere. Practically

speaking though, it is more available in areas like the Southwest US,

basically closer to the equator is better. But however much you have, it is

there and not controlled by other businesses or countries.

Free - Once you have set up a solar panel and paid for the equipment, the

cost of the solar itself is free. They also tend to have a pretty low

maintenance cost, as there are often no moving parts.

Quiet - Unlike wind power, there is little or no noise from a solar panel.

Some of the very high efficiency panels track the sun as it goes through the

sky daily, but this is usually barely audible.

Aesthetics - Once again, unlike wind power which has a generator high in

the sky, solar panels are often installed flat on a roof, and so have very little

visual impact. If you were to go off grid, then there would also be no need for

power lines, but practically speaking many cities have underground utulity

lines anyhow, and with no lines you can't sell excess power back to the grid.

Disadvantages of Solar Power

High Initial Costs - Especially true for photoelectric panels, even with tax

credits the high initial costs make it difficult to see an economic payback in

a reasonable time frame.

Availability - In any application, solar is only available during the day. If

you are not trying to go off the grid, this is not necessarily a major problem,

because in most places, especially in the Southwest, the daylight hours are

when electricity demand surges to because of the need for cooling. But, for

solar to be the only source of energy for a home (or even for the solar heated

power plants), some way to store or flywheel the energy is needed.

Further there is the variability introduced by seasonal changes and cloudy

days, making the energy supplied from a solar system highly variable, a

characteristic that gives power engineers headaches.

Interconnect costs - Since solar electric generates lower voltage DC power,

in order to be used by typical household appliances, or to interconnect to

the the grid, some type of inverter is required to convert the power to 120 V

AC. For grid interconnect, this tends to be an expensive design, as there are

further constraints on the design (e.g. it needs to shut down when the grid

goes down, some type of net metering is needed, etc.)

Size - While there is a lot of solar energy, it is actually a relatively diffuse

power source (that's a good thing, otherwise we would burn to a crisp when

we went outside). Combine that with the very low efficiency of today's

photoelectric devices, and a solar panel system large enough to power a

home tends to be larger than the home, especially with the systems that are

mounted flat and do no tracking.

Solar power has many advantages, but it's not without its disadvantages.

But the state of the technology continues to improve, and we look forward to

the day when we can all have all the free power we need.

IR Remote Control Theory The cheapest way to remotely control a device within a visible range is via Infra-Red light.

Almost all audio and video equipment can be controlled this way nowadays. Due to this wide

spread use the required components are quite cheap, thus making it ideal for us hobbyists to

use IR control for our own projects.

This part of my knowledge base will explain the theory of operation of IR remote control,

and some of the protocols that are in use in consumer electronics.

Infra-Red Light Infra-Red actually is normal light with a particular colour. We humans can't see this colour

because its wave length of 950nm is below the visible spectrum. That's one of the reasons

why IR is chosen for remote control purposes, we want to use it but we're not interested in

seeing it. Another reason is because IR LEDs are quite easy to make, and therefore can be

very cheap.

Although we humans can't see the Infra-Red

light emitted from a remote control doesn't

mean we can't make it visible.

A video camera or digital photo camera can

"see" the Infra-Red light as you can see in this

picture. If you own a web cam you're in luck,

point your remote to it, press any button and

you'll see the LED flicker.

Unfortunately for us there are many more sources of Infra-Red light. The sun is the brightest

source of all, but there are many others, like: light bulbs, candles, central heating system, and

even our body radiates Infra-Red light. In fact everything that radiates heat, also radiates

Infra-Red light.

Therefore we have to take some precautions to guarantee that our IR message gets across to

the receiver without errors.

Modulation Modulation is the answer to make our signal stand out above the noise. With modulation we

make the IR light source blink in a particular frequency. The IR receiver will be tuned to that

frequency, so it can ignore everything else.

You can think of this blinking as attracting the receiver's attention. We humans also notice

the blinking of yellow lights at construction sites instantly, even in bright daylight.

In the picture above you can see a modulated signal driving the IR LED of the transmitter on

the left side. The detected signal is coming out of the receiver at the other side.

In serial communication we usually speak of 'marks' and 'spaces'. The 'space' is the default

signal, which is the off state in the transmitter case. No light is emitted during the 'space'

state. During the 'mark' state of the signal the IR light is pulsed on and off at a particular

frequency. Frequencies between 30kHz and 60kHz are commonly used in consumer

electronics.

At the receiver side a 'space' is represented by a high level of the receiver's output. A 'mark' is

then automatically represented by a low level.

Please note that the 'marks' and 'spaces' are not the 1-s and 0-s we want to transmit. The real

relationship between the 'marks' and 'spaces' and the 1-s and 0-s depends on the protocol

that's being used. More information about that can be found on the pages that describe the

protocols.

The Transmitter

The transmitter usually is a battery powered handset. It should consume as little power as

possible, and the IR signal should also be as strong as possible to achieve an acceptable

control distance. Preferably it should be shock proof as well.

Many chips are designed to be used as IR transmitters. The older chips were dedicated to

only one of the many protocols that were invented. Nowadays very low power

microcontrollers are used in IR transmitters for the simple reason that they are more flexible

in their use. When no button is pressed they are in a very low power sleep mode, in which

hardly any current is consumed. The processor wakes up to transmit the appropriate IR

command only when a key is pressed.

Quartz crystals are seldom used in such handsets. They are very fragile and tend to break

easily when the handset is dropped. Ceramic resonators are much more suitable here, because

they can withstand larger physical shocks. The fact that they are a little less accurate is not

important.

The current through the LED (or LEDs) can vary from 100mA to well over 1A! In order to

get an acceptable control distance the LED currents have to be as high as possible. A trade-

off should be made between LED parameters, battery lifetime and maximum control distance.

LED currents can be that high because the pulses driving the LEDs are very short. Average

power dissipation of the LED should not exceed the maximum value though. You should also

see to it that the maximum peek current for the LED is not exceeded. All these parameters

can be found in the LED's data sheet.

A simple transistor circuit can be used to drive the LED. A transistor

with a suitable HFE and switching speed should be selected for this

purpose.

The resistor values can simply be calculated using Ohm's law. Remember

that the nominal voltage drop over an IR LED is approximately 1.1V.

The normal driver, described above, has one disadvantage. As the battery

voltage drops, the current through the LED will decrease as well. This

will result in a shorter control distance that can be covered.

An emitter follower circuit can avoid this. The 2 diodes in series will

limit the pulses on the base of the transistor to 1.2V. The base-emitter voltage of the transistor

subtracts 0.6V from that, resulting in a constant amplitude of 0.6V at the emitter. This

constant amplitude across a constant resistor results in current pulses of a constant magnitude.

Calculating the current through the LED is simply applying Ohm's law again.

The Receiver Many different receiver circuits exist on the market. The most important selection criteria are

the modulation frequency used and the availability in you region.

In the picture above you can see a typical block diagram of such an IR receiver. Don't be

alarmed if you don't understand this part of the description, for everything is built into one

single electronic component.

The received IR signal is picked up by the IR detection diode on the left side of the diagram.

This signal is amplified and limited by the first 2 stages. The limiter acts as an AGC circuit to

get a constant pulse level, regardless of the distance to the handset.

As you can see only the AC signal is sent to the Band Pass Filter. The Band Pass Filter is

tuned to the modulation frequency of the handset unit. Common frequencies range from

30kHz to 60kHz in consumer electronics.

The next stages are a detector, integrator and comparator. The purpose of these three blocks

is to detect the presence of the modulation frequency. If this modulation frequency is present

the output of the comparator will be pulled low.

As I said before, all these blocks are integrated into a single

electronic component. There are many different manufacturers of

these components on the market. And most devices are available in

several versions each of which are tuned to a particular modulation

frequency.

Please note that the amplifier is set to a very high gain. Therefore the system tends to start

oscillating very easily. Placing a large capacitor of at least 22µF close to the receiver's power

connections is mandatory to decouple the power lines. Some data sheets recommend a

resistor of 330 Ohms in series with the power supply to further decouple the power supply

from the rest of the circuit.

There are several manufacturers of IR receivers on the market. Siemens, Vishay and

Telefunken are the main suppliers here in Europe. Siemens has its SFH506-xx series, where

xx denotes the modulation frequency of 30, 33, 36, 38, 40 or 56kHz. Telefunken had its

TFMS5xx0 and TK18xx series, where xx again indicates the modulation frequency the

device is tuned to. It appears that these parts have now become obsolete. They are replaced

by the Vishay TSOP12xx, TSOP48xx and TSOP62xx product series. Sharp, Xiamen Hualian

and Japanese Electric are 3 Asian IR receiver producing companies. Sharp has devices with

very cryptic ID names, like: GP1UD26xK, GP1UD27xK and GP1UD28xK, where x is

related to the modulation frequency. Hualian has it's HRMxx00 series, like the HRM3700

and HRM3800. Japanese Electric has a series of devices that don't include the modulation

frequency in the part's ID. The PIC-12042LM is tuned to 36.7kHz, and the PIC12043LM is

tuned to 37.9kHz.

Chapter.5

WORKING FLOW OF THE PROJECT

&

SCHEMATIC DIAGRAM

BLOCK DIAGRAM

Block diagram consists following modules:

• 8051 Microcontroller(AT89S52)

• Solar panel

• IR Sensors (Transmitter and Receiver)

• Buzzer

8051 Micro

Controller

BUZZER

IR Tx

IR Rx

Power Supply

Battery Power Supply

susupply

Solar Power supply

Working Flow of the project:

This project “Blind People navigation by SOLAR and Battery

charger” will be useful for the blind people to avoid the obstacles on their

way while moving. This project IR sensor sensors technology for detecting

the obstacles, and if any obstacle comes it will gives the buzzer sound and

alert the blind person to divert. And in this case the power supply will be

given from the solar and batter supply. This project will gives the low cost

solution to help the blind people for safe moving in the indoor as well as

outdoor.

Schematic Diagram :

REGULATED POWER SUPPLY

A variable regulated power supply, also called a variable bench

power supply, is one where you can continuously adjust the output

voltage to your requirements. Varying the output of the power supply

is the recommended way to test a project after having double checked

parts placement against circuit drawings and the parts placement

guide.

This type of regulation is ideal for having a simple variable bench

power supply. Actually this is quite important because one of the first

projects a hobbyist should undertake is the construction of a variable

regulated power supply. While a dedicated supply is quite handy e.g.

5V or 12V, it's much handier to have a variable supply on hand,

especially for testing.

Most digital logic circuits and processors need a 5 volt power supply.

To use these parts we need to build a regulated 5 volt source. Usually

you start with an unregulated power To make a 5 volt power supply,

we use a LM7805 voltage regulator IC (Integrated Circuit). The IC is

shown below.

The LM7805 is simple to use. You simply connect the positive lead of

your unregulated DC power supply (anything from 9VDC to 24VDC) to

the Input pin, connect the negative lead to the Common pin and then

when you turn on the power, you get a 5 volt supply from the Output

pin.

CIRCUIT FEATURES

Brief description of operation: Gives out well regulated +5V output,

output current capability of 100 mA

Circuit protection: Built-in overheating protection shuts down output

when regulator IC gets too hot

Circuit complexity: Very simple and easy to build

Circuit performance: Very stable +5V output voltage, reliable operation

Availability of components: Easy to get, uses only very common basic

components

Design testing: Based on datasheet example circuit, I have used this

circuit succesfully as part of many electronics projects

Applications: Part of electronics devices, small laboratory power supply

Power supply voltage: Unreglated DC 8-18V power supply

Power supply current: Needed output current + 5 mA

Component costs: Few dollars for the electronics components + the

input transformer cost

BLOCK DIAGRAM:

The above block diagram will shows the regulated power supply

in this the power supply can be given from 230V AC supply which will

be given to the 12v-0-12v step down transformer whose output voltage

12V AC. Again this voltage can be converted into DC voltage by using

the Bridge rectifier, but this voltage is a pulsating DC voltage and this

can be converting into pure DC by connecting the capacitors, and this

pure 12V DC will be given to the 7805 voltage regulators whose output

voltage is an 5V DC and this can be given to the microcontroller as a

power supply.

EXAMPLE CIRCUIT DIAGRAM:

WE CAN EVEN USE A USB CONNECTOR FOR THE REQUIRED

SUPPLY INSTEAD OF THE ABOVE CIRCUIT

Chapter.6

SOURCE CODE

Chapter.7

Keil software

1. Click on the Keil uVision Icon on DeskTop

2. The following fig will appear

3. Click on the Project menu from the title bar

4. Then Click on New Project

5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\

6. Then Click on Save button above.

7. Select the component for u r project. i.e. Philips……

8. Click on the + Symbol beside of Philips

9. Select AT89S52 as shown below

10. Then Click on “OK”

11. The Following fig will appear

12. Then Click either YES or NO………mostly “NO”

13. Now your project is ready to USE

14. Now double click on the Target1, you would get another option

“Source group 1” as shown in next page.

15. Click on the file option from menu bar and select “new”

16. The next screen will be as shown in next page, and just maximize it

by double clicking on its blue boarder.

17. Now start writing program in either in “C” or “ASM”

18. For a program written in Assembly, then save it with extension “.

asm” and for “C” based program save it with extension “ .C”

19. Now right click on Source group 1 and click on “Add files to Group

Source”

20. Now you will get another window, on which by default “C” files will

appear.

21. Now select as per your file extension given while saving the file

22. Click only one time on option “ADD”

23. Now Press function key F7 to compile. Any error will appear if so

happen.

24. If the file contains no error, then press Control+F5 simultaneously.

25. The new window is as follows

26. Then Click “OK”

27. Now Click on the Peripherals from menu bar, and check your

required port as shown in fig below

28. Drag the port a side and click in the program file.

29. Now keep Pressing function key “F11” slowly and observe.

30. You are running your program successfully

Chapter.8

CONCLUSSION

This project “Blind People navigation by SOLAR and Battery charger” has been successfully designed and tested.

It has been developed by integrating features of all the hardware

components used. Presence of every module has been reasoned out and

placed carefully thus contributing to the best working of the unit.

Secondly, using highly advanced IC’s and with the help of growing

technology the project has been successfully implemented.

Chapter.9

BIBLIOGRAPHY

BIBLIOGRAPHY

The 8051 Micro controller and Embedded Systems -Muhammad Ali Mazidi Janice Gillispie Mazidi

The 8051 Micro controller Architecture, Programming & Applications

-Kenneth J.Ayala

Fundamentals Of Micro processors and Micro computers

-B.Ram

Micro processor Architecture, Programming & Applications

-Ramesh S.Gaonkar

Electronic Components

-D.V.Prasad

Wireless Communications - Theodore S. Rappaport

Mobile Tele Communications - William C.Y. Lee

References on the Web:

www.national.comwww.nxp.comwww.8052.com www.microsoftsearch.comwww.geocities.com