Op Sy 03 Ch 32

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Ceng 334 - Operating Systems 3.2-1

Chapter 3.2 : Virtual Memory

• What is virtual memory?

• Virtual memory management schemes• Paging

• Segmentation

• Segmentation with paging

• Page table management

Chapter 3.2: Virtual Memory

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Problems with Memory Management Techniques so far

1. Unused (wasted) memory due to fragmentation

2. Memory may contain parts of program which are not used during a run (ie., some routines may not be accessed in that particular run)

3. Process size is limited with the size of physical memory

Problems With Memory Mang.

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Virtual Memory (VM)

Virtual memory of process on disk

Real memory of system

Map (translate)

virtual address to real

Virtual Memory

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Virtual Memory (VM)

• VM is conceptual

• It is constructed on disk

• Size of VM is not limited (usually larger than real memory)

• All process addresses refer to the VM image

• When the process executes all VM addresses are mapped on to real memory

Virtual Memory

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Did We Solve the “Problems”?

1. Unused (wasted) memory due to fragmentation (We’ll see!)

2. Memory may contain parts of program which are not used during a run

– YES! Virtual memory contents are loaded into memory on demand

3. Process size is limited with the size of physical memory

– YES! Process size can be larger than real memory

Problems Solved?

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(Pure) Paging

• Virtual and real memory are divided into fixed sized pages

• Programs are divided into pages

• A process address (both in virtual & real memory) has two components

Page # Offset within page

Pagging

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Paging (Cont.)

• When process pages are transferred from VM to real memory, page numbers must be mapped from virtual to real memory addresses

• This mapping is done by software & hardware

• When the process is started only the first page (main) is loaded. Other pages are loaded on demand

Pagging

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Interpretation of an Address

• 16 bits for addressing means that the memory addressed is 64K bytes (0000 -FFFF)

• Suppose page size is 4K bytes (12 bits)

• The memory has 16 pages (4 bits)

• Example : address : 7 F B C

111 1111 1011 1100

Page # Offset

Intyerpretation Of an Address

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Page Tables

• Index of page table is the virtual page #

Page Table

0 Page frame #

Page protection

Reference bit

Modification bit

Validity bit

Page Table Entry

1

8

234567

Page Tables

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Page Table Entry Fields

• Validity bit is set when the page is in memory

• Reference bit is set set by the hardware whenever the page is referred

• Modified bit is set whenever the page is modified

• Page-protection bits set the access rights (eg., read, write restrictions)

Page Table Entry Fields

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Address Mapping in Paging

Real memory address

Page tables of processes

PTn

PT 1

PT2. .

Page # Offset within pagePage Table Register

+

Catenate

Virtual memory address

Adrress Mapping

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Address Mapping in Paging (Cont.)

• During the execution every page reference is checked against the page map table entry

• If the validity bit is set (ie., page is in memory) execution continues

• If the page is not in memory a page fault (interrupt - trap) occurs and the page is fetched into memory

• If the memory is full, pages are written back using a page replacement algorithm

Address Mapping

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Memory Management Problems : Re-visit due to paging

1. Unused (wasted) memory due to fragmentation– ONLY on the last page (Page Break)

2. Memory may contain parts of program which are not used during a run – Virtual memory contents are loaded into memory on demand

3. Process size is limited with the size of physical memory– Process size can be larger than real memory

• Furthermore, program does not occupy contiguous locations in memory (virtual pages are scattered in real memory)

Re-visst Due to Pagging

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Segmentation

• Pages are fixed in size, segments are variable sized

• A segment can be a logical entity such as– Main program

– Some routines

– Data of program

– File

– Stack

Segmentation

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Segmentation (Cont.)• Process addresses are now in the form

Segment # Offset within segment

• Segment Map Table has one entry for each segment and each entry consist of

– Segment number

– Physical segment starting address

– Segment length

Segmentation

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Problems with Segmentation

• Similar problems in dynamic partitioning

– Fragmentation in real memory

– Relocation is necessary for compaction

Problems with Segmentation

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Segmentation with Paging

• Segmentation in virtual memory, paging in real memory

• A segment is composed of pages

• An address has three components

Page # Offset within pageSegment #

• The real memory contains only the demanded pages of a segment, not the full segment

Segmentation with Paging

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Addressing in Segmentation with Paging

Segment Table Page Tables Pages

Page # Offset within pageSegment #

Addressing in Segmentation

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How Big is a Page Table?

• Consider a full 2 32 byte (4GB) address space

– Assume 4096 byte (2 12 byte) pages

– 4 bytes per page table entry

– The page table has 2 32/2 12 (= 2 20 ) entries (one for each page)

– Page table size would be 2 22 bytes (or 4 megabytes)

Page Table

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Problems with Direct Mapping?

• Although a page table is of variable length depending on the size of process, we can not keep them in registers

• Page table must be in memory for fast access

• Since a page table can be very large (4MB), page tables are stored in virtual memory and be subjected to paging like process pages

Direct Mapping

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How to Solve?

• Two-level Lookup

• Inverted Page Tables

• Translation Lookaside Buffers

How to Solve?

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Two-Level Lookup

Directory Page Offset

12 bits - 4096 Byte pages

10 bits - 1024 pages

10 bits - 1024 directories

Virtual Address - 32 bits (4 GB)

Two-Level Lookup

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Two-Level Lookup (Cont.)

Dir Page Offset

+

+

Physical Address

Page Directory

Page Table

Two-Level Lookup

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Two-Level Lookup (Cont.)

• A process is represented by one or more entries of the page directory (ie., several page tables)

• Typically a page table size is set as one page which makes swapping easier

• This is one of the addressing schemes used by Intel family of chips (Intel chips can use paging, segmentation or a combination of both)

Two-Level Lookup

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Inverted Page Tables

Page # Offset within page

Virtual Address

hash

Hash TablePage Frame Table


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Inverted Page Tables (Cont.)

• The virtual page number is hashed to point to a hash table

• The hash table contains a pointer to the inverted page table

• Inverted page table contains page table entries (one for each real memory page)

• Entries having the same hash codes are chained

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Inverted Page Tables (Cont.)

• A fixed portion of memory is used for mapping regardless of the number of processes or virtual pages

• This approach is used by IBM’s AS/400 and RISC System/6000 computers

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Translation Lookaside Buffer



Frame # Offset

TLB Hit

TLB Miss

TLB

Page Table

Page # Offset

Virtual Address

Real AddressPage Fault

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Translation Lookaside Buffer (Cont.)

• Translation lookaside buffer (TLB) is a cache for page table entries

• TLB contains page table entries that have been most recently used

• Whenever the page table is referred (TLB miss), the page table entry is also copied to the TLB

• TLB is usually an associative memory (content addressable memory)

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Op Sy 03 Ch 32