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Graph Theory Presented By: Abhishek Pachisia B.Tech-IT(V Sem) 090102801

Matrix Representation Of Graph

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Page 1: Matrix Representation Of Graph

Graph Theory

Presented By:Abhishek PachisiaB.Tech-IT(V Sem)

090102801

Page 2: Matrix Representation Of Graph

IntroductionGraph is a set of edges and vertices.

Graph can be represented in the form of matrix.

Different matrix that can be formed are:

1. Incidence Matrix

2. Adjacency Matrix

3. Cut-Set Matrix

4. Circuit Matrix

5. Path Matrix

Page 3: Matrix Representation Of Graph

Incidence MatrixEdge connected to the vertex is known as incidence edge to that vertex.

If vertex is incident on vertex then put 1 else 0.

V6

V4

V5V2

V3

h

egc

f

d

V1 a

b

aij =1, if edge ej is incident on vertex vi

=0, otherwise

0 000 101 011 010 00

1 011 10 10

1

d fea cb

V4

V1V2V3

g h

0011

0000

Edges

Ver

tex

1 110 000 00

0 00V6V5 1

011

Vertex123456

Edgesa, ba, b, c, fc, d, gd, ed, e, f, g, hh

Page 4: Matrix Representation Of Graph

Adjacency Matrix If two vertices are connected by single path than they are known as adjacent vertices.

If vertex is connected to itself then vertex is said to be adjacent to itself.

If vertex is adjacent then put 1 else 0.

V6

V4

V5V2

V3

h

egc

f

d

V1 a

b

0 000 011 011 011 100 10

0 100 110 00

0 011 10 01

0

V4

V6V5V1 V3V2

V1V2V3V4V5V6

Vertices

Ver

tice

s

Page 5: Matrix Representation Of Graph

Cut-Set Matrix

V6

V4

V5V2

V3

h

egc

f

d

V1 a

b

Cut set is a “Set of edges in a graph whose removal leaves the graph disconnected”.

If edge of graph is a part of given cut set then put 1 else 0.

1 100 010 000 001 01

0 000 10 00

0

d fea cb

4

123

g h

1100

0010

Edges

Cut

Set

s

Cut Set1234

Edgesf, g, dc, g, eha, b

Cij =1, if jth cutset contains edge =0, otherwise

Page 6: Matrix Representation Of Graph

Circuit Matrix

V6

V4

V5V2

V3

h

egc

f

d

V1 a

b

Circuit can be defined as “A close walk in which no vertex/edge can appear twice”.

If edge of graph is a part of given circuit then put 1 else 0.

1 010 101 110 001 01

0 000 10 10

0

d fea cb

4

123

g h

1100

0000

Edges

Cir

cuit

s

Circuit1234

Edgesd, e, gc, f, gc, d, e, fa, b

Cij =1, if circuit contains edge =0, otherwise

Page 7: Matrix Representation Of Graph

V6

V4

V5V2

V3

h

egc

f

d

V1 a

b

Path can be defined as “A open walk in which no vertex/edge can appear twice”.

If edge of graph is a part of given path then put 1 else 0. Path123456

Edgesa, f, ha, c, g, ha, c, d, e, hb, f, hb, c, g, hb,c, d, e, h

P( Vj,Vi)=1,if edge is on path =0, otherwise

Ex: P ( V1,V6)

0 100 001 010 100 01

1 001 11 10

0

d fea cb

4

123

g h

0100

1111

EdgesPa

ths

0 001 010 11

0 1165 1

011

Path Matrix

Page 8: Matrix Representation Of Graph

ThankYou