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A well designed flexible interfaces will be required to ensure compatibility and extend design options.
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DEFINITION AND COMPONENTS OF INTERFACECLASSIFICATION OF DATA TRANSFER SCHEMES: PROGRAM CONTROLLED TRANSFER
INTERRUPT DRIVEN TRANSFER PERIPHERAL CONTROL TRANSFER
CHAPTER 1 Introduction to Interfacing
Techniques &Data Transfer Schemes
Interfacing
Why? microcomputer revolution will continue into the
future many will be required to specify and integrate
microprocessors into products or systems in their own disciplines
well-designed flexible interfaces will be required to ensure compatibility with other equipments and to extend design options
interfaces are the last items to be seriously considered in the race of new technology
it deals with the systematic study of microprocessor interfaces and their applications in many diversified fields
In this subject students learn how to interface microprocessors, and hence microcomputers and other related equipments, to external digital or analog devices.
μP
progress has advanced at a pace perhaps unparallel in scientific history since its introduction in 1971
there have been four generations of microprocessors
the number of devices per chip has increased by a factor of 2000, the clock frequency by a factor of 1000
the overall throughput of the microprocessor has increased by hundred or several hundreds of magnitudes
Developing a microprocessor (μP)-based system represents one of the most difficult tasks that can confront an engineer. Advances in microprocessor architectures and capabilities are forcing changes in development systems and the ways in which they develop microcode instructions. Also, all μP architectures are not created equal when it comes to providing designers with the tools they need for effective systems resource management.
Therefore, a well designed flexible interfaces will be required to ensure compatibility and extend design options.
Definitions:
Microprocessor - The central unit of a microcomputer that contains logical elements for manipulating data and performing arithmetic or logical operations. A single chip may contain RAM, ROM, and PROM memories, clocks, and interfaces for memory and I/O device.
Microprogramming- A method for controlling the operation of the CPU in which each complete instruction starts the execution of a sequence of instructions, called microinstructions, which are at a more elementary level.
Multiprocessor- As defined by ANSI, it is a computer employing two or more processing units under integrated control. Although this definition may be correct, it is not complete enough to be too helpful.
There are other important features that include both hardware and software. A multiprocessor will be defined as a system with: a) two , or more processing units, b)shared memory, and c) shared I/0.
Interface Definitions
Interface a shared boundary between system elements
defined by common physical interconnection characteristics, signal characteristics, and meanings of interchanged signals.
is a tool and concept that refers to a point of interaction between components, and is applicable at the level of both hardware and software.
allows a component to function independently while using interfaces to communicate with other components via an input/output system and an associated protocol.
Cont…
Interface Device
A device that meets the interface specifications on one side of an interface.
The term is usually applied to a device through which a system or equipment works to meet interface specifications.
Interface Specification a set of technical requirements that must be met
at an interface.
Direct Memory Access A technique that permits a peripheral device to
enter or extract blocks of data from the memory without involving the central processing unit. In some cases, the CPU can perform other functions while the data transfers occur.
Components of Interface
Interface Signals
Interface Signals
Interfacing Device
(ID 1)
Interfacing Device
(ID 2)
Interfacing Standards &
Converters
The interfacing devices should make use of standard data transfer schemes for the efficient exchange of data.
Data Transfer Schemes
refers to the method of data transfer between the processor and peripheral devices:
microprocessor and memorymicroprocessor and I/O devicesmemory and I/O devices
For effective data transfer between these devices, the timing parameters of the devices should be matched.
But most of the devices have incompatible timings.
Two Categories:
1. Programmed data transfer.
2. Direct memory access data transfer.
Programmed Data Transfer
a memory resident routine (subroutine) requests the device for data transfer to or from one of the processor register
scheme is used when a relatively small amount data are to be transferred
usually one byte or word of data is transferred at a time
Examples of devices using parallel data transfer are ADC,DAC, Hex-keyboard, 7-segment LED's, etc.
3 Types of Programmed Data Transfer
The scheme can be further classified into the following:
1. Synchronous data transfer scheme.2. Asynchronous data transfer scheme.3. Interrupt driven data transfer scheme.
Direct Memory Access (DMA) Data Transfer
the processor is forced to hold state by an I/O device until the data transfer between the device and the memory is completed
the processor does not execute any instructions during the hold period
is used for large block of data transfer between I/O device and memory
Typical examples of devices using DMA are CRT controller, floppy disk, hard disk, high speed line printer, etc
3 Types of DMA Data Transfer
The schemes are:
1. Cycle stealing DMA.2. Block or Burst mode DMA.3. Demand transfer mode DMA.
Types of Data Transfer Schemes
PROGRAM CONTROLLED TRANSFER
the transfer of data is completely under the control of the microprocessor program
data transfers can take place synchronously or asynchronously
an i/o operation takes place only when an i/o instruction is encountered in the execution of the program
synchronous transfers mean transfers occurring at the
same time
asynchronous transfers mean transfers taking place
at irregular intervals
Data transfers between the microprocessor and the peripherals are primarily asynchronous
Program controlled data transfers can take place under several conditions
Unconditional
Polling
Interrupt
With ready signal
With handshake signals
assumes that a peripheral is always available
kept in a loop to check whether data are available
interrupted from its normal execution of program by an I/O device, when the latter is
ready
when peripheral response time is slower than the microprocessor execution time, READY
signal is used
handshake signals are signals exchanged prior to data transfer
Synchronous data transfer scheme
is the simplest of all data transfer schemes
the processor does not check the readiness of the device
I/O device or peripheral should have matched timing parameters
the mode-O input or output in 8155 or 8255 is an example of synchronous data transfer
Asynchronous Data Transfer Schemes
is employed when the speed of processor and I/O device does not match
the processor ends a request to the device for read/write operation then the processor keeps on
polling the status of the device
once the device is ready, the processor executes a data transfer instruction to complete the process
to implement this scheme, the device should provide a signal which may be tested by the processor to ascertain whether it is ready or nothandshake data transfer without interrupt (mode-l and mode-2) of8155 or 8255 is
an example
Interrupt Driven Data Transfer Scheme
is the best method of data f transfer for effectively utilizing the processor time
the processor first initiates the I/O device for data transfer. After initiating the device, the processor will continue the execution of instructions in the program. Also at the end of an instruction the processor will check for a valid interrupt signal. If there is no interrupt then the processor will continue the execution.
When the IO device is ready, it will interrupt the processor. On receiving an interrupt signal, the processor will complete the current instruction execution and saves the processor status in stack. Then the processor call an interrupt service routine (ISR) to service the interrupted device.
when the processor call an interrupt service routine (ISR) to service the interrupted device. At the end of ISR the processor status is retrieved from stack and the processor starts executing its main program.
PROGRAM CONTROLLED DMA TRANSFERS
In DMA transfer, the microprocessor is forced to hold on by an I/O device until the data transfer is complete
In programmed data transfer, a memory resident routine requests the device for data transfer to and from one of the microprocessor registers
Programmed data are used when relatively small amounts of data are transferred using relatively slow I/O devices such AID, D/A converters, and peripheral floating point arithmetic unit.
DMA is preferred when a large block of data is to be transferred. This scheme is generally employed for transferring data between the microprocessor and peripheral mass storage devices like hard disk or a high-speed line printer.
INTERRUPT PROCESS IN MICROCOMPUTERS
8085FIVE pins on the chip for
implementing the interrupt process
PIN NO Name 6 TRAP 7 RST 7.5
8 RST 6.5 9 RST 5.5 10 INTR.