2MVL 4.2 FPGA Based System Design
Friday, April 7, 2023Manish Singhal1
Presented By
Manish SinghalAssociate Professor, PCE, Jaipur
FPGA Based System Design
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Text / References BooksField Programmable Gate Arrays - Stephen D.
Brown / Robert J. Francis
FPGA Based System Design - Wayne Wolf
Digital System Design using Programmable Logic Devices - Parag K Lala
FPGA Based System Design
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Syllabus
Unit -1 Evolution of Programmable Device
Unit -2 FPGA TechnologyUnit -3 Technology mapping in FPGAsUnit -4 Routing for FPGAs Unit -5 Logic Block ArchitectureFPGA Syllabus.doc
..\..\Scheme & Syllabus\VLSI\Syllabus.pdf
Overview of Syllabus unit wise
Unit 1 Introduces FPGA technology. It defines an FPGA to be a user programmable IC, consisting of a set of logic blocks that can be interconnected by general routing resources. At the same time it also focus on the evolution of different type of programmable devices. Also we define the applications of FPGA and the basic Implementation process.
Unit 2 Provides a survey of commercial FPGA devies.This includes description of the chip architectures & the basic technologies needed to achieve the programmability.
Unit 3 Deals with Computer-Aides Design(CAD)tasks known as “Technology Mapping” , which determines how a given logic circuit can be implemented using the logic blocks available in particular FPGA. Examples are included of technology mapping algorithms for FPGA.
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Overview of Syllabus unit wise
Unit 4 This chapter focuses on the CAD routing problem in FPGAs ,where the interconnections between the logic block are realized. Examples of two routing algorithms e.g. 1-Segmented Routing & K-Segmented Routing for two different types of FPGA are presented.
Unit 5 Considers the design of the logic blocks and it’s effect on the speed and logic density of logic circuits. It also gives the results of several recent studies on this topic.
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Unit -1Evolution of Programmable Devices
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Evolution of Programmable Devices
• Programmable devices play a key role in the design of digital hardware. They are general-purpose chips that can be configured for vide variety of applications
• Introduction to AND-OR structured Programmable Logic Devices- PROM, PLA, PAL and MPGAs;
• Combinational and sequential circuit realization using PROM based Programmable Logic Element (PLE);
• Architecture of FPAD, FPLA, FPLS and FPID devices.
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PROM(Cont...) 2) Field programmable:- field programmable
connections involves some sort of programmable switches like Fuse which is always slower then the hard wired connections.
Advantages of Field programmable are:-• They are less expensive at low volumes then the mask
programmable.• They can be programmed immediately ,in minutes
where as mask programmable devices must be manufactured in foundry over a period of week, months or year.
The application of PROM are best suited for implementing the Computer Memories.
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PLDs or Programmable Logic Device
Another type of programmable devices designed specifically for implementing logic circuits are Programmable Logic Device(PLD).
Any type of PLD comprises an array of AND gates connected to an array of OR gates. So a logic circuit implemented using PLD is represented in sum-of-product form.
Two most basic versions of PLD are:- a) Programmable Array Logic (PAL). b) Programmable Logic Array (PLA).• PAL consist of a programmable AND plane followed by a
Fixed OR-plane. It also offers the advantages of field programmability.
• A more flexible version of PAL is PLA which also comprises of AND plane followed by OR plane, but here connections to both the planes are programmable.
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Evolution of Programmable Devices
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Introduction to AND-OR structured Programmable Logic Devices - PROM, PLA, PAL
INPUTS
OUTPUTS
Fix ProgrammablePROM AND ORPAL OR ANDPLA - AND, OR
Evolution of Programmable Devices
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AND Plane
OR Plane
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Evolution of Programmable Devices
PLAs are available in both mask-programmable and field-programmable versions.
With these two level simple structures, it allows high speed performance implementation of logic circuits.
But the main drawback with this simple structure is that they can only implement small logic circuits that can be represented with the modest number of product terms.
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Mask Programmable Logic circuit- MPGA
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MPGAIn an MPGA ,all the mask layers that defines the circuitry
of the chip are pre-defined by the manufacturer ,except those that specify the final metal layers. These metal layers are customized to connect the transistors in the array ,thereby implementing the desired circuits.
The main advantage of MPGA over PLDs is that they provide a general structure that allows the implementation of much larger circuits.
On the other hand ,since MPGAs are mask programmable, they require significant manufacturing time and high initial cost.
Thus comes the FPGA for rescue since it combines the programmability of a PLD and the scalable interconnection structure of an MPGA.
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Mask Programmable Logic circuit- MPGA
I/O pads
Pre –fabricated Transistor
Routing
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Combinational and sequential circuit realization using PROM based Programmable Logic Element (PLE
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Programmable elements are – Fuse Anti Fuse Switch – (SRAM, EPROM, EEPROM) Volatile (SRAM) Non-volatile (EPROM, EEPROM)
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Summary of Programming TechnologiesFusible Link is generally a Connected switch.
Anti-Fuse is a programming element switch which is fabricated as a normally open disconnection(open), and which makes a connection(closes) when a high voltage is applied across its terminals. The anti-fuse has advantage over a fuse that most connections in an FPGA should be open, so the anti-fuse leaves most programming points in the proper state.
In short, in SRAM technology for programming the FPGA ,programmable connections are made using pass-transistors, transmission gates, or multiplexers that all are controlled by SRAM cells.
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Summary of Programming TechnologiesEPROM transistors are used in FPGAs in different manner
then in anti-fuse or SRAM .Here EPROM transistors are used as “Pull down” devices for logic block inputs.(word line , bit line concept).
The advantage of EPROM transistors is that they do not need an external storage. But unlike SRAM,EPROM transistors can not be re-programmed in-circuit.
The EEPROM approach is similar to EPROM technology except that EEEPROM transistors can be re-programmed in-circuit.
The disadvantage is that EEPROM transistors require twice the chip area in compare to EPROM
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Architecture of FPAD, FPLA, FPLS and FPID devices
FPAD or FPAA Field Programmable Analog Device/ Array • FPAA is analog IC which is equivalent of FPGA. It
contain a small no. of CAB (Configuration Analog Block).
• CAB contain operational amplifier, programmable capacitor array and resistor array for configurable switches for switched capacitor circuits.
• can be used to support adaptive mobile communication systems, FPADs are an efficient technology for low frequency front-end transceiver circuits
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FPAD or FPAAField Programmable Analog Device/ Array
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Switch Matrix built by floating gate transistor
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FPAA Architecture- A different approach Friday, April 7, 202330 Manish Singhal
Routing ArchitectureRouting ArchitectureFPAA
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• Continuous Time Signals• Discrete Time Signals
Discrete Time Signals• Switched Capacitor Design (Current)• Pulse Based Design (Under Research)
CAB ImplementationCAB ImplementationFPAA
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Switched Capacitor Based Switched Capacitor Based DesignDesign
FPAA
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FPLAField Programmable Logic Array
And/Or/Invert architecture with three level fusing
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FPLSField Programmable Logic Sequencer
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FPID(FPIC)Field Programmable Interconnect devices(chips)
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FPID(FPIC)Field Programmable Interconnect devices(chips)An FPIC is not really a logic device but
rather a programmable "wiring" device. Through programming, an FPIC connects one pin on the device to another on the device providing programmable interconnect.
FPICs use either SRAM or anti-fuse programming technology.
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FPID(FPIC)Field Programmable Interconnect devices(chips)
Multi FPGAs connected via FPICs
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Unit -1Evolution of Programmable DevicesWe Covered ...........
Introduction to AND-OR structured Programmable Logic Devices- PROM, PLA, PAL and MPGAs;
Combinational and sequential circuit realization using PROM based Programmable Logic Element (PLE);
Architecture of FPAD, FPLA, FPLS and FPID devices.
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