Towards Power-Efficient Smartphones by Energy-Aware Dynamic TaskScheduling
Meikang Qiu1,β, Zhi Chen1, Laurence T. Yang2, Xiao Qin3, Bin Wang4
1 Dept. of Electrical and Computer Engineering, University of Kentucky, Lexington, KY 40506, USA2 Dept. of Computer Science, St. Francis Xavier University, Antigonish, NS, B2G 2W5, Canada
3 Dept. of Computer Science and Software Engineering, Auburn University, Auburn, AL 36849, USA4 Dept. of Computer Science and Engineering, Wright State University, Dayton, OH 45435, USA
AbstractβSmartphones are facing a grand challenge inextending their battery life to sustain an increasing levelof processing demand while subject to miniaturized formfactor. Dynamic Voltage Scaling (DVS) has emerged as acritical technique to leverage power management by loweringthe supply voltage and frequency of processors. In thispaper, based on the DVS technique, we propose a novelEnergy-aware Dynamic Task Scheduling (EDTS) algorithmto minimize total energy consumption for smartphones whilesatisfying stringent time constraints for applications. This al-gorithm utilizes the results from a static scheduling algorithmand aggressively reduces energy consumptions on the fly.Experimental results indicate that the EDTS algorithm cansignificantly reduce energy consumption for smartphones,compared to the critical path scheduling method and theparallelism-based scheduling algorithm.
Keywords-Smartphone, DVS, dynamic scheduling, criticalpath, real-time
I. INTRODUCTION
With the unprecedented popularity of battery-poweredsmartphones in recent years, modern computation, commu-nication, and entertainment are increasingly moving ontothese devices. Meanwhile, the ever increasing demandsin rich interactive applications, such as digital cameras,multimedia, GPS navigation units, and web browsers,have severely aggravated energy consumption problemfor smartphones. Miniaturization is another vital featureof current smartphones. While the deep sub-micron tonanometer fabrication technique is an enabler to reducethe size of smartphones, this technology also exacerbatesthe energy consumption problem.
In order to enhance energy efficiency and process vari-ous tasks with different performances requirements, high-end smartphones are designed as heterogeneous systems,
β Meikang Qiu is the corresponding author. [email protected]
Figure 1: A typical architecture for smartphones.
which integrate multiple processors with distinct process-ing power, such as PowerVR SGX 5XT from Imagination[1]. Although multiprocessors can offer greater computa-tion per unit of power, leading to longer battery life [2],it is critical to investigate tighter energy budget strategiesto guarantee functionalities of smartphones.
Most applications on smartphones are not delay-tolerant,and acceleration of them is often at higher expenses ofenergy consumption. In order to balance performance andpower consumption for these applications, smartphonesare usually designed with Dynamic voltage scaling (DVS)by integrating static CMOS logic into microprocessors[3]β[5]. DVS is a powerful technique to reduce energyconsumption, and widely employed in various embeddedsystems. With the aid of this technology, different perfor-mance levels for applications can be achieved by adjustingthe operating frequency of processors. By introducingmodel-set instructions, the voltage supply can be switchedbetween several voltage modes, which makes it possibleto implement DVS by software. Typically, DVS can beexclusively implemented in existing Real-time OperatingSystems (RTOSs).
In this paper, we focus on optimizing energy consump-tion for heterogeneous smartphones while satisfying time-
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DOI 10.1109/HPCC.2012.214
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2012 IEEE 14th International Conference on High Performance Computing and Communications
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constraints of applications.We propose an Energy-awareDynamic Task Scheduling (EDTS) to examine task com-munications online and minimize total energy consumptionbased on DVS techniques. For example, Figure 1 showsthe basic architecture for smartphones, we implement ourtechniques in the OS level. This algorithm utilizes theresults from a static scheduling algorithm and attemptsto aggressively reduce energy consumption. Experimentalresults show that compared to the critical path schedulingmethod and the parallelism-based scheduling approach,our online scheduling mechanism can reduce total energyconsumption by 23.1% and 34.2% on average, respec-tively, while meeting the given timing constraints.
The major contributions of this paper are four-fold: (1)we propose a dynamic scheduling algorithm for dealingwith the runtime variations; (2) we use a critical path basedstatic scheduling algorithm Data Flow Graph Critical Path(DFGCP) to obtain near-optimal solutions; (3) we proposean optimal algorithm Critical Path Assignment (CPA) forthe critical path with a dynamic programming approach;(4) we consider both overheads for the voltage leveltransfer and the communication cost between differenttasks, based on DVS power models.
II. RELATED WORK
In the past few years, numerous methodologies for low-power smartphone system design have been proposed atoperating system level [2], [6] as well as architecture level[7]. A scheduler was proposed in [2] to monitor workloadsfor systems and adaptively schedule real-time tasks whileconsidering the worst-case CPU demands. Through modi-fication of the real-time scheduler and task managementservices in operating systems, this scheduler can boostsystem performance and save power consumption forheavy workloads and critical tasks. Targeting multimediaapplications, the authors in [6] proposed a soft real-time CPU scheduler for mobile devices to reduce energyconsumption. While these studies focus on independenttasks, we consider dependencies and real-time constraintsbetween tasks.
A myriads of endeavors have been put forward intackling runtime variations with DVS. For example, Gruian[8] applied a stochastic DVS technique on hard real-time systems by taking into account task dependencies.Depending on the probability distribution of the executionconditions for tasks, Lorch and Smith [9] proposed anapproach to modify scaling algorithms while maintainingtheir performance. However, these methods assume task
priorities and estimate CPU requirements off-line. Wepropose a two-phase scheduling algorithm, EDTS, whichschedules tasks online based on the static schedulingresults of an initial scheduling.
Energy-aware static scheduling is usually based onthe information of the average case or worst case taskexecution estimation [10]. At runtime, the real executiontime and energy consumption may exhibit high variations[11], [12], due to process variability, physical faults, andvoltage/frequency changes. In our model, we expect eachcore in the same processor can adjust its voltage andfrequency independently.
In [13], the authors jointly presented a host of runtimeand compilation techniques to conceal the heterogeneityof smartphones from developers. By investigating variousfeatures of HTC and Apple, Li and Ortiz, et al. [14]pointed out that the most significant challenge of reuse insmartphones is the design of software to accommodate het-erogeneity of these devices. However, our work focuses onusing a dynamic programming task scheduling techniqueto reduce energy consumption for smartphones with DVSenabled.
III. BASIC CONCEPTS AND MODELS
In this section, we introduce basic concepts that will beused in later sections.
A. Data Flow Graph (DFG)In general, the tasks in smartphone applications are
not stand-alone. A certain number of tasks will haveprecedence relationships due to different functionality ofeach task and communications between them. We use aDirected Acyclic Graph (DAG) to model the precedenceconstraints of smartphone applications.
Definition 3.1: Data Flow Graph (DFG): A DFG G =β¨π,πΈπ·, π,πΈ,π β© is a node-weighted DAG, where π =
β¨π’1, β β β , π’π, β β β , π’π β© is a set of task nodes; πΈπ· β π Γπ
is an edge set that defines the precedence relations amongnodes in π . For example, an edge π(π’ β π£) in thegraph indicates that task π£ cannot be executed until task π’
completes. π and πΈ are sets of execution time and energyconsumption for all nodes in π , respectively. π is a setof communication cost between tasks.
The execution time π of a task can be profiled by aver-age case execution time (ACET) or worst case executiontime (WCET) when the task is executed on a processorcore. We assume that the WCET and ACET of a task arealways measured at the highest voltage level (i.e., withfastest speed). Our approach uses ACET for the static
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scheduling. An edge π β πΈπ· is associated with a weight π€that represents the worst-case communication cost betweentwo dependent tasks when they are scheduled on twodifferent processors. Generally, the communication costbetween two tasks is negligible when they are executedon the same processor. There is a timing constraint ππΆ
for the whole task graph, which defines the time bound tofinish execution the entire task graph.
B. Energy ModelThe dynamic power consumption (ππ΄πΆ) of CMOS
circuits integrated in smartphones is calculated by,
ππ΄πΆ = πΆππππ2πππ (1)
where πππ is the supply voltage, π is the operating fre-quency, and πΆπππ is the effective switching capacitance.DVS reduces dynamic power consumption according toquadratic dependence on voltage.
The frequency π is represented as in Equation (2).
π =(πππ β ππ‘β)
πΌ
ππππ(2)
where ππ‘β represents the threshold voltage, and π is adevice-dependent constant. πΌ is a technology-dependentconstant, which varies between 1 and 2.
IV. AN MOTIVATIONAL EXAMPLE
Figure 2(a) shows a simple application on a smartphonewith 2 different voltage levels, namely π1 and π2. Thisapplication includes 3 tasks, and the execution time andenergy consumption of each voltage mode are shown inFigure 2(b). Our objective is to schedule all tasks inthe graph with the minimum energy consumption whilesatisfying a given time constraint.
Based on Figure 2(a), the critical path (CP) of thetask graph is π’1 β π’2 β π’3. Assuming the timingconstraint (ππΆ) of the smartphone application is 9 timeunits. Figure 2(c) illustrates the procedure to achievethe minimal energy consumption by our proposed staticscheduling algorithm. The voltage level assignment foreach task is recorded in a two-dimensional matrix πΈπ[π]π (πrepresents a task, π represents a time period, and π repre-sents the voltage mode assignment to task π, respectively).From Figure 2(c), we can see that the minimum energyconsumption, 46, is achieved, assigning the voltage modeπ2 β π’1, π1 β π’2, and π2 β π’3, respectively.
From the result of πΈ3[9] we can obtain the assignment asfollows: (1) Starting from the minimum energy consump-tion at πΈ3[9], we know π2 is assigned to π’3 and its execu-tion time π‘3(2) is 4 (for π‘π(π), π represents a node number,
π represents a voltage level), as shown in Figure 2(b). (2)Calculating the sub-optimal combination of task modesbefore adding task π’3. We can get the index for πΈ2[π]
by subtracting π‘3(2) from ππΆ: ππΆ β π‘3(2) = 9 β 4 = 5.Then we arrive at the location πΈ2[5], which means that theoptimal energy consumption to execute all the tasks fromthe root to π’2 is 38. By checking the mode assignment, wecan see that π1 is allocated to π’2. Therefore, the executiontime of task π’2 is π‘2(1) = 2. (3) In a similar way, we candetermine that π2 is assigned to π’1 and its execution timeis π‘1(2) = 3. Thus, the total execution time from π’1 to π’3
is 3+2+4 = 9 (which is not greater than 9) and the totalenergy consumed is 10 + 28 + 8 = 46.
V. ALGORITHMS
In this section, an algorithm, Energy-aware DynamicTask Scheduling (EDTS), is devised to minimize the totalenergy consumption while satisfying the timing constraint.
For real-time applications on smartphones, we use thefollowing major steps to implement the energy-awarescheduling. First, we partition and map the tasks in a DAGπΊ onto the microprocessors of a smartphone platform.Then, an initial schedule of DAG πΊ with the task executionorder and communication links is obtained. Second, weidentify the critical path (CP) by finding the path withthe longest execution time. If there are more than onelongest path in the graph, we select the one with thelargest energy consumption in the DAG πΊ. Third, basedon the ACETs for all tasks in the graph, we can obtain astatic schedule by our static scheduling algorithm. Finally,within each scanning period, the whole task graph isdynamically scheduled and the execution order of eachtask is determined by our dynamic scheduling algorithm.
During partitioning and mapping the tasks in a DAG,we consider related architectural constraints, heterogeneity,and resource capacities of smartphone platforms. Theavailable energy of each processor may vary over time fordifferent applications. Whenever the resource availabilityvaries too much, the DAG needs to be repartitioned andre-mapped onto processors to maintain energy efficiency.We adopt the partitioning scheme, VPIS, proposed in[15] to schedule tasks onto microprocessors, with theconsideration of various constraints and conditions. Ourobjective is to balance the load and minimize the totalsystem energy consumption.
A. The Critical Path Assignment (CPA) Optimal Algorithm
We use a dynamic programming method to solve theenergy-aware scheduling problem for smartphone systems.
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(a) (b) (c)
Figure 2: An motivational example. (a) A simple DAG. (b) The execution time and energy consumption for each task atdifferent voltage modes. (c) The procedures to derive the minimal energy consumption for the DAG. πΈπ[π]π representsthat assigning voltage level π to task π is optimal, when the time constraint is π.
Given the timing constraint ππΆ, a DAG πΊ, and an assign-ment π΄, we give several definitions as follows:
Definition 5.1: Assignment π΄: An allocation schemeassigns a specific voltage mode to each task in a DAG.
Definition 5.2: πΊπ: A subgraph π, which starts from theroot of the task graph till the node π£π.
Definition 5.3: πΈπ΄(πΊπ) and ππ΄(πΊ
π): The total energyconsumption and the total execution time of πΊπ under theassignment π΄.
In our algorithm, each step achieves a currently min-imum total energy consumption of πΊπ while satisfyingvarious timing constraints.
A table π·π,π (π represents a node number, and π rep-resents time) will be built, where each entry of this tablestores the smallest energy πΈ that has been obtained.
In every step of our algorithm, we will consider at leastone task. When two tasks are added together, total energyconsumption is the sum of their energy consumption, πΈ
β²π,π
= πΈ1π,π + πΈ2
π,π . For each entry, we only keep the smallesttotal energy consumption and the corresponding voltagelevel assignment. When there is more than one solution,we keep the one with the smallest total execution time. Ifthe total execution times are also the same, all solutionswill be kept. When a critical path is found, we will usethe optimal algorithm, CPA, to get the optimal solutionfor the energy-aware scheduling problem. The algorithmis shown in Algorithm V.1.
In algorithm CPA, we first build a local table π΅π,π foreach node. The table π΅π,π only stores energy consumptionof a node under different voltage levels. In the next stepof the algorithm, when π = 1, there is only one node. Weset the initial value, and let π·1,π = π΅1,π (line 1). Thenwe build the table π·π,π (line 3-7), by using the dynamicprogramming method. For each node π’π for each π, wevary time π (1 β€ π β€ π) in table π΅π,π (line 4). We addenergy consumption together in the two tables π΅π,π andπ·πβ1,πβπ (line 6). We also consider the communicationcost π€π when tasks π and π+ 1 are scheduled on different
Algorithm V.1 The CPA Algorithm for Critical Path.
Require: π different voltage levels, a critical path, and a timingconstraint ππΆ.
Ensure: An optimal assignment for the critical path.Build a local table π΅π,π for each node on the criticalpath;
1: Let π·1,π = π΅1,π
2: Start from π’1 β π’β£πβ£, compute π· step by step;3: for each time π of node π’π, π > 1 do4: for each time π in π΅π,π , 1 β€ π β€ π do5: if π·πβ1,πβπ! = πππΏπΏ then6: π·π,π = π·πβ1,πβπ +π΅π,π + πΌπ€π;7: For π·π,π , always keep the minimum one if there are
multiple results;8: else9: Continue;
10: end if11: end for12: end for13: return π·β£πβ£,π ;
microprocessors. If the two tasks are implemented on thesame core, πΌ is 0; otherwise, πΌ is 1. Finally, we keepthe smallest total energy and the corresponding voltageselection. The energy in π·π,π is the minimum total energyfor graph πΊπ under the timing constraint π.
Figure 3: (a) Initial parameters. (b) A DFG. (c) Thecorresponding B table. (d) Part of corresponding D table.
For example, for the DFG shown in Figure 3(b), theinitial parameters are shown in Figure 3(a). We computethe corresponding B table of node π’1 and π’2 as follows.
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For node π’1, after sorting, we can get (π (time): πΈ (en-ergy)) pairs: (1: 20), (2: 20), (3: 10), and (4: 10), as shownin Figure 3(c). Figure 3(d) shows the corresponding π·π,π
table. For instance, we can compute entry π·2,3 for the pathπ’1 β π’2 with the time constraint ππΆ = π = 4 as follows.Using the CPA algorithm, two cases can satisfy this timeconstraint. Case 1: 4 = 2 + 2, with π·2,4 = π·1,2 + π΅2,2.Energy consumption for this assignment is: 20+28 = 48.Case 2: 4 = 1 + 3 with π·2,4 = π·1,1 + π΅2,3. Energyconsumption under this assignment mode is: 20+22 = 42.Energy consumption of Case 2 is less than that of Case 1.Hence, we fill 42 into entry π·2,4.
Time complexity: It takes π(π) to compute one value ofπ·π,π , where π is the maximum number of voltage levels.Thus, the complexity of the CPA algorithm CPA is π(β£π β£βππΆ βπ), where β£π β£ is the number of nodes and ππΆ is thegiven timing constraint. Usually, the execution time of eachnode is bounded by a constant. So ππΆ equals π(β£π β£π) (πis a constant). In this case, CPA is a polynomial algorithm.
B. The DFGCP Static Scheduling Algorithm
In this section, we propose a highly efficient algorithm,DFGCP, to solve the static scheduling problem. The algo-rithm is shown in Algorithm V.2.
Algorithm V.2 The DFGCP Algorithm
Require: π different voltage levels, a DFGπΊ=β¨π,πΈπ·, π,πΈ,π β©, and a timing constraint ππΆ.
Ensure: An assignment for the DFG.Find CP, a critical path of DFG G;
1: if Time(CP) > ππΆ then2: Flag β No;3: Use our CPA to find the minimal total energy consump-
tions and corresponding voltage assignments;4: When we found a solution, then set Flag β Yes;5: end if6: if Flag == Yes then7: Output the assignment of G;8: else9: Output βNo Solutionβ; exit;
10: end if11: For the nodes on the non-critical path (non-CP), we will use
CPA algorithm to find the minimal energy consumptions andkeep the corresponding voltage levels.
12: Add together the energy of CP and non-CP, we get theminimal total energy consumptions.
In DFGCP algorithm, we first find a critical path (CP)of the DFG πΊ. If the total execution time of the CP islarger than the timing constraint ππΆ, we will use the CPAalgorithm to find the minimal total energy consumptionand the corresponding voltage selections. In each step, wewill consider the voltage level transfer overheads when
using DVS. For each node, if it is not on the sameprocessor with its parent nodes, the communication costwith the parents π€π will be considered. Finally, if we find asolution for CP within ππΆ, the algorithm continues usingCPA to find the optimal solution for non-CP paths. At thistime, we fix the assignments of the overlapping nodes ofCP and non-CP paths.
Time Complexity: DFGCP is a polynomial time algo-rithm. The complexity of the CPA algorithm is π(β£π β£ βππΆ βπ), where β£π β£ is the number of nodes and ππΆ isthe given timing constraint. π is the maximum number ofvoltage levels. We use CPA to compute every path once.The total number of paths is bounded by π(β£π β£2). Hence,CPA is a polynomial time algorithm. For a sparse graph,the number of paths is very small, assuming a constant π,then the complexity is approximately linear and the amountof computation time is very small.
C. The EDTS Dynamic Scheduling Algorithm
Algorithm V.3 The EDTS Algorithm
Require: π different voltage levels, a DFGG=β¨π,πΈπ·, π,πΈ,π β©, and a timing constraint ππΆ.
Ensure: A dynamic scheduling for the DFG.1: Get the initial scheduling by DFGCP algorithm;2: Topologically sort the nodes, getting node sequence π’π β π ;3: for each node π’π, 1 β€ π β€ β£π β£, not visited, get the one with
the earliest start time do4: if required execution time is substantially different from
ACET then5: Mark it as visited;6: Run DFGCP algorithm for the remaining nodes and
find the new static schedule with minimal energy con-sumption while satisfying the new timing constraint(ππΆ = ππΆ ββπ
π=1ππ, where
βπ
π=1ππ is the time
used);7: else8: Continue;9: end if
10: Finish node π’π, and update system energy overhead andthe information (such as the starting time) of nodes thatare dependent on π’π;
11: if current static schedule is not followed then12: Run DFGCP algorithm for the remaining nodes and
find the new static schedule with minimal energy con-sumption while satisfying the new timing constraint(ππΆ = ππΆ ββπ
π=1ππ, where
βπ
π=1ππ is the time
used);13: else14: Continue to the next node;15: end if16: end for
The DFGCP static scheduling algorithm gives a solutionby assuming all tasks run at ACETs. However, in real-
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life scenarios, we do not know in advance the actualexecution time of a task for smartphone applications. Theinformation of these tasks will change greatly in runtime,thus even an optimal static schedule can become invalidin the dynamic case. In this subsection, we present anaggressive dynamic programming based online schedulingalgorithm, called Energy-aware Dynamic Task Scheduling(EDTS). EDTS algorithm uses the results from DFGCPstatic scheduling algorithm, which obtains a near-optimalschedule based on the knowledge of ACET of each task.
The actual execution time of a task may be greateror less than its ACET, we first obtain a static schedulewith DFGCP by assuming every task takes its ACET.However, if every task aggressively runs at this staticallycomputed average case speed during runtime, some ofthem may miss their deadlines. Our EDTS algorithm usesthe path information to track any changes of tasks insmartphone applications. When a task node is finished,EDTS checks whether the schedule is followed. If not,then the remaining task graph will be recomputed with theDFGCP static scheduling algorithm. Also, in the course ofthe implementation of each node, whenever the variation ofexecution time exceeds the pre-specified threshold value,DFGCP will be used to recompute. For example, we setdifference ratios to be Β±5% between the real executiontime and its ACET used previously in DFGCP. The newcomputation will only implement the remaining subgraphwith the updated ACET values.
Time Complexity: Our dynamic scheduling algorithm,EDTS, progressively improves performance based on theschedule obtained by the static scheduling, DFGCP. TheEDTS algorithm is shown in Algorithm V.3. For a sparsegraph, the complexity of this algorithm is π(β£π β£(β£π β£ βππΆ βπ)), where β£π β£ is the number of nodes, ππΆ is thegiven timing constraint, and π is the maximum numberof voltage levels. Hence, EDTS is a polynomial timealgorithm. For general task graphs, since DFGCP is apolynomial time algorithm and EDTS calls π(β£π β£) timesof DFGCP, EDTS is also polynomial.
VI. EXPERIMENTS
In this section, we conduct experiments with the EDTSalgorithm on a set of benchmarks including Wave Digi-tal filter (WDF), Infinite Impulse filter (IIR), DifferentialPulse-Code Modulation device (DPCM), Two dimensionalfilter (2D), Floyd-Steinberg algorithm (Floyd), and All-pole filter. The number of tasks for these benchmarkshas been augmented with the unfolding technique (theunfolding rate is 5). The proposed run-time system has
been implemented and a simulation framework to evaluateits effectiveness has been built. The dynamic processorloads are obtained through measurements on a 600MHzCrusoe processor. The execution time (ACET and WCET)and energy consumption are based on the profiling. Theexecution time of each node follows a Gaussian distribu-tion.
We conducted experiments using three different meth-ods: Method 1: Dynamic version parallelism-base (PS) al-gorithm [16]; Method 2: Critical path dynamical schedul-ing (CPDS) [17]; Method 3: Our EDTS algorithm. Method1 uses a greedy technique to further reclaim the slack gen-erated during runtime. Initially all tasks are assigned witha statically computed processing speed. All the availableslacks from a task due to its earlier completion are given tothe next expected task running on the same processor. Thespeed for the next expected task will be adjusted based onits ready time [17].
The experiments are conducted based on the powermodel of 70nm processor [18]. Then energy consumptionper cycle can be calculated by using Equation (9) proposedin [18]. The power is derived from the formula πΈππ¦π =
π/π . In experiments, we use π different voltage typeswith a descending processing speed in π1, π2, β β β , ππ .The time and energy overheads during a voltage transitionamong the above voltage levels are calculated based onEquations (15) and (20) in paper [19]. We compare ourresults with those from Method 1 and Method 2 on a PCwith a P4 2.1G processor running on Red Hat Linux 9.0.
The experimental results are shown in Figure 4(a) toFigure 4(c) when the number of βTCβ is 2000, 3000,and 4000, respectively. In these figures, M1, M2, andEDTS represent the Method 1, Method 2, and our proposeddynamic scheduling algorithm, respectively.
As shown in these figures, our algorithm achievessignificant energy reduction, compared to Method 1 andMethod 2. For example, with 3 voltage levels, comparedwith Method 1 and Method 2, EDTS shows 30.1% and20.2% reduction in energy consumption, respectively. Thisis mainly because our method uses the optimal algorithmCPA to implement the energy-aware static scheduling.
Hence, our EDTS algorithm can significantly improvethe performance of smartphone systems. We can see thatwith more voltage-level selections, the reduction in totalenergy consumption is more prominent. For example, with3 voltage levels, compared to Method 1, EDTS showsan average 30.1% reduction in total energy consumption,while using 5 voltage levels, the reduction can be achieved
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(a) ππΆ = 2000ππ ,π = 3 (b) ππΆ = 3000ππ ,π = 4 (c) ππΆ = 4000ππ ,π = 5
Figure 4: The comparison of total energy consumption for Method 1, Method 2 and EDTS when (a) ππΆ = 2000 ns andπ = 3, (b) ππΆ = 3000 and π = 4, (c) ππΆ = 4000 and π = 5 across a set of benchmarks.
up to 34.2%.
VII. CONCLUSION
Smartphones are power-hungry devices. This paper stud-ied how to minimize total energy consumption whilesatisfying application timing constraints for smartphonesystems. We proposed a highly efficient algorithm, Energy-aware Dynamic Task Scheduling (EDTS), which utilizesthe results from a static scheduling algorithm and aggres-sively reduces energy consumption. Experimental resultsacross a suite of benchmarks showed that our algorithmcan achieve significantly higher energy efficiency forsmartphones.
ACKNOWLEDGEMENT
This work was supported in part by the University ofKentucky Start Up Fund and NSFC 61071061; the NSFCNS-0915762 (CSR), CCF-08452578 (CAREER), CNS-0917137 (CSR).
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