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Practical Macromodels for Digital I/O
Paul [email protected]
Madhavan Swaminathan, Michael [email protected]
Acknowledgements: Ambrish Varma, Bhyrav Mutnury
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Outline
• Background– Macromodeling Needs– Requirements for Successful Macromodels
• Macromodeling Techniques– IBIS– Numerical Models– Physical
• Proposal : The Way Forward
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I/O Macromodeling
• Replace full Spice driver model
with
• Macromodel– Hides proprietary
information– Speeds up simulation
pullup
pulldown
Power_clamp
Gnd
Power
C_comp
L_pkg R_pkg
C_pkg
Output Pin
Gnd_clamp
pullup
pulldown
Power_clamp
Gnd
Power
C_comp
L_pkg R_pkg
C_pkg
Output Pin
Gnd_clamp
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I/O Macromodeling
• Required Goals:– Vendor-independent format– Have to capture TX, RX, and package
parasitic essentials– Sufficiently accurate to be useful– Easy to automatically generate from Spice
and Measurements– Easy to verify– Easy and fast to simulate
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I/O Macromodels
• Desirable Goals– Unique solution– Orthogonality– Multiple Verification Approaches– Physical basis– Human readability– Monotonic– Simulator Independent– Extendable to core noise SSN
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IBIS
• IBIS – Input Output Buffer Information Specification– EIA Standard 656 -A– Behavioral model of I/O buffers
• Model is represented as set of VI and VT curves.
– Fast simulations– Protects proprietary information contained in
the IC
http://www.eda.org/pub/ibis/
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Basic IBIS Model
pullup
pulldown
Power_clamp
Gnd
Power
C_comp
L_pkg R_pkg
C_pkg
Output Pin
Gnd_clamp
pullup
pulldown
Power_clamp
Gnd
Power
C_comp
L_pkg R_pkg
C_pkg
Output Pin
Gnd_clamp
A Basic model consist of:•Four I-V curves: - pullup and pulldown
- PWR and GND Clamp•Two Ramps: -dv/dt_rise, dv/dt_fall•Die Capacitance and•Packaging information
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Spice2Ibis• Automatically converts a Spice deck to an
IBIS file
• Over 1,000 active users• Over 3,000 lines of code• Was critical to success of IBIS language
S2IBIS Command File
-Header information-Component Description
Parser-Extracts all relevant
information from Command file
SPICE-HSPICE,PSPICE,
SPICE2SPICE3,SPECTRE
S2IBIS-Calls Spice, analyzes dataPrints results
IBIS Model
Circuit Layout
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IBIS Limitations
• IBIS hard to scale for use with high speed I/O– Up to 100 ps delay error– Subtle inflections missed– SSN over-predicted
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IBIS Alternatives
• Current Work:
• Numerical black-box methods– “Parametric” Models:
• Stievano, Maio, and Canavero, Politecnico di Torino
– Spline/Finite Time Difference• Swaminathan, Georgia Tech
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Numerical Methods
• “Black Box” Modeling– Static Term
istatic(k) = w1(k)f1(k) + w2(k)f2(k)
• Captures output impedance of driver• IBIS:
– f1 and f2 are fitted VI tables. i.e. I(Vout)
• Spline : – f1 and f2 are numerically fitted power series, i.e. I(Vout,
….)
• Parametric:– Basis functions: Gaussian or Sigmoid
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Numerical Methods
• Black Box Modeling– Dynamic Term
• IBIS : i(k) = w1(k)V1(k)f1(k) + w2(k)V2(k)f2(k)
– + output physical Ccomp
• Spline : – f1, f2 dynamic by numerically fitted load
capacitance (captures di/dt)
• Parametric– Calculated as a function of past values,
using Basis functions– e.g. RBF using Gaussians
Vn(T)
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Physical Model
• Circuit Level:
or
M1(T)
M2(T)
Ids=k(Vgs-Vt)2GS
D
etc.
Captures staged turn-ondrivers
Gain loss during switching event (Vgs)
Second order effects = f(Vds)
w=step functiononly in break beforemake drivers
CML reduces CM dependence
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Comments on Models• IBIS
– No numerical flexibility to capture subtle physical effects– Most physical (but very first order)– Easy to automate
• Spline/FTD– Input waveform dependence– Less physical – More accurate– Relatively hard to automate
• Numerical fitting of power series
• Parametric– Input waveform dependence– Least physical– Most accurate– Harder to automate model production
• More complex numerical procedures
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Proposal
• Collaborative Effort:– NC State University– Georgia Tech– Politecnico di Torino
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The Way Forward
1. Find the compromise between complexity and automation, while considering other goals
IBIS 4.0 Spline RBF
I=f(Vout) ErrorCurrentSource*
I=f(Vout,Vdd/Vss)M@OP
M=f(T,Vdd)Etc.*e.g. Numerically fitted error fn
RBF SigmoidPower Series
Reduced Order Power SeriesWavelet basis fns
Neural net fittingEtc.
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The Way Forward
• Test on standard driver set:– Conventional, LVDS, DDR, Other CML, Emerging– Test Spice model formats in Freeda
• Evaluate– Metrics:
• Accuracy in predicting delay, peak SSN, xmitted SSN, Xtalk, refn noise
• Accuracy outside range where fitted• Macromodel utility factors listed earlier
– Esp. Complexity of model fit procedure
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The Way Forward
2. Promulgate alpha standard– Develop SpicetoMacromodel
3. Evaluate and propagate more broadly
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Proposed Consortium
• Set up industry consortium to fund this work
• Benefits to consortium members– IC vendor companies
• Macromodel tuned to their drivers• Early access to successful macromodel formats
– First to market
– CAD companies• Early access to successful formats• Influence macromodel for simulator compatibility
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Discussion (on the day)
• Acknowledgement and contribution of the highly accurate “black box” techniques contributed by Prof. Flavio Canavero and his group.
• George Katopis:1. Study and development of a tool that helps
the user with the selection of black box option based on "expected" accuracy and time.
2. Automatic generation of the black box models
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Conclusions
• Ease of Use is just as important as model accuracy
• All macromodels are numerical black box format– Key question is complexity and type of
functions used