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1

CHAPTER 1

1.1. Introduction

High frequency switching converters application in the dc power distribution is

increasing in the recent years [ ] due to major concern in the recent dc distribution systems, such

as in automotive and telecom power supply systems, is to meet the increased power demand and

reducing the burden on the primary energy source, i.e. built-in battery. This is possible by adding

additional power sources in parallel to the existing battery source. The additional power sources

can be: (i) renewable energy sources such as photovoltaic (PV) or wind (WD) and (ii) fuel cell

(FC) storage power, etc.

Normally the DC sources are connected in parallel to supply the common DC load. This

power control needs individual power electronic converters to connect multiple sources to feed

the common load. Paralleling of converters can be done in two different ways, which are: (i)

paralleling different power electronic converters at the load port, and (ii) connecting multiple

sources through an integrated converter. As different sources have different voltage levels, they

can’t be directly connected in parallel. Hence, paralleling of different DC sources must be carried

through intermediate power electronic converters at load port or connecting multiple sources

through a single integrated converter. It is more advantageous to use multi-input converters

rather than several independent converters as it results in less number of components andsimplicity in controller design.

An example of a system which requires multiple converters is a photovoltaic (PV)

system, which is shown in Fig.1.1. The system consists of PV cells and battery. PV cells can give

power only during the day time. At night, they are not capable of supplying power. Hence, the

use of multiple converters provides an alternative solution in powering the crucial loads.

In case of two-Input PWM DC-DC converter the two DC input sources can be controlled

to give the power to the load. It has two main advantages: (1) if one of the DC sources fails to

supply power then the other DC source can deliver total load demand (2) two DC sources can

share the load according to their power capacities, which gives reliable operation (3) Also, if one

of the source capacity is limited then the remaining load demand is drawn from other DC source.



2

+-

+-

Vs1

Vs2

LoadVo

+

-

DC/DC

Fig.1.1. Power system with one double-input dc/dc converter

An example of a system consisting of series connected converters is shown in Fig.1.2.

Such a converter layout results from the series connection of the output stages of two switch-

mode dc-dc converters. In this circuit configuration, output voltage and current regulation is

difficult. The main disadvantage of such systems is that output current flows through both

converters hence power loss is high.

DC/DC

Load

+

DC/DC

-

+-

Vs1

Vs2

Vo

+

-

Fig.1.2. Power system with two individual series connected dc/dc converters

An example of a system consisting of parallel connected converters is shown in Fig.1.3.

Separate dc-dc conversion stages are employed for individual sources. However, these

converters are parallel together at the dc bus and controlled independently. The main drawback

of such system lies in the fact that it is inherently complex and has a high cost due to the multipleconversion stages and communication devices between individual converters.



3

DC/DC Load+

DC/DC

-

+-

Vs1

Vs2

Vo

+

-

Fig.1.3. Power system with two individual dc/dc converters

1.2. Objectives of the thesis

(1) To achieve optimal power control between two dc sources using two-input integrated

dc-dc converter.

(2) To analyze circuit operation depending on modes of operation and to derive voltage

transformation ratio for two-input integrated dc-dc converters.

(3) To obtain optimal design of parameters of the two-input integrated dc-dc converter.

(4) To derive the state-space model and discrete small-signal transfer functions for two-

input integrated dc-dc converter.

(5) To design voltage and current mode controllers for two-input integrated dc-dc

converter.

(6) To verify the validity of the designed controller experimentally using digital signal

controller.



4

CHAPTER 2

2.1. Introduction

In order to efficiently and economically utilize available resources, PV and FC the power

conversion efficiency and its control is the major challenge for the power supply designer. The

efficiency improvement, from the steady-state point of view, of the two-input integrated

converter is one of the considerations for the designer. The other constraint, while designing such

systems, is to evolve simple control strategy. To meet some of these concerns, multi-input

converters with different topological combinations are coming up in the recent days. Several

such power conversion topology configurations have been reported in literature [ ]. Detailed

discussion of such power conversion systems are discussed in this chapter.

2.2. Types of topologies for multi-input DC power conversion systems

There are three primary switch mode converters, which are: BUCK, BOOST and BUCK-

BOOST and they can be connected either in parallel or in integrated fashion. It is possible to

realize an integrated and/or parallel type of topologies depending on the type of combination of

basic converters. Various possible parallel converter combinations are tabulated in Table 2.1,

while integrated converters combinations is listed in Table 2.2.

Table 2.1 Parallel converter combinations

Configuration Type of converter topology

I BUCK converter in parallel with BUCK converter

II BUCK converter in parallel with BOOST converter

III BUCK converter in parallel with BUCK-BOOST converter

IV BOOST converter in parallel with BUCK-BOOST converter



5

Table 2.2 Integrated converter combinations

Configuration Type of converter topology

(i) BUCK converter with BUCK converter

(ii) BUCK converter with BUCK-BOOST converter

(iii) BUCK converter with SEPIC converter

(iv) BUCK-BOOST converter with BUCK-BOOST converter

(v) BOOST converter with BOOST converter

(vi) BOOST converter with BUCK-BOOST converter

(vii) BOOST converter with BUCK converter

Among all possible combinations the following four two-input integrated converters are

considered are considered in this thesis for discussion, which are: (i) BUCK converter with

BUCK converter, (ii) BUCK converter with BUCK-BOOST converter, (iii) BUCK-BOOST

converter with BUCK-BOOST converter, and (iv) BUCK converter with SEPIC converter.

Two-input integrated buck-buckboost converter, shown in Fig.2.1 consists of switches,

diodes equal to the number of input sources, an inductor and a capacitor. The two-input dc-dc

converter can draw power from two different voltage sources simultaneously or individually.

When input source V1 is the only source of power, the converter operates like a conventional

buck converter. Similarly, when input source V2 is operating alone, the converter operates like a

conventional buck-boost converter. Comparative benefits and limitations are listed in Table 2.3.

Fig.2.1. Integrated two-input buck-buck boost converter



6

Two-input integrated buck-buck converter, shown in Fig.2.2, uses two buck converters.

This converter can also draw power from two different voltage sources simultaneously or

individually. If each source operates individually the circuit operates as buck converter.

Fig.2.2. Integrated two-input buck-buck converter

Two-input integrated buckboost-buckboost converter, shown in fig.2.3, uses two

buckboost converters. The limitation of this converter is that both switches are not allowed to be

turned on simultaneously; hence, each source can provide power to the load individually.

Fig.2.3. Integrated two-input buckboost-buckboost converter



7

Two-input integrated buck-sepic converter, shown in fig 1, uses one buck and other sepic

converter. This converter can also draw power from two different voltage sources simultaneously

or individually. This topology results into fourth order system unlike above mentioned

topologies.

Fig.2.4. Integrated two-input buck-sepic converter

Table 2.3 Comparison of topologies for multi-input DC power conversion systems

S.

No.

BUCK-BUCK

TOPOLOGY

BUCK-

BUCKBOOST

TOPOLOGY

BUCKBOOST-

BUCKBOOST

TOPOLOGY

BUCK-SEPIC

TOPOLOGY

1 It can draw power

from two different

voltage sources

simultaneously or

individually.

It can draw power

from two different

voltage sources

simultaneously or

individually.

The limitation of this

converter is that both

switches are not

allowed to be turned

on simultaneously;

hence, each source can

provide power to the

load individually.

It can draw power

from two different

voltage sources

simultaneously or

individually.

2 There is common

ground present

between input

There is no

common ground

present between

There is no common

ground present

between input source

There is common

ground present

between input source



8

source and output

load voltage.

input source and

output load voltage.

and output load

voltage.

and output load

voltage.

3 To obtain average

input current

information,

inductor current

average

information need to

be obtained

through current

sensor.

To obtain average

input current

information,

inductor current

average information

need to be obtained

through current

sensor.

To obtain average

input current

information, inductor

current average

information need to be

obtained through

current sensor.

Since input inductor

is present, average

input current

information is

present.

4 It gives least load

voltage as

compared to all

other topologies for

same duty ratio’s

d1 and d2.

It gives more load

voltage as

compared to

BUCK-BUCK and

BUCK-SEPIC

topologies for sameduty ratio’s d1 and

d2.

It gives maximum

load voltage as

compared to all other

topologies for same

duty ratio’s d1 and d2.

It gives less load

voltage as compared

to BUCK-

BUCKBOOST and

BUCKBOOST-

BUCKBOOSTtopologies for same

duty ratio’s d1 and

d2.

5 Buck-Buck

topology results

into second order

system.

Buck-Buckboost

topology results

into second order

system

Buckboost-Buckboost

topology results into

second order system.

BUCK-SEPIC

topology results into

fourth order system.



9

Table 2.4 Voltage transformation ratios of two-input DC-DC converters

Converter

Topology

Voltage

transformation ratio

Variation of load voltage with duty ratio’s

Buck-Buck

1 1 2 2oV V d V d = +

0.20.3

0.40.5

0.2

0.3

0.4

0.55

10

15

20

25

dLo

Integrated BUCK-BUCK Converter

dHI

V o

Buck-

Buckboost ( ) ( )1 1 2 2

2 21 1o

V d V d V

d d = +

− −

0.20.3

0.40.5

0.2

0.3

0.4

0.510

20

30

40

50

dLo

Integrated BUCK-BUCKBOOST Converter

dHI

V o



10

Converter

Topology

Voltage transfer ratio Voltage transfer ratio plots in MATLAB

Buckboost-

Buckboost ( ) ( )1 1 2 2

1 2 1 21 1o

V d V d V

d d d d = +

− − − −

0.20.3

0.4

0.5

0.2

0.3

0.4

0.50

200

400

600

dLo

Integrated BUCKBOOST-BUCKBOOST Converter

dHI

V o

Buck-sepic

( )2 2

1 1

21o

V d V V d

d = +

−

0.20.3

0.40.5

0.2

0.3

0.4

0.510

15

20

25

30

dLo

Integrated BUCK-SEPIC Converter

dHI

V o

From above table one can observe that, load voltage depends on d1 and d2 both. And also

the buckboost-buckboost topology gives maximum load voltage as compared to other three

topologies for same duty ratio’s d1 and d2, the buck-buck topology gives least load voltage as

compared to other three topologies for same duty ratio’s d1 and d2.



11

Table 2.5 Comparison of two-input converter stresses

Two-input converter Topology Voltage across the switch Voltage across the diode

Buck-Buck M1=VHI, M2=VLO VD1= VHI, VD2=VLO

Buck-Buck boost M1=VHI, M2=(VLO+Vo) VD1= VHI,VD2=(VLO+Vo)Buckboost-Buckboost M1= (VHI+Vo),

M2= (VLO+Vo)

VD1=( VHI+Vo),

VD2=(VLO+Vo)

Buck-Sepic M1=VHI, M2= (VC1+Vo) VD1= VHI, VD2= (VC1+Vo)

From above table one can observe that, voltage stress depends on input source voltage,

load voltage, inductor voltage and capacitor voltage. The relationship of the voltages depends on

the type of converter topology as indicated in Table 2.4.



12

CHAPTER 3

3.1. Introduction

First of all, modes of operation of two-input integrated BUCK-SEPIC converter are

presented. Depending on the modes of operation, the input-output voltage relationship is

derived. State space analysis is then done and on this basis, small signal transfer functions are

established. There are two control inputs; the switch duty ratios, and two controlled variables; the

output voltage and the low voltage source input current.

3.2. Operation principle of the two-input BUCK-SEPIC converter

The circuit diagram of the two-input integrated buck-sepic converter, consisting twoinput voltage sources: high voltage source V1 and low voltage source V2 and output voltage Vo,

is shown in Fig.3.1. Input sources can be batteries, ultra-capacitors, or any other dc source of

power. Through the operation of the power switches M1 and M2, the converter is able to draw

power from the two sources simultaneously or individually.

(a) Circuit diagram of the two input buck-sepic

converter

(b) Equivalent circuit of the integrated

converter in mode-1 operation

(c) Equivalent circuit of the integrated converter

in mode-2 operation

(d) Equivalent circuit of the integrated


Fig.3.1. Operating modes of the two-input BUCK-SEPIC converter



13

The two-input converter, shown in Fig.3.1.(a), results in three basic modes of operation

within one switching cycle depending on the switching frequency, magnitude of load and source

voltages. For proper functioning of the integrated converter, the gate control signals for the

switching devices needs to be synchronized either in the form of trailing or leading-edge

modulation. Moreover, the operating modes depend on the duty ratio’s of the switching devices.

Depending on the relative magnitude of duty ratio’s, there are actually four different modes of

operation are exist. However, only three modes out of four will be repeating in one switching

cycle depending on d1 > d2 or d2>d1.

The equivalent circuit of mode-1 operation is shown in Fig.3.1 (b), where-in the power

switching devices M1 and M2 are turned ON, while D1 and D2 are in OFF state. In this mode, the

voltage sources V1 and V2 will charge the inductors L1 and L2, respectively while the loaddemanded is met by the load capacitor Co. The intermediate capacitor C will get discharged

through the conducting switch M2.

The equivalent circuit of mode-2 is shown in Fig.3.1 (c), where-in the power switching

devices M1 is turned ON and M2 are turned OFF, while D1 is in OFF and D2 is in ON state. In this

mode, the voltage sources V1 will charge the inductors L1, while the load demand is met by the

electric energy provided by voltage sources V1 and V2. The intermediate capacitor C will get

charged through inductor.

The equivalent circuit of mode-3 is shown in Fig.3.1 (d), where-in the power switching

devices M1, M2 are in OFF state and D2 is ON state, while D1 will provide a bypass path for

inductor current iL1. In this mode, the load demand is met by the electric energy provided by

voltage sources V2.



14

3.3. Voltage Transformation Ratio

Time t

PWM1

PWM2

MODE

1MODE

3

MODE

2

Inductor Current L1

Inductor Current L2

Fig.3.2. Steady-state inductor current waveforms of the integrated converter

The voltage conversion ratio of the converter can easily be derived by using the volt–second

balance of the inductors. Upon substitution of the volt-second balance to the inductor L1 results

in the following equation.

( ) ( ) ( ) ( ) ( )2 1 1 2 1 11 0s c s o s od T V V d d T V V d T V + + − − + − − = (3.1)

where d1 and d2 are duty ratios for power switching devises M1 and M2, respectively, and Ts is

the switching period.

On simplification, output voltage Vo is

( )( )2 1 1

21c

o

V d V d V

d

+= −

(3.2)

By applying the volt-second balance theorem on the inductor L2, the following equation can be

obtained,

( ) ( ) ( ) ( ) ( )2 2 1 2 2 1 21 0s s c o s c od T V d d T V V V d T V V V + − − − + − − − = (3.3)



15

On simplification of equation (3.3), load voltage Vo is

( )2

21c o

V V V

d = −

− (3.4)

Substituting equation (3.4) in equation (3.2), one can obtain the following equation which gives

the relationship between input and output.

( ) ( ) ( )2 2 1

1

2 2 21 1 1o o

d V d V V V

d d d

⎡ ⎤= − +⎢ ⎥

− − −⎣ ⎦

( ) ( ) ( )2 2 2 1 1

2

2 221 11

oo

V d V d V d V

d d d + = +

− −−

( ) ( ) ( )2 2 1 1

2

2 22

1

1 11o

V d V d V

d d d

⎡ ⎤= +⎢ ⎥

− −−⎣ ⎦

( )2 2

1 1

21o

V d V V d

d = +

−

3.4. Design of converter parameters

The load power for double input integrated converter is,

o o oP V I = × where, Vo, Io are the load voltage and current, respectively. The load current can be

calculated as.o

o

V I

R=

In the BUCK converter the source current will flow only for switch (M1) duration d1 and it’s

mathematical equation is,

( )1 1 1 L avg I I d =

The source current of SEPIC converter is ,

( )2 2 L avg I I =

Capacitor Design C o

The ripple current flows through capacitor Co during interval d2Ts and gives rise to the ripple

voltage across the capacitor Co, which is given by,



16

2

0

1

sd T

co o

o

V I dt C

Δ = ∫

2oo

co

I d C

V f

⎛ ⎞×= ⎜ ⎟

Δ ×⎝ ⎠

Capacitor Design C

When main switch (M2) is off then the capacitor current is equal to the inductor current, for theduration (1-d2) Ts, and the corresponding capacitor ripple voltage is given by,

2

2

1

s

s

T

c L

d T

V I dt C

Δ = ∫

( )2 21 L

c

I d C

V f

× −⎡ ⎤= ⎢ ⎥Δ ×⎣ ⎦

Inductor Design L 2

For D=d2 For D=d1-d2 For D=1-d1

Voltage across inductor L2

during d2Ts,

22 2

Ldi L V

dt =

22 2

2

s

L

V L d T

I

⎛ ⎞= ×⎜ ⎟

Δ⎝ ⎠


during (d1-d2)Ts,

22 2

Lc o

di L V V V

dt = − −

( )2 1 2

2

2

( )c o

L

V V V d d L

I f

− − −=

Δ ×

L

I Inductor current ripple

I

Δ=


during (1-d1)Ts,

22 2

Lc o

di L V V V

dt = − −

( )2 1

2

2

(1 )c o

L

V V V d L

I f

− − −=

Δ ×

L


I

Δ=

Inductor Design L1


Voltage across inductor L1 during d2Ts,


during (d1-d2)Ts,

11 1

Lo

di L V V

dt = −


during (1-d1)Ts,

11

Lo

di L V

dt = −



17

11 1

Ldi

L V dt

=

11 2

1

s

L

V L d T

I

⎛ ⎞= ×⎜ ⎟

Δ⎝ ⎠

( )1 1 2

1

1

( )o

L

V V d d L

I f

− −=

Δ ×

L


I

Δ=

( )1 1

1

1os

L

V L d T

I

⎛ ⎞= − × −⎜ ⎟

Δ⎝ ⎠

L


I

Δ=

3.5. State-Space Analysis

Using the conventional KVL and KCL the following first order differential equations are

formulated for various inductor currents and capacitor voltages. These equations are now

transformed into state-space model given below.

MODE1- M1 and M2: ON, D1 and D2: OFF

By applying KVL and KCL to the circuit shown in Fig. 3.1(b),

1 LcdV i

dt C = −

11 1 1 1

1 1 1 1

cc L L L Lr idi V r i V

dt L L L L= − − +

( )co co

o co

dV V

dt C R r

−=

+

2 2 2 2

2 2

L L Ldi V r i

dt L L= −

coo

co

RV V

R r =

+

( )

1

1 1

2

2

1

10 0

0 0 0

10 0 0

10 0 0

L c

L

o co

r r

L L

r

L A

C R r

C

− −⎛ ⎞⎜ ⎟⎜ ⎟⎜ ⎟−⎜ ⎟⎜ ⎟=⎜ ⎟−⎜ ⎟

+⎜ ⎟⎜ ⎟−⎜ ⎟⎝ ⎠

;

1

1

2

10

10

0 0

0 0

L

B L

⎛ ⎞⎜ ⎟⎜ ⎟⎜ ⎟

= ⎜ ⎟⎜ ⎟⎜ ⎟

⎜ ⎟⎝ ⎠

; 1 0 0 0co

R E

R r

⎛ ⎞= ⎜ ⎟

+⎝ ⎠

MODE2: M1: ON and M2: OFF, D1: OFF and D2: ON

By applying KVL and KCL to the circuit shown in Fig. 3.1(c),



18

2 LcdV i

dt C =

( )( ) ( )

1 2 L Lco co

o co o co

R i idV V

dt C R r C R r

+= −

+ +

( )

( ) ( )1 21 1 1 1

1 1 1 1

co L L co L L L

co co

r R i i RV di V r i

dt L L L R r L R r

+= − − −

+ +

( )( ) ( )

1 222 2 2 2

2 2 2 2 2 2 2

co L Lc co c L co co L L L

co co

r R i iV V r i r V di V r i

dt L L L L L L R r L R r

+= − − − − − +

+ +

( )( )

1 2co L L coo

coco

r R i i RV V

R r R r

+= +

+ +

( ) ( ) ( )

( ) ( ) ( )

( ) ( ) ( )

1

1 1 1 1

2

2 2 2 2 2 2

2

0

1

10

10 0 0

co co L

co co co

co c co L

co co co

o co o co o co

r R r Rr R

L L R r L R r L R r

r R r r Rr R

L R r L L L R r L R r L A

R R

C R r C R r C R r

C

− −⎛ ⎞− −⎜ ⎟

+ + +⎜ ⎟⎜ ⎟− −

− − − −⎜ ⎟+ + +⎜ ⎟=

⎜ ⎟−⎜ ⎟

+ + +⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠

;

1

2

2

1 0

10

0 0

0 0

L

B L

⎛ ⎞⎜ ⎟⎜ ⎟⎜ ⎟

= ⎜ ⎟⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠

;

2 0

co co

co co co

r R r R R

E R r R r R r

⎛ ⎞=

⎜ ⎟+ + +⎝ ⎠

MODE3: M1 and M2: OFF, D1 and D2: ON

By applying KVL and KCL to the circuit shown in Fig. 3.1(d),

2 LcdV i

dt C =

( )

( ) ( )

1 2 L Lco co

o co o co

R i idV V

dt C R r C R r

+= −

+ +

( )

( ) ( )1 21 1 1

1 1 1

co L L co L L L

co co

r R i i RV di r i

dt L L R r L R r

+= − − −

+ +

( )( ) ( )

1 222 2 2 2

2 2 2 2 2 2

co L Lc c L co L L L

co co

r R i iV r i RV di V r i

dt L L L L L R r L R r

+= − − − − −

+ +



19

( )( )

1 2co L L coo

coco

r R i i RV V

R r R r

+= +

+ +

( ) ( ) ( )

( ) ( ) ( )

( ) ( ) ( )

1

1 1 1 1

2

2 2 2 2 2 2

3

0

1

10

10 0 0

co co L

co co co

co c co L

co co co

o co o co o co

r R r Rr R

L L R r L R r L R r r R r r Rr R

L R r L L L R r L R r L A

R R

C R r C R r C R r

C

− −⎛ ⎞− −⎜ ⎟

+ + +⎜ ⎟⎜ ⎟− −

− − − −⎜ ⎟+ + +⎜ ⎟=

⎜ ⎟−⎜ ⎟

+ + +⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠

; 23

0 0

10

0 0

0 0

L B

⎛ ⎞⎜ ⎟⎜ ⎟⎜ ⎟=⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠

;

3 0co co

co co co

r R r R R E R r R r R r

⎛ ⎞= ⎜ ⎟+ + +⎝ ⎠

3.6. Small-Signal Transfer Functions

The circuit operation depends on the type of controlling signal used for switching devices

M1 and M2. Since there are two duty ratio’s that need to be controlled, one for current control

while the second for voltage regulation, their dependence on the operating point needs to be

determined. One possible method is to obtain the converter small-signal transfer functions, which

are responsible in reveling the system response against load and source variation and also useful

in the controller design. In the following lines the small-signal model is formulated for the

generalized state-space equation Including small signal perturbations in the state space model

and then linearizing around the operating point results in

Where

( ) ( )1 2 2 2 3 1 3 A A A d A A d A= − + − +

( ) ( )1 2 2 2 3 1 3 B B B d B B d B= − + − +

( ) ( ) ( ) ( ) [ ]

( )( ) ( ) ( )

1 2 2 2 2 3 1 1 3

1 2 2 2 2 3 1 1 3

ˆ ˆˆ ˆ

ˆ ˆ ˆ g g

x x A A d d A A d d A x x

B B d d B B d d B V v

⎡ ⎤+ = − + + − + + +⎣ ⎦

⎡ ⎤ ⎡ ⎤+ − + + − + + +⎣ ⎦⎣ ⎦

( ) ( ) ( ) ( )1 2 1 2 2 2 3 2 3 1ˆ ˆˆ ˆ ˆ g g g x Ax Bv A A x B B V d A A x B B V d ⎡ ⎤ ⎡ ⎤∴ = + + − + − + − + −⎣ ⎦ ⎣ ⎦

(3.5)

Taking Laplace Transform of equation (3.5),



20

( ) ( ) ( ) ( )1 2 1 2 2 2 3 2 3 1ˆ ˆˆ( ) ( ) g g gsx s Ax s Bv A A x B B V d A A x B B V d ⎡ ⎤ ⎡ ⎤= + + − + − + − + −⎣ ⎦ ⎣ ⎦

( ) ( ) ( ) ( ) ( )1 2 1 2 2 2 3 2 3 1ˆ ˆˆ( ) g g gsI A x s Bv A A x B B V d A A x B B V d ⎡ ⎤ ⎡ ⎤− = + − + − + − + −⎣ ⎦ ⎣ ⎦

Assuming 2d and 1d equal to zero,

( )1

ˆ( )g

x s sI A Bv−

= − (3.6)

Assuming 2d and ˆgV equal to zero,

( ) ( ) ( )1

2 3 2 3 1ˆ( ) g x s sI A A A x B B V d

−⎡ ⎤= − − + −⎣ ⎦ (3.7)

Assuming 2d and ˆgV equal to zero,

( ) ( ) ( )1

1 2 1 2 2ˆ( ) g x s sI A A A x B B V d

−⎡ ⎤= − − + −⎣ ⎦ (3.8)

The equation for output voltage,

oV Ex=

( ) ( )1 2 2 2 3 1 3 oV E E d E E d E x∴ = − + − +⎡ ⎤⎣ ⎦

( ) ( ) ( )( ) [ ]1 2 2 2 2 3 1 1 3ˆ ˆˆ ˆ o oV v E E d d E E d d E x x⎡ ⎤+ = − + + − + + +

⎣ ⎦

( ) ( )1 2 2 2 3 1ˆ ˆˆ ˆ ov Ex E E x d E E x d ∴ = + − + −⎡ ⎤ ⎡ ⎤⎣ ⎦ ⎣ ⎦ (3.9)

Taking Laplace Transform of equation (3.6) and using equation (3.7),

( ) ( ) ( ) ( )2

1

11 2 3 2 3 2 3

ˆ ˆ1 ( ), ( ) 0

ˆ ( ) ( )ˆ ( )

g

og

d s V s

v s G s E sI A A A x B B V E E xd s

−

=

⎡ ⎤= = − − + − + −⎡ ⎤⎣ ⎦⎣ ⎦ (3.10)


( ) ( ) ( ) ( )1

1

12 1 2 1 2 1 2

ˆ ˆ2 ( ), ( ) 0

ˆ ( )( )

ˆ ( )g

og

d s V s

v sG s E sI A A A x B B V E E x

d s

−

=

⎡ ⎤= = − − + − + −⎡ ⎤⎣ ⎦⎣ ⎦ (3.11)

The equation for Input current,

in I Px=

( ) ( )1 2 2 2 3 1 3

in I P P d P P d P x∴ = − + − +⎡ ⎤⎣ ⎦

( ) ( ) ( )( ) [ ]1 2 2 2 2 3 1 1 3ˆ ˆˆ ˆ in in I i P P d d P P d d P x x⎡ ⎤+ = − + + − + + +

⎣ ⎦

( ) ( )1 2 2 2 3 1ˆ ˆˆ ˆ

ini Px P P x d P P x d ∴ = + − + −⎡ ⎤ ⎡ ⎤⎣ ⎦ ⎣ ⎦ (3.12)



21


( ) ( ) ( ) ( )2

1

21 2 3 2 3 2 3

ˆ ˆ1 ( ), ( ) 0

ˆ ( )( )

ˆ ( )g

ing

d s V s

i sG s P sI A A A x B B V P P x

d s

−

=

⎡ ⎤= = − − + − + −⎡ ⎤⎣ ⎦⎣ ⎦ (3.13)


( ) ( ) ( ) ( )1

1

22 1 2 1 2 1 2

ˆ ˆ2 ( ), ( ) 0

ˆ ( )( )

ˆ ( )g

ing

d s V s

i sG s P sI A A A x B B V P P x

d s

−

=

⎡ ⎤= = − − + − + −⎡ ⎤⎣ ⎦⎣ ⎦ (3.14)

Using (3.10), (3.11), (3.13) and (3.14),

111 12

21 22 2

ˆˆ ( ) ( )( ) ( )

ˆ ˆ( ) ( )( ) ( )

o

in

v s d sG s G s

G s G si s d s

⎛ ⎞⎛ ⎞ ⎛ ⎞= ⎜ ⎟⎜ ⎟ ⎜ ⎟⎜ ⎟

⎝ ⎠⎝ ⎠ ⎝ ⎠

Converting from s-domain to z-domain,

111 12

21 22 2

ˆˆ ( ) ( )( ) ( )

ˆ ˆ( ) ( )( ) ( )

o

in

v z d zG z G z

G z G zi z d z

⎛ ⎞⎛ ⎞ ⎛ ⎞= ⎜ ⎟⎜ ⎟ ⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠ ⎝ ⎠



22

CHAPTER 4

4.1. Introduction

First of all, modes of operation of two-input integrated BUCK-BUCKBOOST converter

are presented. Depending on the modes of operation, the input-output voltage relationship is

derived. State space analysis is then done and on this basis, small signal transfer functions are

established. There are two control inputs; the switch duty ratios, and two controlled variables; the

output voltage and the low voltage source power.

4.2. Modes of operation

(a) Circuit diagram of the two input buck-

buckboost converter

(b) Equivalent circuit of the integrated


(c) Equivalent circuit of the integrated


(d) Equivalent circuit of the integrated


Fig.4.1. Operating mode of the two-input BUCK-BUCKBOOST converter



23

The circuit diagram of integrated buck-buckboost converter consisting two input voltage

sources high voltage source V1 and low voltage source V2 and output voltage Vo is shown in

figure. Input sources can be batteries, ultra-capacitors, or any other dc source of power. Through

the operation of the power switches M1 and M2, the converter is able to draw power from the

two sources simultaneously or singly.

The multi-input converter, shown in Fig.1, results in three basic modes of operation

within one switching cycle depending on the switching frequency, magnitude of load and source

voltages. For proper functioning of the integrated converter, the gate control signals for the

switching devices needs to be synchronized either in the form of trailing or leading-edge

modulation. Moreover, the operating modes depend on the load/duty ratio’s of the switching

devices. Depending on the relative magnitude of duty ratio’s there are actually four different

modes of operation are exist. However, only three modes out of four will be repeating in one

switching cycle depending on d1 > d2 or d2>d1.

The equivalent circuit of mode-1 operation is shown in Fig.(), where-in the power switch

M1 and M2 are turned ON, while D1 and D2 are in OFF state. In this mode, the voltage sources V1

and V2 will charge the inductor L, while the load demanded is met by the load capacitor C. In

this operation mode, both of the V1 & V2 sources will transfer electric energy into the proposed

double-input dc/dc converter, simultaneously.

The equivalent circuit of mode-2 is shown in Fig.(), where-in the power switch M1is

turned ON and M2 are turned OFF, while D1 is in OFF and D2 is in ON state. In this mode, the

voltage sources V1 will charge the inductors L while the load demanded is met by load capacitor

C.

The equivalent circuit of mode-3 is shown in Fig.(), where-in the power switch M 1, M2

are in OFF state. Power diodes D1 and D2 will provide the current path for the inductor current.

Both of the voltage sources V1 and V2 are disconnected from the proposed double-input

converter. The electric energy stored in L and C will be released into the load.



24

Buck Converter Buck-boost Converter

Fig.4.2. Buck & Buck-boost Converter

It can be easily observed that if switch M2 is off for the entire switching period, i.e. when

input source V1 is the only source of power, the converter operates like a conventional buck

converter. Similarly, if switch M1 is off for the entire switching period, i.e. when input source V2 is operating alone, the converter operates like a conventional buck-boost converter.

4.3. Voltage Transformation Ratio

Fig.4.3. Steady-state inductor current waveforms of the integrated converter

By applying the volt-second balance theorem on the inductor L, the following equation can be

obtained

( ) ( ) ( ) ( ) ( )1 2 1 2 1 2 11 0s o s s o

d d T V V d T V V d T V − − + + + − − = (4.1)



25

where d1 and d2 are duty ratios for power switching devises M1 and M2, respectively, and Ts is

the switching period.

From equation (4.1), the output voltage expression can be obtained as

( ) ( )1 1 2 2

2 21 1o

V d V d V

d d = +

− −

4.4. Design of converter parameters

The load power for double input integrated converter is,

o o oP V I = ×

where, Vo, Io are the load voltage and current, respectively. The load current can be calculatedas.

oo

V I

R=

In the BUCK converter the source current will flow only for switch (M1) duration d1 and it’s

mathematical equation is,

( )1 1 L avg I I d =

Inductor average current=

( )21

o Lavg

I I

d

=−

The source current of Buck-Boost converter is,

( )2

21 Lo o

d I I

d =

−

Capacitor Design C

The ripple current flows through capacitor C during interval d2Ts and gives rise to the ripple

voltage across the capacitor C, which is given by,

2

0

1

sd T

co o

o

V I dt C

Δ = ∫

2oo

co

I d C

V f

⎛ ⎞×= ⎜ ⎟

Δ ×⎝ ⎠



26

Inductor Design L


Voltage across inductor Lduring d2Ts,

1 2 Ldi

L V V dt

= +

1 22 s

L

V V L d T

I

⎛ ⎞+= ×⎜ ⎟

Δ⎝ ⎠

Voltage across inductor L2 during (d1-d2)Ts,

1 L

o

di L V V

dt = −

( )1 1 2( )o

L

V V d d L

I f

− −=

Δ ×

L


I

Δ=

Voltage across inductor L2 during (1-d1)Ts,

Lo

di L V

dt = −

( )11os

L

V L d T

I

⎛ ⎞= − × −⎜ ⎟

Δ⎝ ⎠

L


I

Δ=

4.5. State-Space Analysis

Using the conventional KVL and KCL the following first order differential equations are

formulated for various inductor currents and capacitor voltages. These equations are now

transformed into state-space model given below.

MODE1: M1 and M2: ON, D1 and D2: OFF

By applying KVL and KCL to the circuit shown in Fig. 4.1(b),

( )

cc

c

dV V

dt C R r = −

+

1 2 L L Ldi V V r i

dt L L

+= −

co

c

RV V

R r =

+

1

0,

10

( )

L

c

r

L A

C R r

⎛ ⎞

−⎜ ⎟⎜ ⎟=⎜ ⎟−⎜ ⎟+⎝ ⎠

1

1 1,

0 0

B L L⎛ ⎞⎜ ⎟=⎜ ⎟⎝ ⎠

1 0c

R E

R r

⎛ ⎞= ⎜ ⎟

+⎝ ⎠



27

MODE2: M1: ON and M2: OFF, D1: OFF and D2: ON

By applying KVL and KCL to the circuit shown in Fig. 4.1(c),

( ) ( )

L cc

c c

dV Ri V

dt C R r C R r

= −

+ +

1 1c c L L L L

c c

di V r i r R RV i

dt L L R r L R r = − − −

+ +

cc Lo

c c

RV r RiV

R r R r = +

+ +

2

1 1

,1 1

( )

c L

c c

c c

r Rr R

L L R r L R r A

R

C R r C R r

⎛ ⎞− − −⎜ ⎟+ +

⎜ ⎟=⎜ ⎟

−⎜ ⎟+ +

⎝ ⎠

2

10

,

0 0

B L

⎛ ⎞⎜ ⎟=⎜ ⎟⎝ ⎠

2 c

c c

r R R E

R r R r

⎛ ⎞= ⎜ ⎟

+ +⎝ ⎠

MODE3: M1 and M2: OFF, D1 and D2: ON

By applying KVL and KCL to the circuit shown in Fig. 4.1(d),

( )

c c L

c c

dV V i R

dt C R r R r C = − −

+ +

1 1c L c L L L

c c

r i R RV di r i

dt L R r L L R r = − − −

+ +

c c Lo

c c

RV r i RV R r R r = ++ +

3

1 1

,1 1

( )

c L

c c

c c

r Rr R

L L R r L R r A

R

C R r C R r

⎛ ⎞− − −⎜ ⎟+ +

⎜ ⎟=⎜ ⎟

−⎜ ⎟+ +⎝ ⎠

3

0 0,

0 0 B

⎛ ⎞= ⎜ ⎟

⎝ ⎠3 c

c c

r R R E

R r R r

⎛ ⎞= ⎜ ⎟

+ +⎝ ⎠



28

CHAPTER 5

5.1. Introduction

Several controlling methods, including single-loop and multi-loop strategies, have been

reported for the dc-dc converters. Each of these control schemes has their own advantages and

limitations. Since there are two duty ratio’s that need to be controlled, one for current control

while the second for voltage regulation, it is required to identify the quantities (Vo/Iin) to be

controlled by duty ratio’s d1 and d2 . The control of such multivariable system has always been a

challenge to control system designers due to its complex interactive nature. Proportional plus

integral (PI) controllers tuned on single loop basis do not always guarantee overall stability when

all loops are closed. The block diagram is shown in fig for two-input, two-output system where

the interaction in the open loop plant is shown explicitly in the form of G 12 and G21. If the cross-

coupling transfer functions, G12(s) & G21(s), effect is significant then the individual controllers

must be designed based on the combined plant as shown in Fig. 5.1.

G11

G21

G12

G22

++

++

Y1

Y2

R1

R2

Fig.5.1. Block Diagram of the two-input integrated converter system

5.2. Pairing of control Inputs and Outputs

If one is to use a decentralized architecture, then one needs to pair the control inputs and

outputs. However, physical insight can often be used to suggest sensible pairings. One method

than can be used to suggest pairings by measuring the degree of coupling or interaction in a

system is known as the Relative Gain Array (RGA). This method is an analytical tool used to



29

determine the optimal input-output variable pairings for a multi-input-multi-output (MIMO)

system.

If the RGA is close to the identity matrix then the plant is decoupled, otherwise

interaction is present. One has to choose the pairings corresponding to RGA elements close to ‘1’

and avoid pairings on negative RGA elements in order to avoid instability. Also, large RGA-

elements signify a process that is very sensitive to small changes and therefore, controlling such

plant is difficult. Typically, the relative gain array is calculated by evaluating plant transfer

function at zero frequency and its mathematical expression is given by

( )1

(0)* (0)T

RGA G G−

=

5.3. Treating a MIMO system with SISO techniques

One major inherent problem with multivariable system is the effect of interactions,

closing of one loop affects the dynamics of remaining loops. This in effect makes single loop

design virtually impossible unless one resorts to the techniques like sequential loop closing and

individual channel design [ ].

Given the coupling degree of MIMO system, it’s possible to apply certain SISO

techniques like sequential loop closing and individual channel design for designing controllers.

5.3.1. Sequential Loop Closing Method

Fig.5.2. Block Diagram of Sequential Loop Closing Method



30

In sequential loop closing method, the fast loop controller is designed based on G22 alone

with other loop open. For designing slow loop, the overall transfer function with the presence of

interactions G12 and G21 and with fast loop closed can be used. Alternatively, the slow loop also

can be designed based on G11 alone neglecting the effect of fast loop on slow loop as being high

speed disturbance interaction on slow system. The sequence of closing loops affects the amount

of interaction entering into all the loops. It turns out that when the slower loop is tuned first. This

is because the slower loop is much more affected by interactions and tuning this first does not

allow any interactions to be considered in the compensator design. On the other hand, when the

faster loop is closed first, it has the advantage that it is less affected by any interactions.

Secondly, it allows the slower loop to be tuned last and hence able to take into account the

interactions resulting from the closure of the fast loop.

5.3.2. Individual Channel Design

Fig.5.3 Block Diagram of Individual Channel Design Method

In the individual channel design (ICD), Bode technique can be applied directly to the

channels not only when cross-coupling is weak but in all circumstances, including when cross-

coupling is strong. The multivariable system is decomposed into an equivalent set of SISO



31

systems. In individual channel design, the multivariable nature of the original plant is maintained

in the equivalent SISO systems without any loss of information.

When the plant cross-coupling is weak, the design task reduces to a set of SISO design

task and scalar controller can be designed separately for each channel. In such context, the most

appropriate methodology is to apply classical Bode analysis and design each channel. In this

thesis for the controller design of two-input integrated converter, two interdependent single-loop

control schemes are proposed as the cross-coupling is very small. This structure is capable of

maintaining the load voltage Regulation while ensuring the load distribution on the individual

sources. The control schemes can be interchangeable from one to other depending on their power

supplying capacity. To illustrate the control principle, current control-loop for low voltage source

(LVS), voltage control-loop for high voltage source (HVS) is shown in Fig.5.4.

Fig.5.4. Block Diagram of two loop control scheme

5.5. Digital Controller Design

The design of digital control system is the process of choosing the difference equation or

equivalent z-domain transfer function for the compensator, which will yield an acceptable

performance from the closed-loop system. The performance specifications can take on many

different forms, such as rise time, settling time, percent overshoot, close-loop frequency response

magnitude, bandwidth, or damping ratio. The digital controller can be easily adapted to changing

load requirements of the switching converter through programming. To design a digital

compensator, continuous time plant is converted into discrete plant using some approximate

technique. Once a discrete-time approximation of the plant is available then the discrete-time

compensator is designed directly in the z-domain using Bode plot or root-locus methods.



32

The main function of the controller in majority of switching converter is to provide a

regulated quantity, voltage or current at its output. This is achieved by sensing the load voltage

and current using the appropriate sampling networks and adjusting the duty cycle or switching

frequency of the power switching devices. The digital controller accepts the digitized sampled

output voltage and current. This information is then processed using a digital control algorithm.

The output of the digital controller is then used to drive the power switching devices through an

appropriate driver. The main disadvantage of digital controller is the time delays which are

present in the control loop due to the computation of the control algorithm by the processor as

well as delays in the signal flow in various parts of the electronic, digital and logic sensing

circuits, etc.

5.6. Digital Control Strategies

Current programmed control schemes can be broadly classified into three different

categories depending on the sensing instant of current. In power supplies, mostly the current

control is realized by sensing the inductor current, which will vary linearly (increasing or

decreasing). In any case the sensed inductor current may be peak, valley and average current.

Each of these current control schemes has their own advantages and limitations. The average

current sensing provides immunity to the current control loop against the switching noise, which

will be present in the sensed peak and valley current quantities. In view of these salient features

the average current control scheme is investigated in this study. Voltage control loop is realized

based on the load voltage. Voltage sensing instant is not significantly important as compared to

current as voltage is having nearly constant value at all time instants unlike inductor current. A

closed-loop control system designed with voltage mode and current mode controllers

automatically maintains a precise output voltage and Low voltage source input current to their

respective reference values regardless of varying input and loading conditions.

Several different compensator structures can be easily designed for voltage and current

control loop. However, the current controller is realized here by means of one zero and two-pole

structure, while the voltage controller uses two-zero and two-pole structure. Both of these

Compensators were designed in the frequency domain using Bode plot. Fine tuning of the

compensators were performed using MATLAB SISO tool to ensure stability margins. The

generalized block diagram for the control loop design is as shown in Fig.5.5.



33

G p(s)

Fm

K d

Gc(z)

ZOH

U(n) E(n)

d

Vo(n)/IL(n)

Vo

Ts

Vref /ILref +-

Fig.5.5. Block diagram of loop gain

In Fig.5.5 Gd(s) is replaced with G11(s) in case of voltage control loop design, while it is

G22(s) for current control loop design, Gc(s): Compensator, Fm: PWM generator transfer function,

‘K’ is the load voltage sensing gain, and loopgain TL(s)=KFmGc(s)Gd(s).

5.7. Power Management

The input-power distribution of the two input voltage sources and the input–output power

flow balancing are two important power management issues for the two-input dc/dc converter.Appropriate control methods are needed for different power distribution demands. Since the two-

input dc/dc converter has two input voltage sources and one output load with a regulated voltage,

the power for each one of them can be either controlled or undetermined. In this thesis, among

the all possible cases, the one case is chosen in which out of two input voltage sources the low-

voltage source provides limited power to the load and high-voltage source provides the rest of

the demanded power by the load. The high-voltage source is the main power source for the load,

and the low-voltage source is the auxiliary power source. For the constant load current demand,

if the input current of the low-voltage source is under controlled, then the high-voltage source

will provide the remaining current demanded by the load current.



34

Source/Load

Low voltage source controlled

High voltage source Supplies remaining

load demand

Load Controlled

3035

4045

50

0

200

400

6000

200

400

600

PLoLoad Power(Po)

P H I

Fig Variation of load distribution on the sources

From above 3-D plot, one can observe the dependence of the power PHI given by DC

source on the load power and controlled amount of power given by other DC source.



35

CHAPTER 6

6.1 Introduction

In the preceding sections modeling of the two-input integrated DC-DC converter and

digital controller design has been discussed. This chapter mainly presents stability studies using

developed model of the two-input integrated DC-DC converter.

6.2 Stability analysis of two-input integrated BUCK-SEPIC Converter

To verify the developed modeling and controller design, a 100W two-input buck-sepic

converter is designed to supply a constant load voltage of 24 V± 1% from a two different dc

sources, which are : (i) high voltage power source: 36 V, (ii) low voltage power source: 12 V.

The switching frequency of 50 kHz is used for driving both the switching devices with trailing-

edge modulation, where-in the converter switching devices turn-on instants are synchronized.

The two-input integrated buck-sepic converter and controller parameters are designed to meet the

specifications are listed in Table I.

Table 6.1 Converter and controller parameter

Power stage Controller

Source Voltage (V1)=36 VSource Voltage (V2)=12 V

Load Power= 100 W

Switching Frequency (f s)= 50 kHzInductor (L1)=155 μH

Inductor (L2)=157 μH

r L1= 0.2

r L2= 0.082 Capacitor (C) = 184 μF

Equivalent Series Resistance r c =0.370

Capacitor (Co)= 207 μF

Equivalent Series Resistance r co =0.188 Load Resistance = 10.5 Ω

( )( )( )( )

( )0.95437 0.947 0.914

1 0.744vG z

z z

z z

− −=

− −

( )( )

( )0.09754 0.834

1iG z

z

z

−=

−



36

For the given specifications and converter parameters, given in Table 6.1, a suitable

digital controller is designed in MATLAB platform using the available control design tool called

‘sisotool’ and various compensator design bode plots are generated and only the important one

are shown in Fig. .

The open loop control to output voltage transfer function, is shown in fig, is important

from controller design point of view. The controller bode plot is shown in fig, which essentially

provides necessary phase boost at desired cut-off frequency. Loop gain Bode plot shows system

stability information with gain margin of 26.1 dB and phase margin of 69.7 deg. Loopgain

stability information also can be obtained from the Nyquist plot. Nyquist plot shows there is no

encirclement about (-1, 0). Hence, the system is stable and it shows agreement with Bode plot

results. Step response of the system shows that system is stable and it follows the step input with

settling time of approximately 3 ms and without any peak overshoot in the system. It shows

over-damped nature.

Voltage Mode Controller

101

102

103

104

105

-225

-180

-135

-90

-45

0

P.M.: 41.8 deg

Freq: 1.61e+003 Hz

Frequency (Hz)

a s

e

e g

-30

-20

-10

0

10

20

G.M.: 29.8 dB

Freq: 2.5e+004 Hz

Stable loop

Open-Loop Bode Editor for Open Loop 1 (OL1)

M a g n i t u d e ( d B )

Fig. Open loop Control to output Bode Plot for Load voltage.



37

Bode Diagram

Frequency (Hz)10

110

210

310

410

5-90

-45

0

45

P h a s e ( d e g )

-5

0

5

10

15

20

25


Fig. Second Order Voltage Controller

101

102

103

104

105

-225

-180

-135

-90

-45

0

P.M.: 69.7 deg

Freq: 1.44e+003 Hz

Frequency (Hz)

-30

-20

-10

0

1020

30

40

G.M.: 26.1 dB

Freq: 2.5e+004 Hz

Stable loop



Fig. Loop gain



38

Open loop plant, controller, loopgain plot in single bode.

Nyquist Diagram

Real Axis

I m a g i n a r y A x i s

-1 -0.5 0 0.5 1 1.5 2 2.5-25

-20

-15

-10

-5

0

5

10

15

20

25

Fig. Close loop Nyquist plot



39

Step Response

Time (sec)

A m p l i t u d e

0 1 2 3 4 5 6

x 10-3

0

0.2

0.4

0.6

0.8

1

1.2

1.4

Fig. Pole-Zero Map

Current Mode Controller

101

102

103

104

105

-225

-180

-135

-90

-45

0

P.M.: 41.8 deg

Freq: 1.61e+003 Hz

Frequency (Hz)

a s e

e g

-30

-20

-10

0

10

20

G.M.: 29.8 dB

Freq: 2.5e+004 Hz

Stable loop






40

Bode Diagram

Frequency (Hz)10

110

210

310

410

5-90

-45

0

45

P h a s e ( d e g )

-5

0

5

10

15

20

25



101

102

103

104

105

-225

-180

-135

-90

-45

0

P.M.: 69.7 degFreq: 1.44e+003 Hz

Frequency (Hz)

-30

-20

-10

0

10

20

30

40

G.M.: 26.1 dB

Freq: 2.5e+004 Hz

Stable loop


M a g n i t u d e

( d B )

Fig. Loop gain



41

Nyquist Diagram

Real Axis


-1 -0.5 0 0.5 1 1.5 2 2.5-25

-20

-15

-10

-5

0

5

10

15

20

25


Step Response

Time (sec)

A m p l i t u d e

0 1 2 3 4 5 6

x 10-3

0

0.2

0.4

0.6

0.8

1

1.2

1.4

Fig. Pole-Zero Map

.



42

6.3. Simulation in PSIM

In order to confirm the controller design analysis, discussed in the preceding sections,

simulation studies have been carried out on the two-input BUCK-SEPIC converter. PSIM is used

for simulation purpose and the converter parameters used in these studies are given in Table. I.

With these parameters the closed-loop converter system regulation as well as load distribution

capability is tested for the following cases: (i) load perturbation R: 7.5 → 10 Ω, (ii) supply

voltage perturbation of 15 ±10%V, and the corresponding results are plotted in Figs. The steady-

state waveforms of the converter are shown in fig.

Fig. closed-loop control of two-input BUCK-SEPIC Converter

For constant load demand if there is any change in one of the source voltage, then at that

point of time the controllers will come into action such that they ensure the load voltage



43

regulation and re-distribution of the load among the input sources. This redistribution of load is

clearly shown in Fig.

These results show that the dynamic response is sluggish against the supply voltage

disturbance, while it is faster in case of load disturbance. Inductor current waveform is free from

sub-harmonic oscillations, which indicates the stability of the current control loop.

Fig. Load resistance changes from 10.5 ohm to 5.2

ohm (valley inductor current control)Fig. Load resistance changes from 10.5ohm to 5.2 ohm (average inductor

current control)

Fig. Load resistance changes from 10.5 ohm to 5.2ohm (peak inductor current control)

Fig. Load resistance changes from 10.5

ohm to 5.2 ohm (peak inductor currentcontrol)



44


ohm

Fig. Load resistance changes from 10.5

ohm to 5.2 ohm


ohm

Fig. Low voltage source changes form

12 V to 8V

Fig. Low voltage source changes form 12 V to 18V Fig. High voltage source changes form

36 V to 45V



45

Fig. High voltage source changes form 36 V to 24V

Fig. steady state waveform

Fig. Load distribution Fig. Variable Current Reference



46

To verify the developed modeling and controller design, a 100 W two-input buck-

buckboost converter is designed to supply a constant load voltage of 24± 1%V from a two

different dc sources. The two input integrated buck-buckboost converter and controller

parameters are designed to meet the specifications are listed in Table 6.2.

Table 6.2 Buck-buckboost converter parameters

Power stage Controller

Source Voltage (V1)=36 V

Source Voltage (V2)=12 V

Load Power= 100 WSwitching Frequency (f s)= 50 kHz

Inductor (L)=1018 μH

r L= 0.275 Ω

Capacitor (C) = 188 μFEquivalent Series Resistance r c1 =0.055 ΩLoad Resistance = 10.5 Ω

( )( )( )( )

( )1.250 0.99 0.65

1 0.1vG z

z z

z z

− −=

− −

( )( )( )

1.250 0.65

1iG z

z

z

−

= −

Voltage Mode Controller

101

102

103

104

105

-225

-180

-135

-90

-45

0

P.M.: 41.8 deg

Freq: 1.61e+003 Hz

Frequency (Hz)

a s e

e g

-30

-20

-10

0

10

20

G.M.: 29.8 dB

Freq: 2.5e+004 Hz

Stable loop


M a g n i t u d e

( d B )




47

Bode Diagram

Frequency (Hz)

101

102

103

104

105

-90

-45

0

45

P h a s e ( d e g )

-5

0

5

10

15

20

25

M a g n

i t u d e ( d B )


101

102

103

104

105

-225

-180

-135

-90

-45

0

P.M.: 69.7 deg

Freq: 1.44e+003 Hz

Frequency (Hz)

-30

-20

-10

0

10

20

30

40

G.M.: 26.1 dB

Freq: 2.5e+004 HzStable loop



Fig. Loop gain



48

Nyquist Diagram

Real Axis


-1 -0.5 0 0.5 1 1.5 2 2.5-25

-20

-15

-10

-5

0

5

10

15

20

25


Step Response

Time (sec)

A m p l i t u d e

0 1 2 3 4 5 6

x 10-3

0

0.2

0.4

0.6

0.8

1

1.2

1.4

Fig. Pole-Zero Map



49

Current Mode Controller

101

102

103

104

105

-225

-180

-135

-90

-45

0

P.M.: 41.8 deg

Freq: 1.61e+003 Hz

Frequency (Hz)

a

s e

e g

-30

-20

-10

0

10

20

G.M.: 29.8 dB

Freq: 2.5e+004 Hz

Stable loop




Bode Diagram

Frequency (Hz)10

110

210

310

410

5-90

-45

0

45

P h a s e (

d e g )

-5

0

5

10

15

20

25





50

101

102

103

104

105

-225

-180

-135

-90

-45

0

P.M.: 69.7 deg

Freq: 1.44e+003 Hz

Frequency (Hz)

-30

-20

-10

0

10

20

30

40

G.M.: 26.1 dB

Freq: 2.5e+004 Hz

Stable loop


M a g n i t u

d e ( d B )

Fig. Loop gain



51

Nyquist Diagram

Real Axis


-1 -0.5 0 0.5 1 1.5 2 2.5-25

-20

-15

-10

-5

0

5

10

15

20

25


Step Response

Time (sec)

A m p l i t u d e

0 1 2 3 4 5 6

x 10-3

0

0.2

0.4

0.6

0.8

1

1.2

1.4

Fig. Pole-Zero Map



52

6.5. Simulation in PSIM

In order to confirm the controller design analysis, discussed in the preceding sections,

simulation studies have been carried out on the two-input BUCK-BUCKBOOST converter.

PSIM is used for simulation purpose and the converter parameters used in these studies are given

in Table 6.2. With these parameters the closed-loop converter system regulation as well as load

distribution capability is tested for the following cases: (i) load disturbance R: 7.5→ 10 Ω, (ii)

Low voltage source voltage perturbation of 15 V ±10%, and (iii) high voltage source supply

voltage perturbation from 32 V→ 40 V and the corresponding results are plotted in Figs. The

steady- state waveforms of the converter are shown in fig.

Fig. closed-loop control of two-input BUCK-BUCKBOOST Converter



53

For constant load demand if there is any change in one of the source voltage then at that

point of time the controllers will come into action such that they ensure the load voltage

regulation and re-distribution of the load among the input sources. This redistribution of load is

clearly shown in Fig.

Fig. Load resistance changes from 10 ohm to

7.7 ohm

Fig. Low voltage source changes from 0V to12V

Fig. Low voltage source changes from 9V to

12V Fig High voltage source changes from 30V to36V



54

Fig. steady state waveforms

Fig. Load distribution



55

CHAPTER 7

7.1. Introduction

Microcontroller based digital control allows for the implementation of more functional

control schemes, standard control hardware design for multiple platforms and flexibility of quick

design modifications to meet specific customer needs. Digital controllers are less susceptible to

aging and environmental variations and have better noise immunity. Modern 16-bit dsPIC

controllers, such as dsPIC30F2020, with processor speed up to 30MHz and enhanced peripherals

such as, high resolution PWM module, 10-bit A/D converter with conversion rate up to

2000ksps, 17-bitx17-bit single-cycle hardware fractional/integer multiplier, 16-bit timers and

real-time code debugging capability, gives the power supply designers all the benefits of digital

control and allows implementation of high bandwidth, high frequency power supplies without

sacrificing performance.

To verify the theoretical analysis and simulation results, an experimental prototype of

double input integrated DC-DC converter is developed by using simulation parameters. dSPIC

30F2020 processor is used for realizing the designed controller for the converter.

7.2. Controller Implementation

The controller transfer function is given as, ( ) ( 1)( 2)

( ) ( 1)( 2)

d z k z a z a

e z z p z p

− −=

− −

( ) ( )2 2( ) 1 2 1 2 1 2 1 2 ( )d z z p p z p p k z a a z a a e z⎡ ⎤ ⎡ ⎤− + + = − + +⎣ ⎦ ⎣ ⎦

( ) 1 2 1 2( ) 1 1 2 1 2 1 ( 1 2) 1 2 ( )d z p p z p p z k a a z a a z e z− − − −⎡ ⎤ ⎡ ⎤− + + = − + +⎣ ⎦ ⎣ ⎦

In discrete form this controller is written as,

( ) ( 1 2) ( 1) 1 2 ( 2) ( ) ( 1 2) ( 1) 1 2 ( 2)d n p p d n p p d n ke n k a a e n ka a e n= + − − − + − + − + −

where, d is control output and e is the error voltage. The quantities with (n) denote the sampled

values for the current sampling cycles the quantities with (n-1) denote one sample old values and

so on. This controller is implemented using the dsPIC30F2020 digital signal controller

instruction set. During the code initialization the coefficients of the above controller are first

converted to a suitable fixed point format (Q format) in order to get the best accuracy out of this



56

16-bit processor. The fixed point format used for the controller coefficients is Q15. Once the

controller is implemented in the dsPIC, its closed loop dynamic performance is tested on a

double input integrated dc-dc converter.

7.4. Experimental Setup

Voltage &

Current

Sensor

Optocoupler

Signal Conditioning

Gate Driver

dsPIC30F2020

A/D

A/D

Voltage Controller

Current Controller

PWM1 PWM2

-+

-

+

Vref

Iref



7.5. Algorithm

START

ADC

Interrupt?

Wait for Interrupt

NO

Sample the load

voltage

Update the PWM

Duty Register

Enable ADC Interrupt

Calculate error and pass

it through Control Law

YES

Configure PWM,

ADC, Timer Units

Enable Peripherals