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Page 1: MIPS Data Path

MIPS Data Path

Ellen Spertus

MCS 111

October 23, 2001

Page 2: MIPS Data Path

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Readings and lectures

• HP has been growing in importance through the semester

• Now it is vital

• Recommendation– Read before lecture– Ask questions in lecture– Review as needed

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Big Picture

• Given devices that implement simple boolean functions…

• Understand how a computer works– Build an actual computer that you will

program– Study the MIPS architecture

• Write assembly language programs• Learn the implementation of a MIPS subset

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Implementing MIPS subset

• Review: Mite

• Definition of MIPS subset (5.1)

• Elements of the data path (5.2)

• Control of elements (5.3)

• Optimization (6)

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Review: Mite

B

bus

ALU

A

3s

LDB

in

out0

out1

LDA

F3F2F1F0

C'M

s6 s5 s4 s3 s2 s1 s0s7

DRALUDRCONST

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MIPS subset

• Word size: 32 bits

• Number of registers: 32

• Instruction length: 32 bits

• Types of instructions:– Memory: lw, sw– Arithmetic-logical: add, sub, and, or, slt

– Control flow: beq, jump

Mite

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Clocking methodology

• Defines when signals can be read and when they can be written.

• Write values on rising edge of clock

Clock cycle

Stateelement

1Combinational logic

Stateelement

2

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Data path elements

• Memory: PC, instruction, registers, data

• ALU• Which of these does Mite have?

PC

InstructionMemory

read address

instruction

read reg 1

read reg 2

write register

write data

read data 1

read data 2

Register File

AL

U

Data Memory

address

write data

read data

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Closer look at program counter (PC)

PC

InstructionMemory

read address

instruction

4

Ad

d

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Closer look at register file

• Sample instruction: – add $t1, $t2, $t3– add $9, $10, $11

write register

write data

Register File

read data 1

read data 2

read reg 1

read reg 2

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Register file: read

Register 0

Register 1

read reg 1

read reg 2

read data 1

read data 2

Register 2

Register 3

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Register file: write

write register

data

Register 0

Register 1

Register 3

Register 2

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Data path usage: arithmetic-logical

• Increment PC• Read registers• Use ALU

add $t1, $t2, $t3

add $9, $10, $11

PC

InstructionMemory

read address

instruction

read reg 1

read reg 2

write register

write data

read data 1

read data 2

Register File

AL

U

1011

9

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Data path usage: memory

• Increment PC• Read registers• Use ALU

lw $t0, 1($s0)

lw $8, 1($16)

Registers

Register #

Data

Register #

Datamemory

Address

Data

Register #

PC Instruction ALU

Instructionmemory

Address

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Data path usage: memory

• Increment PC• Read registers• Use ALU

lw $t0, 1($s0)

lw $8, 1($16)

PC

InstructionMemory

read address

instruction

read reg 1

read reg 2

write register

write data

read data 1

read data 2

Register File

AL

U

Data Memory

address

write data

read data

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A closer look at load/storelw $8, 1($16)

PC

InstructionMemory

read address

instruction

read reg 1

read reg 2

write register

write data

read data 1

read data 2

Register File

AL

U

Data Memory

address

write data

read data

5

5

5

16

32

32

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Mite: six bits to eight

B

bus

ALU

A

3s

LDB

in

out0

out1

LDA

F3F2F1F0

C'M

s6 s5 s4 s3 s2 s1 s0s7

DRALUDRCONST

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Assembly of conditional branches

• Assembly codeslt $t0, $a0, 2

bne $t0, $zero, recur

mov $v0, $t0

jr $ra

recur:

add $sp, $sp, 12

sw $ra, 8($sp)

...

• Machine code0: slti $8, $4, 2

4: bne $8, $0, __

8: add $2, $0, $8

12: jr $31

recur:

14: addi $29, $29, 12

16: sw $31, 8($29)

...

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• Increment PC• Read registers• Use ALU• Add offset to PC

beq $t1, $t2, label

Data path usage: control flow

PC

InstructionMemory

read address

instruction

read reg 1

read reg 2

write register

write data

SignExtend

Shiftleft 2

read data 1

read data 2

Register File

4

Ad

d

Ad

d

AL

U

zero?

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PC

InstructionMemory

read address

instruction

read reg 1

read reg 2

write register

write data

SignExtend

Shiftleft 2

mux

read data 1

read data 2

Register File

mux4

Ad

d

Ad

d

AL

U

Data Memory

address

write data

read data mux

The Simple Datapath


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