Memory ManagementMITM 205 Advanced Operating System Concepts
Mr. Alvin R. Malicdem
Professor
Memory Management Primary memory is a prime resource in
computer systems. Its management is an important function of
operating systems. In this area the operating system depends
heavily on hardware support, and the policies and data structures that are used are dictated by the support that is available.
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 2
Key Players in Memory Mgmt Compiler - structures the address space of an
application OS - maps the compiler’s structures onto the
hardware Hardware - performs the actual accesses to
memory locations
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 3
Mapping Memory Addresses Text Segment
this is the code, or machine instructions, of the application being executed, as created by the compiler
Data Segment contains predefined data structures, possibly
initialized before the program starts execution
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 4
Mapping Memory Addresses Heap
this is an area in memory used as a pool for dynamic memory allocation
Stack this is the area in memory used to store the
execution frames of functions called by the program
contain stored register values and space for local variables
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 5
Early Memory Management Most early systems are single-user
Batch systems One Program loaded in physical memory Runs to completion
Most memory managers implicitly allocate all memory to a user process
The main concern is protection of the OS from unauthorized access of the user
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 6
Modern Memory Management Multiprogramming systems - CPU being
transferred from one process to another Allows processes to occupy the memory at the
same time Allows processes whose memory requirement
exceeds that provided by the system Several processes are running and not all of them
will fit in memory
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 7
The Memory Hierarchy
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 8
Memory Binding (Data & Inst’n) Address binding of instructions and data to
memory addresses can happen at three different stages Compile time: If memory location known a
priori, absolute code can be generated; must recompile code if starting location changes
Load time: Must generate relocatable code if memory location is not known at compile time
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 9
Memory Binding … cont. Execution time: Binding delayed until run time
if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g., base and limit registers)
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 10
Logical vs. Physical Address Space The concept of a logical address space that is
bound to a separate physical address space is central to proper memory management Logical address – generated by the CPU; also
referred to as virtual address Physical address – address seen by the memory
unit
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 11
Logical vs. Physical Address Space Logical and physical addresses are the same
in compile-time and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 12
Memory-Management Unit (MMU) Hardware device that maps virtual to physical
address In MMU scheme, the value in the relocation
register is added to every address generated by a user process at the time it is sent to memory
The user program deals with logical addresses; it never sees the real physical addresses
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 13
Swapping Process currently occupying the memory will
have to give up its space to make way for higher priority process Usually those in I/O operation
Process: Write the core image of this process to the
backing store and the core center of the image of the higher priority process is read in
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 14
Schematic View of Swapping
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 15
Hierarchy of Storage devices
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 16
cachecache
main memorymain memory
secondary storagesecondary storage
Storage access time decreases
storage access speed increases
Storage capacity decreases
Program and data maybe referenced by the CPU directly
Programs and data must be moved to memory before they can be referenced by the CPU
Contiguous Allocation Main memory usually into two partitions:
Resident operating system, usually held in low memory with interrupt vector
User processes then held in high memory
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 17
Contiguous Allocation… cont. Relocation registers used to protect user
processes from each other, and from changing operating-system code and data Base register contains value of smallest physical
address Limit register contains range of logical addresses
– each logical address must be less than the limit register
MMU maps logical address dynamicallyDMMMSU-MLUC College of Information Technology, Center of Development in I.T. 18
Base and Limit Registers A pair of base and limit registers define the
logical address space
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 19
HW address protection with base and limit registers
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 20
Memory Allocation Fixed partitions Dynamic/Variable partitions
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 21
Partitioning Strategies – Fixed Fixed Partitions – divide memory into equal sized
pieces (except for OS) Degree of multiprogramming = number of partitions Simple policy to implement
All processes must fit into partition space Find any free partition and load the process
Problem – what is the “right” partition size? Process size is limited Internal Fragmentation – unused memory in a partition
that is not available to other processesDMMMSU-MLUC College of Information Technology, Center of Development in I.T. 22
Partitioning Strategies – Variable Idea: remove “wasted” memory that is not needed in
each partition Memory is dynamically divided into partitions based
on process needs Definition:
Hole: a block of free or available memory Holes are scattered throughout physical memory
New process is allocated memory from hole large enough to fit it
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 23
Variable Partitions More complex management problem
Must track free and used memory Need data structures to do tracking What holes are used for a process?
External fragmentation memory that is in holes too small to be usable by any process
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 24
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 25
OS
process 1
process 2
process 3
OS
process 1
process 3
Process 2Terminates
OS
process 1
process 3
Process 4Starts
process 4
Fragmentation External Fragmentation – total memory
space exists to satisfy a request, but it is not contiguous
Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 26
Fragmentation …cont. Reduce external fragmentation by
compaction Shuffle memory contents to place all free
memory together in one large block Compaction is possible only if relocation is
dynamic, and is done at execution time I/O problem
Batch job in memory while it is involved in I/O Do I/O only into OS buffers
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 27
Memory Allocation Mechanism MM system maintains data about free and allocated memory
alternatives Bit maps - 1 bit per “allocation unit” Linked Lists - free list updated and coalesced when not allocated to a
process At swap-in or process create
Find free memory that is large enough to hold the process Allocate part (or all) of memory to process and mark remainder as
free Compaction
Moving things around so that holes can be consolidated Expensive in OS time
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 28
Memory Management Policies Policy examples
First Fit: scan free list and allocate first hole that is large enough – fast
Next Fit: start search from end of last allocation Best Fit: find smallest hole that is adequate –
slower and lots of fragmentation Worst fit: find largest hole In general, First Fit is the winner
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 29
Paging Logical address space of a process can be
noncontiguous; process is allocated physical memory whenever the latter is available
Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8,192 bytes)
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 30
Paging Divide logical memory into blocks of same
size called pages Keep track of all free frames To run a program of size n pages, need to find
n free frames and load program Set up a page table to translate logical to
physical addresses Internal fragmentation
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 31
Address Translation Scheme Address generated by CPU is divided into:
Page number (p) – used as an index into a page table which contains base address of each page in physical memory
Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 32
page number page offset
d
m - n n
Paging Hardware
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 33
Paging Model of Logical and Physical Memory
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 34
Segmentation Memory-management scheme that supports user
view of memory A program is a collection of segments. A segment is
a logical unit such as:main program,
procedure, function,method,object,local variables, global variables,common block,stack,symbol table, arrays
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 35
User’s View of a Program
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 36
1
4
2
3
1
3
2
4
user space physical memory space
Segmentation Logical address consists of a pair:
<segment-number, offset> Segment table – maps two-dimensional
physical addresses; each table entry has: Base: contains the starting physical address
where the segments reside in memory. Limit: specifies the length of the segment.
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 37
Segment Look-up
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 38
segment 0
segment 1
segment 2
segment 3
segment 4
physical memory
segment #
+
virtual address
<?
raise protection fault
no
yes
offset
baselimit
Segment register tableIndex to segment register table
Physical
Address
Segmentation Hardware
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 39
Segmentation Example
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 40
END OF LECTUREMITM 205 Advanced Operating Systems Concepts
DMMMSU-MLUC College of Information Technology, Center of Development in I.T. 41