Lecture 11 Sequential Logic,ISA, ALU
Prof. Sin-Min Lee
Department of Computer Science
Registers
• Two independent flip-flops with clear and preset
Registers
• Missing Q, preset, clocks ganged• Inversion bubbles cancelled, so loaded with rising• Can make 8- bit register with this
Review: Bus Concept
Review: CPU Building Blocks Registers
(IR, PC, ACC) Control Unit
(CU) Arithmetic
Logic Unit (ALU)
The Simplest Computer Building Blocks
Instruction Register (IR) Program Counter (PC)
Control Unit (CU)
ALU
Accumulator (ACC)
0
1
2
3
4
5
.
CPU RAM
Status Register (FLAG)
John von Neumann with his computer at Princeton
What’s ALU?
1. ALU stands for: Arithmetic Logic Unit
2. ALU is a digital circuit that performs Arithmetic (Add, Sub, . . .) and Logical (AND, OR, NOT) operations.
3. John Von Neumann proposed the ALU in 1945 when he was working on EDVAC.
Typical Schematic Symbol of an ALU
A and B: the inputs to the ALU(aka operands)R: Output or Result F: Code or Instruction from the Control Unit (aka as op-code)D: Output status; it indicates cases such as:
•carry-in•carry-out, •overflow, •division-by-zero•And . . .
What is Computer Architecture?
• Computer Architecture is the design of the computer at the hardware/software interface.
• Computer Architecture = Instruction Set Architecture + Machine Organization
Computer Architecture
Instruction Set Design Machine Organization
at the above interface. of Hardware Components.
Compiler/System View Logic Designer’s View
Instruction Set Architecture• Instruction set architecture has the attributes of a computing system
as seen by the assembly language programmer or compiler. This includes
– Instruction Set (what operations can be performed?)
– Instruction Format (how are instructions specified?)
– Data storage (where is data located?)
– Addressing Modes (how is data accessed?)
– Exceptional Conditions (what happens if something goes wrong?)
• A good understanding of computer architecture is important for
compiler writers, operating system designers, and general computer programmers.
Instruction Set Architecture
• An abstract interface between the hardware and the lowest level software of a machine that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, I/O, and so on.
Key considerations in “Computer Architecture”
I/O systemInstr. Set Proc.
Compiler
OperatingSystem
Application
Digital DesignCircuit Design
Instruction Set Architecture
Firmware
• Coordination of many levels of abstraction
• Under a rapidly changing set of forces
• Design, Measurement, and Evaluation
Datapath & Control
Layout
Software
Hardware
Instruction Set Architecture: An Abstraction
• A very important abstraction– interface between hardware and low-level software– standardizes instructions, machine language bit patterns, etc.– advantage: different implementations of the same
architecture– disadvantage: sometimes prevents using new innovations
• Modern instruction set architectures:80x86/Pentium/K6, PowerPC, DEC Alpha, MIPS, SPARC, HP
IBM 360 architecture
• The first ISA used for multiple models– IBM invested $5 billion– 6 models introduced in 1964
• Performance varied by factor of 50
– 24-bit addresses (huge for 1964)• largest model only had 512 KB memory
– Huge success!– Architecture still in use today
• Evolved to 370 (added virtual addressing) and 390 (32 bit addresses).
“Let’s learn from our successes” ...
• Early 70’s, IBM took another big gamble
• “FS” – a new layer between ISA and high-level language– Put a lot of the OS function into hardware
• Huge failure
Moral: Getting right abstraction is hard!
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How to Program a Computer?• Most natural way is to encode whatever you want
to tell the computer to do with electrical signals (on and off)– since this is the only thing it understands
• Of course, we need something simpler to work with
• Machine Code• Assembly language• High-level languages
– C/C++, Fortran, Java, C#
Key ISA decisionsinstruction length
are all instructions the same length?
how many registers?
where do operands reside? e.g., can you add contents of memory to a register?
instruction format which bits designate what??
operands how many? how big? how are memory addresses computed?
operations what operations are provided??
Running examples
We’ll look at four example ISA’s:– Digital’s VAX (1977) - elegant
– Intel’s x86 (1978) - ugly, but successful (IBM PC)
– MIPS – focus of text, used in assorted machines
– PowerPC – used in Mac’s, IBM supercomputers, ...
• VAX and x86 are CISC (“Complex Instruction Set Computers”)
• MIPS and PowerPC are RISC (“Reduced Instruction Set Computers”)– almost all machines of 80’s and 90’s are RISC
• including VAX’s successor, the DEC Alpha
Instruction LengthVariable:
Fixed:
x86 – Instructions vary from 1 to 17 Bytes longVAX – from 1 to 54 Bytes
MIPS, PowerPC, and most other RISC’s: all instruction are 4 Bytes long
Instruction Length
• Variable-length instructions (x86, VAX):- require multi-step fetch and decode.
+ allow for a more flexible and compact instruction set.
• Fixed-length instructions (RISC’s) + allow easy fetch and decode.
+ simplify pipelining and parallelism.
- instruction bits are scarce.
What’s going on??
• How is it possible that ISA’s of 70’s were much more complex than those of 90’s?– Doesn’t everything get more complex?– Today, transistors are much smaller & cheaper, and
design tools are better, so building complex computer should be easier.
• How could IBM make two models of 370 ISA in the same year that differed by 50x in performance??
Microcode
• Another layer - between ISA and hardware– 1 instruction sequence of microinstructions – µ-instruction specifies values of individual wires– Each model can have different micro-language
• low-end (cheapest) model uses simple HW, long microprograms.
• We’ll look at rise and fall of microcode later
• Meanwhile, back to ISA’s ...
How many registers?
All computers have a small set of registersMemory to hold values that will be used soonTypical instruction will use 2 or 3 register values
Advantages of a small number of registers:It requires fewer bits to specify which one.Less hardwareFaster access (shorter wires, fewer gates)Faster context switch (when all registers need saving)
Advantages of a larger number:Fewer loads and stores neededEasier to do several operations at once
In 141, “load” means moving
data from memory to register,
“store” is reverse
How many registers?
VAX – 16 registers R15 is program counter (PC)
Elegant! Loading R15 is a jump instruction
x86 – 8 general purpose regs Fine print – some restrictions apply
Plus floating point and special purpose registers
Most RISC’s have 32 int and 32 floating point regsPlus some special purpose ones
• PowerPC has 8 four-bit “condition registers”, a “count register” (to hold loop index), and others.
Itanium has 128 fixed, 128 float, and 64 “predicate” registers
Where do operands reside?
Stack machine:“Push” loads memory into 1st register (“top of stack”), moves other regs down
“Pop” does the reverse.
“Add” combines contents of first two registers, moves rest up.
Accumulator machine:Only 1 register (called the “accumulator”)
Instruction include “store” and “acc acc + mem”
Register-Memory machine :Arithmetic instructions can use data in registers and/or memory
Load-Store Machine (aka Register-Register Machine):Arithmetic instructions can only use data in registers.
Load-store architecturescan do:
add r1=r2+r3
load r3, M(address)
store r1, M(address)
forces heavy dependence on registers, which is exactly what you want in today’s CPUs
can’t do:
add r1=r2+M(address)
- more instructions
+ fast implementation (e.g., easy pipelining)
Where do operands reside?
VAX: register-memory Very general. 0, 1, 2, or 3 operands can be in registers
x86: register-memory ...But floating-point registers are a stack.
Not as general as VAX instructions
RISC machines: Always load-store machines
I’m not aware of any accumulator machines in last 20 years. But they may be used by embedded processors, and might conceivable be appropriate for 141L project.
Comparing the Number of InstructionsCode sequence for C = A + B
Stack Accumulator Register-Memory Load-Store
Push A Load A Load R1,A
Push B Add B Load R2,B
Add Store C
Add C, A, B
Add R3,R1,R2
Pop C Store C,R3
Alternate ISA’sA = X*Y + X*Z
Stack Accumulator Reg-Mem Load-store
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Processing a C Program
C compiler
Assembler
swap:
muli $2, $5, 4add $2, $4, $2lw $15, 0($2)lw $16, 4($2)sw $16,0($2)sw $15, 4($2)jr $31
Assembly language program for MIPS
High-level language program (in C)
00000000101000010000000000011000000000001000111000011000001000011000110001100010000000000000000010001100111100100000000000000100101011001111001000000000000000001010110001100010000000000000010000000011111000000000000000001000
Binary machinelanguage program for MIPS
swap (int v[], int k){ int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; }
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Functions of a Computer
• Data processing
• Data storage
• Data movement
• Control
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Functions of a Computer
data movementsapparatus
source & destination of data
Control mechanism
Data storagefacility
Data processingfacility
112/04/20 Erkay Savas 70
Five Classic ComponentsComputer
Processor
Datapath
Control
Input
Output
System Interconnection
Memory
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Motherboard
Processor
SIMMSockets
PCI CardSlots
Parallel/Serial
IDEConnectors
PS/2connectors
USB 2.0
Sound
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Inside the Processor Chip
integerdatapath
floating-pointdatapath
Bus
Control
branchpredictionInstruction
Cache
Data Cache
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Computer
computer
peripherals
network
Systeminterconnection
Memory
I/OCPU
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CPU
CPUInternal CPU
interconnection
CacheMemory
RegistersALU
ControlUnit
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Memory
• Nonvolatile:– ROM– Hard disk, floppy disk, magnetic tape, CDROM, USB
Memory
• Volatile– DRAM used usually for main memory – SRAM used mainly for on-chip memory such as
register and cache– DRAM is much less expensive than SRAM– SRAM is much faster than DRAM
Application of Abstraction: A Hierarchical Layer of Computer
LanguagesHigh Level Language Program
Assembly Language Program
Machine Language Program
Control Signal Specification
Compiler
Assembler
Machine Interpretation
lw $15,0($2)
lw $16,4($2)
sw $16,0($2)
sw $15,4($2)
0000 1001 1100 0110 1010 1111 0101 10001010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111
°°
ALUOP[0:3] <= InstReg[9:11] & MASK
The Organization of a Computer
• Since 1946 all computers have had 5 main components
Control
Datapath
Memory
Processor
Input
Output