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Introduction To Small SignalAnd Averaged Switch Modeling
Robert V. [email protected]
Seminar Prepared For APEC 2015
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Seminar Introduction
• This Is An Introductory Seminar– Why Do We Need Small Signal Modeling?– Small Signal Model Derivation– Deriving Transfer Functions From The
Small Signal Model– Averaged Switch Modeling
• Detailed Examples (All The Algebra)
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Seminar Introduction: Not Discussed
• Models For Discontinuous Conduction Mode• Control Loop Design
– Error Amp/Compensator Design– Pole-Zero Placement– Loop Stability
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Seminar Introduction
• Much Of This Seminar Is Based On Material From “Fundamentals Of Power Electronics”, 2nd Edition, Erickson & Maksimovic,Kluwer Academic Publishers,ISBN 0-7923-7270-0– Chapter 7, AC Equivalent
Circuit Modeling– Chapter 8, Converter Transfer
Functions
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Seminar Introduction
• Timing– 90 Minutes Presentation– 30 Minute Break– 90 Minutes Presentation
• Ask Questions At Any Time• Fill Out The Survey Form!
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Controls 101 Review
PhysicalSystem(Plant)
InputU
OutputY
Issue: The Actual OutputIs Not The Desired Output
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Feedback
PhysicalSystem(Plant)
InputR Output
YController
ControlU
Goals:• Make the output track the reference input• Reject disturbances
Requirement: Remain stable at all times
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Stability
• Bounded Input-Bounded Output (BIBO)– Finite input results in finite output
• Lyapunov– System has an equilibrium point or points– Small disturbance from equilibrium results in
small change in output– Exponential: Output change decays in time
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Design And Analysis
PlantP(s)R YController
C(s)U
• Time domain solutions too tedious• Transform to frequency or s domain
+–
Errore
1P s C s
Y s R sP s C s
1
Y s P s C sH s
R s P s C s
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Design And Analysis
PlantP(s)R YController
C(s)U
• Time domain solutions too tedious• Transform to frequency or s domain
+–
Errore
1P s C s
Y s R sP s C s
1
Y s P s C sH s
R s P s C s
Stable Means
This Term Can Never Be Equal To Zero
H(s) Has No Poles In RHP
No RHP Poles In P(s) Or C(s)
Cancelled By Matching RHP Zeroes
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Design And Analysis
PlantP(s)R YController
C(s)U
• Time domain solutions too tedious• Transform to frequency or s domain
+–
Errore
1P s C s
Y s R sP s C s
1
Y s P s C sH s
R s P s C s
Only Applies ToLinear
Time Invariant(LTI)
Systems!
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ErrorAmp/
Compensator
Power Supply Model
Vref Vout+ –PowerStagePWM
VoltageDivider
Not LTI
Not LTI
We Need Circuit ModelsValid In The s-Domain
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Small Signal Modeling
Di t
ˆDv t
ActualV-ICurve
vD
iD
ID
VD
DCOperating
Point
ˆD D Di t I i t
ˆD D Dv t V v t
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Small Signal Modeling
Di t
ˆDv t
ActualV-ICurve
vD
iD
ID
VD
DCOperating
Point
ˆD D Di t I i t
ˆD D Dv t V v t
Linearized Characteristic
re
ˆˆD e Dv t r i t
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DC Model
PowerStage LoadVg VOUT
IOUT
D
Ig
Inputs• Input Voltage, Vg• Control Input, D• Load • Resistance, R
• Current, ILOAD• Voltage, VLOAD
Outputs• Output Voltage, VOUT• Input Current, Ig
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DC Model
LoadRVg VOUT
IOUTIg I(Vg, D, R) V(Vg, D, R)
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Buck Converter DC Model
vQ1
vQ2
TON TOFF
TS
D·TS (1-D)·TS= D’·TS
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Solving The Output VoltageInductor Volt-
Second Balance
Small Ripple Approximation
0
1 0ST
L L LTsS
v t v t v t dtT
0 0
0
1 1 0
0
S S
ON
S
ON
T TTon
L L LS S T
TTon
g C CT
v t dt v t dt v t dtT T
v v t dt v t dt
g g g
g g
g g g g
v t V v t
v t V
v t V v t V
C C C
C C
C C C C
v t V v t
v t V
v t V v t V
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Solving The Output Voltage
0
0
0
0
1 0
0
0
S
ON
TTon
g C CT
g C ON C S ON
g C S C S S
g C C
g C C C
g C
C g
V V dt V dt
V V T V T T
V V D T V T D T
V V D V D
D V DvV V D V
D V V
V D V
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Solving The Inductor CurrentCapacitor Charge Balance 0C CTs
i t i t
0 0
0
0
0
1 1 0
0
1 1 0
1 0
S S
ON
S
ON
S
ON
S
T TTon
C C CS S T
TTon
C CT
TTon
L C L CT
T
L C
i t dt i t dt i t dtT T
i t dt i t dt
i t v t dt i t v t dtR R
i t v t dtR
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Solving The Inductor Current
Small Ripple Approximation
C C
L L L
L L
L L L L
v t V
i t I i t
i t I
i t I i t I
0
1 0
1 0
1 0
1
ST
L C
L C S
L C
L C
I V dtR
I V TR
I VR
I VR
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Solving The Input Current
0
0 0
0 0 0
1
1
1 10
S
ON OFF
ON OFF ON
T
g g g gTsS
T T
g g gS
T T T
g gS S
i t i t I i t dtT
I i t dt i t dtT
i t dt dt i t dtT T
g L Li t i t I From TheSmall Ripple
Approximation1 1 1
g L ON L S L C OUTS S
I I T I D T D I D V D IT T R
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Buck Converter DC Model
LoadRVg VOUT
IOUTIg D·IOUT D·Vg
VgLoad
R
Ig 1:D
VOUT
IOUT
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AC (Small Signal) Modeling
PowerStage Loadˆg g gv V v
ˆg g gi I i
ˆO O Ov V v
ˆO O Oi I i
ˆd D d ˆ
ˆ
ˆ
ˆ
ˆ
g g
g g
O O
O O
v V
i I
v V
i I
d D
SmallSignalModeling
How Small is Small?Small Enough TheSystem Remains
Linear
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AC Modeling
PowerStage Loadˆgv
gi
ˆOv
Oi
d
Control To OutputTransfer Function ˆ 0
ˆˆ
g
Ovd
v
vGd
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AC Modeling
PowerStage Loadˆgv
gi
ˆOv
Oi
dAudio-
susceptibility Input ImpedanceOutput
Impedance
ˆ 0
ˆˆO
vgg d
vGv
ˆ 0
ˆˆg
ig d
vZ
i
ˆ ˆ0, 0
ˆˆ
g
OO
O d v
vZi
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Averaging
0.0000
0.2000
0.4000
0.6000
0.8000
1.0000
1.2000
1.4000
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
d Gate
I Iave
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Averaging
0.0000
0.2000
0.4000
0.6000
0.8000
1.0000
1.2000
1.4000
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
d Gate
I Iave
1 S
S
LLL L
CCC C
t T
T tS
d i tdi tL v t L v t
dt dtd v tdv t
C i t C i tdt dt
x t x t x t dtT
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Another View Of Averaging
0.0000
0.2000
0.4000
0.6000
0.8000
1.0000
1.2000
1.4000
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
d Gate
I Iave 1 S
S
t T
T tS
x t x t x t dtT
0 1 105 2 105 3 105 4 105 5 105 6 105 7 105 8 105 9 105 1 1060
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Hma fk
fk
Moving AverageFilter Response
+
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Modeling The Buck Converter:On Time
1 1
LL g O g C
CC L C L C
di tv t L v t v t v t v t
dtdv t
i t C i t v t i t v tdt R R
Small Ripple Approximation
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Modeling The Buck Converter:Off Time
1 1
LL C C
CC L C L C
di tv t L v t v t
dtdv t
i t C i t v t i t v tdt R R
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Averaging The Inductor Voltage
1
'
1
St T
L LtS
g C C
g C C
g C C C
g C
LL g C
v t v dT
d t v t v t d t v t
d t v t v t d t v t
d t v t d t v t v t d t v t
d t v t v t
d i tv t L d t v t v t
dt
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Averaging The Capacitor Current
Averaging The Input Current
1 1'
1
1
C L C L C
L C
CC L C
i t d t i t v t d t i t v tR R
i t v tR
d v ti t C i t v t
dt R
' 0g L
L
i t d t i t d t
d t i t
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Perturb And Linearize
DC Operating Point
Input Perturbation
ˆ
ˆg g gv t V v t
d t D d t
Resulting Output Perturbation
ˆ
ˆ
ˆ
L L L
C C C
g g g
i t I i t
v t V v t
i t I i t
Small Signal Constraint
ˆ
ˆg gv t V
d t D
ˆ
ˆ
ˆ
L L
C C
g g
i t I
v t V
i t I
gV C gV D V
1L CI V
R g LI D I
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Perturb And Linearize
Averaged Differential Equation
Substitute DC Plus Perturbation For Average Values:
Expand:
L
g C
d i tL d t v t v t
dt
ˆˆ ˆ ˆL L
g g C C
d I i tL D d t V v t V v t
dt
ˆ ˆ ˆˆ ˆ
ˆ
LLg g g g
C C
di tdIL L D V D v t V d t d t v tdt dt
V v t
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Perturb And Linearize
Collect Terms: DC Terms Equal Zero
Discard 2nd Order Terms
This Leaves A First Order Equation:
ˆ
ˆˆ ˆˆ ˆ
LLg C
g g C
g
di tdIL L D V Vdt dt
D v t V d t v t
d t v t
ˆ ˆˆ ˆL
g g C
di tL D v t V d t v t
dt
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Perturb And Linearize
Averaged Differential Equation
Substitute DC Plus Perturbation For Average Values:
Expand: DC Terms Equal Zero
1C
L C
d v tC i t v t
dt R
ˆ 1ˆ ˆC C
L L C C
d V v tC I i t V v t
dt R
ˆ 1 1ˆ ˆCC
L C L C
dv tdVC C I V i t v tdt dt R R
ˆ 1ˆ ˆC
L C
dv tC i t v t
dt R
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Perturb And Linearize
ˆˆ ˆ
ˆ ˆˆ ˆ
ˆ ˆˆ ˆ ˆ
g L
g g L L
L L L L
g L L L
i t d t i t
I i t D d t I i t
D I D i t I d t d t i t
i t D i t I d t d t i t
ˆˆ ˆg L Li t D i t I d t
©2015 Embedded Power Labs – All rights reserved
Construct The Model
ˆ ˆˆ ˆL
g g C
di tL D v t V d t v t
dt
ˆgD v t
gi t ˆ
gV d t L
Ldi tL
dt
Li t
C ˆCv t
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Construct The Model
1 ˆCv tR
R ˆCv t ˆCdv t
Cdt Li tC
ˆ 1ˆ ˆC
L C
dv tC i t v t
dt R
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Construct The Model
ˆˆ ˆg L Li t D i t I d t
ˆgv t
Li t
LD i t ˆLI d t
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Construct The Model
ˆgv t
gi t
ˆLI d t LD i t ˆgD v t
ˆgV d t L
Ldi tL
dt
Li t
C ˆCv t Li tC
ˆCv t ˆCdv t
Cdt R
1 ˆCv tR
ˆgv t
gi t
ˆLI d t
ˆgV d t
1: DL Li t
C ˆCv t R
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Control-To-Output Transfer Function
ˆ 0
ˆˆ
g
Cvd
v
v sG s
d s
0 ˆgv t
gi t
ˆLI d t
ˆgV d t
1: DL Li t
C ˆCv t R
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gi t
ˆLI d t
ˆgV d t
1: DL Li t
C ˆCv t R
Control-To-Output Transfer Function
ˆgV d t L Li t
C ˆCv t R
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Control-To-Output Transfer Function
ˆgV d t L Li t
C ˆCv t R
1||ˆˆ
1||C g
Rs Cv s V d s
s L Rs C
2
2
0 0
ˆ 1 1ˆ 11 1
Cvd g g
v sG s V VLd s s ss L C s
R Q
20
1L C
12
CQ RL
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ˆgv t
gi t
ˆLI d t
ˆgV d t
1: DL Li t
C ˆCv t R
Input To Output Transfer Function
ˆ 0
ˆˆC
vgg d
v sG s
v s
“Audiosusceptibility”
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Input To Output Transfer Function
L Li t
C ˆCv t R
gi t
ˆgD v t
ˆgv t
gi t 1: DL Li t
C ˆCv t R
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Input To Output Transfer FunctionL Li t
C ˆCv t R
gi t
ˆgD v t
1||ˆ ˆ
1||C g
Rs Cv s D v
s L Rs C
2
2
0 0
ˆˆ 11 1
Cvd
g
v s D DG s Lv s ss L C sR Q
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ˆgv t
gi t
ˆLI d t
ˆgV d t
1: DL Li t
C ˆCv t R
Input Impedance
ˆ 0
ˆˆg
ig d
v sZ s
i s
©2015 Embedded Power Labs – All rights reserved
Input Impedance
ˆgv t
gi t2
1 LD
2D C 2
1 RD
ˆgv t
gi t 1: DL Li t
C ˆCv t R
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Input Impedance
ˆgv t
gi t2
1 LD
2D C 2
1 RD
2 2 2
ˆˆ1||
gg
v si s L Rs
D D s D C
2 2 2
ˆ 1||ˆg
ig
v s L RZ s sD D s D Ci s
2
2
0 02 2
111
1 1i
s sLs s L C QR RRZ sD s R C D s R C
©2015 Embedded Power Labs – All rights reserved
Boost And Buck-Boost Models
Re-drawn from “Fundamentals of Power Electronics”, 2nd ed., Erickson and Maksimovic, Figure 7.17
ˆgv t
gi t L ˆCV d t
' :1D
ˆLI d t ˆCv tC R
ˆgv t
gi t
ˆLI d t
1: D Li t L ˆg CV V d t
' :1D
ˆLI d t C ˆCv t R
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Flyback Example
Magnetizing Inductance: L
D1 ForwardVoltage: VD
Q1 On Resistance: RON
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On-Time Circuit
C
g
g
L
L C
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Off Time Circuit
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Sketching The Inductor Waveforms
d·TS TS
Lv t
0
00
Lv t
Li t Li t
g ON Lv t R i t
D CN V v t
©2015 Embedded Power Labs – All rights reserved
Sketching The Capacitor Waveforms
S S
Cv t
Ci t
Cv t
Ci t
1Cv t
R
1L CN i t v t
R
©2015 Embedded Power Labs – All rights reserved
Averaging The Circuit Equations
On Time Off Time
1L g ON L
C C
g L
v t v t R i t
i t v tR
i t i t
1L g ON L
C C
g L
v t v t R i t
i t v tR
i t i t
1
0
L D c
C L C
g
v t N V v t
i t N i t v tR
i t
1
0
L D c
C L C
g
v t N V v t
i t N i t v tR
i t
©2015 Embedded Power Labs – All rights reserved
Averaging The Inductor Voltage
'
' '
L g ON L
D c
g ON L
c D
v t d t v t R i t
d t N V v t
d t v t d t R i t
d t N v t d t N V
' '
LL
g ON L
c D
d i tL v t
dtd t v t d t R i t
d t N v t d t N V
©2015 Embedded Power Labs – All rights reserved
Averaging The Capacitor Current
1
1'
1'
C C
L C
L C
i t d t v tR
d t N i t v tR
d t N i t v tR
1'
cC
L C
d v tC i t
dt
d t N i t v tR
©2015 Embedded Power Labs – All rights reserved
Averaging The Input Current/Perturbation
Perturbing The Inputs Perturbed Circuit Variables
Substitute Expressions Into Averaged Differential Equations
' 0g L
L
i t d t i t d t
d t i t
ˆ
ˆ' 1 1
ˆg g g
d t D d t
d t d t D d t
V t V v t
ˆ
ˆ
ˆ
L L L
C C C
g g g
i t I i t
v t V v t
i t I i t
©2015 Embedded Power Labs – All rights reserved
Averaging The Inductor Voltage
' '
LL
g ON L
c D
d i tL v t
dtd t v t d t R i t
d t N v t d t N V
ˆˆ ˆ ˆˆ
ˆ ˆˆ1 1
L Lg g ON L L
C C D
d I i tL D d t V v t D d t R I i t
dtD d t N V v t D d t N V
!
©2015 Embedded Power Labs – All rights reserved
Averaging The Inductor Voltage
ˆˆ ˆˆ ˆLL
g g g g
d i td IL L D V D v t V d t d t v t
dt dt
ˆ ˆˆ ˆ
ˆ ˆˆ ˆ ˆˆ
ON L ON L ON L ON L
C C C C C C
D D D
D R I D R i t R vI d t R d t i t
N V N v t D N V D N v t N V d t N v t d t
N V D N V N V d t
!
©2015 Embedded Power Labs – All rights reserved
Averaging The Inductor Voltage !
ˆ
ˆˆ ˆ ˆ ˆ
ˆ
ˆ ˆˆ ˆ ˆˆˆ ˆ
LLg ON L C C D D
g
g ON L C D
ON L
C C
g ON L C
d i td IL L D V D R I N V D N V N V D N V
dt dtD v t
V d t R I d t N V d t N V d t
D R i t
N v t D N v t
d t v t R d t i t N v t d t
©2015 Embedded Power Labs – All rights reserved
Averaging The Inductor Voltage !
Get The Same Result By InductorVolt-Second Balance Calculation
0
1 1
' '
1'
L
g ON L C C D D
g ON L C D
C g ON L D
C g ON L D
d IL
dtD V D R I N V D N V N V D N V
D V R I D N V D N V
D N V D V R I D N V
DV V R I VD N
©2015 Embedded Power Labs – All rights reserved
Averaging The Inductor Voltage
ˆ
ˆ ˆ ˆ ˆ
ˆ
ˆ ˆ
ˆˆ
ˆ
ˆ1
Lg
g ON L C D
ON L
C C
g
g ON L C D
ON L
C
d i tL D v t
dtV d t R I d t N V d t N V d t
D R i t
N v t D N v t
D v t
V R I N V V d t
D R i t
D N v t
©2015 Embedded Power Labs – All rights reserved
Construct The Model
ˆˆ
ˆ ˆ'
Lg g ON L C D
ON L C
d i tL D v t V R I N V V d t
dtD R i t D N v t
ˆgD v t Ld i tL
dt
OND RL ˆg ON L C DV R I N V V d t
ˆ' CD N v t
Li t
©2015 Embedded Power Labs – All rights reserved
ˆ ˆ ˆ
ˆ ˆˆ
1 1 ˆ
CCL L L L
L L
C C
d v td VC C N I N i t D N I D N i t
dt dtN I d t N i t d t
V v tR R
Averaging The Capacitor Current !
1'c
L C
d v tC d t N i t v t
dt R
ˆ 1ˆ ˆ ˆ1C C
L L C C
d V v tC D d t N I i t V v t
dt R
©2015 Embedded Power Labs – All rights reserved
Averaging The Capacitor Current !
ˆ 1ˆˆ ˆ'C
L L C
d v tC D N i t N I d t v t
dt R
ˆ 1
ˆ ˆ
ˆ
1 ˆ
CCL L C
L L
L
C
d v td VC C N I D N I V
dt dt RN i t D N i t
N I d t
v tR
©2015 Embedded Power Labs – All rights reserved
Averaging The Capacitor Current !
1' 0
1'
1 1'
CL
L C
L C
d VC D N I V
dt R
D N I VR
I VD N R
Get The Same Result By CapacitorCharge Balance Calculation
©2015 Embedded Power Labs – All rights reserved
Constructing The Model
ˆ 1ˆˆ ˆ'C
L L C
d v tC D N i t N I d t v t
dt R
ˆCv t ˆCd v t
Cdt ˆ' LD N i t ˆ
LN I d t
1 ˆCv tR
RC
©2015 Embedded Power Labs – All rights reserved
Averaging The Input Current
ˆˆ ˆ
ˆ ˆˆ ˆ
ˆˆ ˆ
g L
g g L L
L L L L
g L
g L L
i t d t i t
I i t D d t I i t
D I D i t I d t d t i tI D I
i t D i t I d t
©2015 Embedded Power Labs – All rights reserved
Constructing The Model
ˆˆ ˆg L Li t D i t I d t
gi t
ˆgv t ˆLI d t LD i t
©2015 Embedded Power Labs – All rights reserved
Completing The Flyback Model
ˆLI d t
LD i t ˆgD v t L
Ld i tL
dt
Li t OND R ˆ
g ON L C DV R I N V V d t
ˆ' CD N v t ˆgv t
gi t
ˆgv t
gi t
ˆLI d t
Li t
Ld i tL
dt
LOND R
ˆg ON L C DV R I N V V d t
ˆ' CD N v t
1: D
©2015 Embedded Power Labs – All rights reserved
Completing The Flyback Model
ˆ' CD N v t ˆ' LD N i t
ˆLN I d t
C
ˆCd v tC
dt ˆCv t
1 ˆCv tR
R
R
1 ˆCv tR
ˆCv t ˆCd v t
Cdt ˆ
LN I d t
':1N D
C
©2015 Embedded Power Labs – All rights reserved
Complete Flyback Model
ˆg ON L C DV R I N V V d t
gi t
ˆLI d t
1: D Li t
Ld i tL
dt
LOND R ':1N D
R ˆCv t ˆCd v t
Cdt ˆ
LN I d t C
©2015 Embedded Power Labs – All rights reserved
Complete Flyback Model
gi t
ˆLI d t
1: D
+
©2015 Embedded Power Labs – All rights reserved
Complete Flyback Model
1: D Li t
Ld i tL
dt
L
+
©2015 Embedded Power Labs – All rights reserved
Complete Flyback Model
ˆg ON L C DV R I N V V d t
Li t
Ld i tL
dt
LOND R ':1N D
ˆLN I d t
+
©2015 Embedded Power Labs – All rights reserved
Complete Flyback Model
Li t
Ld i tL
dt
LOND R ':1N D
+
©2015 Embedded Power Labs – All rights reserved
Complete Flyback Model
R ˆCv t ˆCd v t
Cdt ˆ
LN I d t C
+
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
ˆ 0
ˆˆ
g
Cvd
v
v sG s
d s
0
ˆg ON L C DV R I N V V d t
gi t
ˆLI d t
1: D Li t
Ld i tL
dt
LOND R ':1N D
R ˆCv t ˆCd v t
Cdt ˆ
LN I d t C
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
Still Have Two dhat Terms
Solve By Using Superposition
ˆg ON L C DV R I N V V d t
Li t
Ld i tL
dt
LOND R ':1N D
R ˆCv t ˆCd v t
Cdt ˆ
LN I d t C
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
ˆg ON L C DV R I N V V d t
Li t
Ld i tL
dt
LOND R ':1N D
R ˆCv t ˆCd v t
CdtC
Li t
Ld i tL
dt
LOND R ':1N D
R ˆCv t ˆCd v t
Cdt ˆ
LN I d t C
©2015 Embedded Power Labs – All rights reserved
ˆg ON L C DV R I N V V d t
Li t
Ld i tL
dt
LOND R ':1N D
R ˆCv t ˆCd v t
CdtC
Control-To-Output Transfer Function ' g ON L C DV V R I N V V
Li t LOND R ˆ'V d t
'C 'R ˆ' CN D v t
2' 'R N D R
2''
CCN D
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
Li t LOND R ˆ'V d t
'C 'R ˆ' CN D v t
1
1' ||' ˆˆ' '1' ||
'1' ||ˆ ' '
ˆ 1' ' ||'
C
ON
Cvd
ON
Rs CN D v s V d t
s L D R Rs C
Rv s V s CG sN Dd t s L D R R
s C
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
2
2
1'1 ' ''' || 1' ' 1 ' ''
'1 '' ||
1 ' '' 1 ' '1 ' 1 ' '' ||
' 1 ' ''
' ' ' ' '
'' ' '
ON ON
ON ON
ON ON
Rs C Rs CR
s C s C s R CRs CRR
s R Cs C s R CR s R Cs L D R R s L D R
s C s R CR
s L s R C L D R s D R R C R
RR D R s L s D R R C s
2
1'
1' ''
1
1 ' '' 'ON
ON
RR C L
R
D R Ls D R C s C LR R
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
2
1' ||1'
1' || 1 ' '' ' '
ONON ON
Rs C
D R Ls L D R R s D R C s C Ls C R R
2' 'R N D R 2''
CCN D
2
2 2 2 2
1
1' ' ' 'ON
OND R L C Cs D R s L
N D R N D R N D N D
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
' g ON L C DV V R I N V V
1
22 2 2 2
' 1'
1' ' ' '
vd
ON ON
G sV
N D D R D R CL L Cs sN D R N D R N D N D
©2015 Embedded Power Labs – All rights reserved
ˆCv t ˆLN I d t
' :1N DOND R Li t
Control-To-Output Transfer Function
ˆCv tRC ˆLN I d t
2''
OND RRN D
2'
'LL
N D
Li t
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
ˆCv tRC ˆLN I d t
2''
OND RRN D
2'
'LL
N D
Li t
1ˆˆ ' ' || ||
1ˆ1 1 1
1' '
C L
L
v t N I d t s L R Rs C
N I d t
s L R Rs C
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
2
1 11 1 1 1 1
1' ' ' '
11 1' '
1' ' 1
' '
' '' ' ' '
s Cs L R R s L R R
s C
s R Cs L R R
R s L R s R CR s L R
R s L RR s L R s R C R s R L C
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
2
2
1' '1
1 1 1 1' ' ' '1' '
' '' '1 ' '
R s L R RR R s L s R C R s R L C
s L R R Rs C
s L RR Ls R C s L CR R
2''
LLN D
2'
'OND RR
N D
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
2 2
2 22
2 2
' '
' '1
' '
ON
ON
ON
D RLsN D N D
D R LN D N D D R Ls C s C
R R N D N D
2
22 2 2 2
1'
1' ' ' '
ON
ON ON
s L D RN D
D R D R CL L Cs sN D R N D R N D N D
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
2
ˆˆC
vd
v tG s
d t
2
22 2 2 2
1'
1' ' ' '
ON
L
ON ON
s L D RN D
N ID R D R CL L Cs s
N D R N D R N D N D
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
1 2vd vd vdG s G s G s
1 2
1 2
vd vd vdvd
vd vd vd
num G s num G s num G sG s
den G s den G s den G s
1 2vd vd vdden G s den G s den G s
1 2vd vd vdvd
vd vd
num G s num G s num G sG s
den G s den G s
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
1
2 2
''
1'
vd
vd L ON
Vnum G sN D
num G s N I s L D RN D
1 2 2
' 1' '
vd vd L ONVnum G s num G s N I s L D R
N D N D
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
1 2 2 2
' '' '
L ONvd vd
N I s L D RV N Dnum G s num G sN D N D
2
2
2
' ''
' ' 1' ''
' ' 1' ' '
ON L L
ON L L
ON L
ON L L
ON L
V N D N D R I s N I LN D
V N D N D R I N I LsV N D N D R IN D
V D D R I N I LsN D V N D N D R I
!
©2015 Embedded Power Labs – All rights reserved
Control To Output Transfer Function !
1' '
1
Dimensionless
L
ON L
N I LsV N D N D R I
v sA vs Av A v
Quick check on the algebra: Are the units correct?
©2015 Embedded Power Labs – All rights reserved
Control-To-Output Transfer Function
' g ON L C DV V R I N V V
2
22 2 2 2
' ' 1' ' '
1' ' ' '
ON L L
ON Lvd
ON ON
V D D R I N I LsN D V N D N D R I
G sD R D R CL L Cs s
N D R N D R N D N D
!
©2015 Embedded Power Labs – All rights reserved
Averaging Summary
• Write Circuit Differential Equations For Each State In Terms Of Averaged Values
• Average Over One Switching Cycle– Inductor Current– Capacitor Voltages
• Perturb And Linearize– DC Terms Are Zero– Discard 2nd And Higher Order Terms
• Construct The Circuit Model
©2015 Embedded Power Labs – All rights reserved
Averaged Switch Modeling
g O
1
1
2
2
Two Port Switch Network Includes All Nonlinear
And Time Varying Elements
EverythingElse Is
LTI
©2015 Embedded Power Labs – All rights reserved
Boost And Buck-BoostSwitch Networks
g O
1
1
22
©2015 Embedded Power Labs – All rights reserved
Averaged Switch Modeling
©2015 Embedded Power Labs – All rights reserved
Averaged Switch Modeling
©2015 Embedded Power Labs – All rights reserved
Averaged Switch Modeling
Large SignalModel!
©2015 Embedded Power Labs – All rights reserved
Averaged Switch Modeling
Circuit SimulationTime Domain
(e.g. Transient Response)Frequency Domain
(e.g. Bode Plots)
LinearizationSmall Signal
Analytical Models Transfer Functions
©2015 Embedded Power Labs – All rights reserved
Buck Converter Model:Define Switch Network And Ports
Port 1: v1, i1Port 2: v2, i2
©2015 Embedded Power Labs – All rights reserved
Buck Converter Model:Sketch Waveforms
v1(t)
i1(t)
v2(t)
i2(t)
0
vg
vg
iL
iL
<v1(t)>
<v2(t)>
<i1(t)>
<i2(t)>
0 d·TS TS
0
0
0
©2015 Embedded Power Labs – All rights reserved
Buck Converter Model:Average Switch Network Variables
v1(t)
i1(t)
v2(t)
i2(t)
0
vg
vg
iL
iL
<v1(t)>
<v2(t)>
<i1(t)>
<i2(t)>
0 d·TS TS
0
0
0
1
1
2
2
'
' 0
' 0
'
g g
g
L
L
g
g
L L
L
v t d v t d v t
v t
i t d i t d
d i t
v t d v t d
d v t
i t d i t d i t
i t
©2015 Embedded Power Labs – All rights reserved
Buck Converter Model:Eliminate Non-Switch Variables
1
1
2
2
'
' 0
' 0
'
g g
g
L
L
g
g
L L
L
v t d v t d v t
v t
i t d i t d
d i t
v t d v t d
d v t
i t d i t d i t
i t
2 1gv t d v t d v t
©2015 Embedded Power Labs – All rights reserved
Buck Converter Model:Eliminate Non-Switch Variables
2 1gv t d v t d v t
1 2Li t d i t d i t
1
1
2
2
'
' 0
' 0
'
g g
g
L
L
g
g
L L
L
v t d v t d v t
v t
i t d i t d
d i t
v t d v t d
d v t
i t d i t d i t
i t
©2015 Embedded Power Labs – All rights reserved
Buck Converter Model:Create Switch Network Model 1 2i t d t i t 2 1v t d t v t
1v t 2v t
1i t 2i t
d t
1d t v t 2d t i t
!
©2015 Embedded Power Labs – All rights reserved
Buck Converter Model:Complete The Converter Model
!
©2015 Embedded Power Labs – All rights reserved
Buck Converter Model:Complete The Converter Model
!
©2015 Embedded Power Labs – All rights reserved
Another View Of TheAverage Switch Model
+
A
P
C
©2015 Embedded Power Labs – All rights reserved
Another View Of TheAverage Switch Model
A
PC
+
©2015 Embedded Power Labs – All rights reserved
Another View Of TheAverage Switch Model
AP
Cg
g Q
L
D
D
CR
CL
+
©2015 Embedded Power Labs – All rights reserved
Another View Of TheAverage Switch Model
A
P
C
1v t 2v t
1i t 2i t
d t
1d t v t 2d t i t
+
©2015 Embedded Power Labs – All rights reserved
Another View Of TheAverage Switch Model
1v t 2v t
1i t 2i t
d t
1d t v t 2d t i t
A
P
C
+
©2015 Embedded Power Labs – All rights reserved
Another View Of TheAverage Switch Model
1: d tA Ai t
P
C Ci t
APv t CPv t
+
©2015 Embedded Power Labs – All rights reserved
Simulating Buck Converter WithAveraged Switch Model
• FSWITCH = 500 kHz• Vg = 12 Vdc• VO = 3 Vdc• D = 0.25• IO = 3 A• RO = 1 Ω
• ∆IL = 20% IO = 0.6 A L = 7.5 µH
• C = 33 µF– ESR = 50 mΩ– FZERO = 96.5 kHz– ∆VC= 9.1 mV
(capacitor only)
• F0 = 10.1 kHz• Q = 2.1 = 6.4 dB
©2015 Embedded Power Labs – All rights reserved
LTspice Model: DC Sweep
Vg
12
L1
7.5µ
C1
33µ
ESR0.05 RO
Ro
Vdhat
0
B2
V=V(d)*Vg
B1
I=V(d)*I(L1)
VD_nom
Dnom
dd
v2 vov1
.dc VD_nom 0 0.95 0.01
.param Vg = 12
.param Vo_nom = 3
.param Ro = 1
.param Dnom = (Vo_nom/Vg)
.param Io_nom = Vo_nom/Ro
Input Parameters (Vg, Vo_nom, Ro) Calculated Parameters (Io_nom, Dnom)
VD_nom sets the dc duty cycle operating point
Vdhat sets the variation around the dc operating pointSet to zero for dc sweep analysis
+
©2015 Embedded Power Labs – All rights reserved
LTspice Model: DC Sweep
0mV 100mV 200mV 300mV 400mV 500mV 600mV 700mV 800mV 900mV0V
1V
2V
3V
4V
5V
6V
7V
8V
9V
10V
11V
12VV(vo)
+
©2015 Embedded Power Labs – All rights reserved
Vg
12
L1
7.5µ
C1
33µ
ESR0.05 RO
Ro
Vdhat
PULSE(0.025 -0.025 0 1u 1u 1m 2m)
B2
V=V(d)*Vg
B1
I=V(d)*I(L1)
VD_nom
Dnom
dd
v2 vov1
.tran 5m
.param Vg = 12
.param Vo_nom = 3
.param Ro = 1
.param Dnom = (Vo_nom/Vg)
.param Io_nom = Vo_nom/Ro
Input Parameters (Vg, Vo_nom, Ro)Calculated Parameters (Io_nom, Dnom)
VD_nom sets the dc duty cycle operating point
Vdhat sets the variation around the dc operating point
LTspice Model: Transient Response
©2015 Embedded Power Labs – All rights reserved
0.0ms 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms0.4A
0.8A
1.2A
1.6A
2.0A
2.4A
2.8A
3.2A
3.6A
4.0A
4.4A2.4V
2.5V
2.6V
2.7V
2.8V
2.9V
3.0V
3.1V
3.2V
3.3V
3.4V
3.5V
220mV
225mV
230mV
235mV
240mV
245mV
250mV
255mV
260mV
265mV
270mV
275mV
280mV
I(L1) -I(Vg)
V(vo)
V(d)
LTspice Transient Simulation
©2015 Embedded Power Labs – All rights reserved
LTspice Model: Plotting Gvd
Vg
12
L1
7.5µ
C1
33µ
ESR0.05 RO
Ro
AC 1
Vac
0
B2
V=V(d)*Vg
B1
I=V(d)*I(L1)
VD_nom
Dnom
dd
v2 vov1
.param Vg = 12
.param Vo_nom = 3
.param Ro = 1
.param Dnom = (Vo_nom/Vg)
.param Io_nom = Vo_nom/Ro
.ac dec 50 25 250k
Input Parameters (Vg, Vo_nom, Ro)Calculated Parameters (Io_nom, Dnom)
VD_nom sets the dc duty cycle operating point
Vac is the sweep source
©2015 Embedded Power Labs – All rights reserved
LTspice Model
100Hz 1KHz 10KHz 100KHz-30dB
-25dB
-20dB
-15dB
-10dB
-5dB
0dB
5dB
10dB
15dB
20dB
25dB
30dB
-200°
-180°
-160°
-140°
-120°
-100°
-80°
-60°
-40°
-20°
0°
20°
40° V(vo)
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
AP
C
1: d tA Ai t
P
C Ci t
APv t CPv t
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
AP
C
1:dt
A
Ait
P
C
Cit
AP
vt
C
Pv
t
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
Vg
380
B1
I=-V(d)*I(B2)
B2
V=V(d)*(V(Vg)-V(Va))
Lpri12m
B3
V=-V(Va)/TR
B4
I=-I(VD)/TR
C0
47µ
R03
Vdhat
0
VD_nom
D0
VD
0.4
Va
dd
Vg Vo
VL
.op.IC V(Vo) = 12.IC I(Lpri) = 0.494
.param D0 0.2646
.param TR 11
VD_nom sets the dc duty cycle operating point
Vdhat sets the variation around the dc operating
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
Vg
380
B1
I=-V(d)*I(B2)
B2
V=V(d)*(V(Vg)-V(Va))
Lpri12m
B3
V=-V(Va)/TR
B4
I=-I(VD)/TR
C0
47µ
R03
Vdhat
0
VD_nom
D0
VD
0.4
Va
dd
Vg Vo
VL
.op.IC V(Vo) = 12.IC I(Lpri) = 0.494
.param D0 0.2646
.param TR 11
VD_nom sets the dc duty cycle operating point
Vdhat sets the variation around the dc operating
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
Vg
380
B1
I=-V(d)*I(B2)
B2
V=V(d)*(V(Vg)-V(Va))
Lpri12m
B3
V=-V(Va)/TR
B4
I=-I(VD)/TR
C0
47µ
R03
0
Vdhat
VD_nom
1
VD
0.4
Va
dd
Vg Vo
VL
.dc VD_nom 0.0 0.95 0.025*.IC V(Vo) = 12*.IC I(Lpri) = 0.494
*.param D0 0.param TR 11
VD_nom sets the dc duty cycle operating point
Vdhat sets the variation around the dc operating point
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
0mV 100mV 200mV 300mV 400mV 500mV 600mV 700mV 800mV 900mV-70V
0V
70V
140V
210V
280V
350V
420V
490V
560V
630V
700VV(vo)
D =0 D =0.95
V = 0
V = 630
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
Vg
380
B1
I=-V(d)*I(B2)
B2
V=V(d)*(V(Vg)-V(Va))
Lpri12m
B3
V=-V(Va)/TR
B4
I=-I(VD)/TR
C0
47µ
R03
Vdhat1
PULSE(-0.05 0.05 2m 10n 10n 2m 5m)VD_nom
D0
VD
0.4
Va
dd
Vg Vo
VL
.tran 20m.IC V(Vo) = 12.IC I(Lpri) = 0.494
.param D0 0.2646
.param TR 11
VD_nom sets the dc duty cycle operating point
Vdhat sets the variation around the dc operating p
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
0ms 2ms 4ms 6ms 8ms 10ms 12ms 14ms 16ms 18ms 20ms80mA
160mA
240mA
320mA
400mA
480mA
560mA
640mA
720mA
800mA
880mA6V
7V
8V
9V
10V
11V
12V
13V
14V
15V
16V
17V
18V
I(Lpri)
V(vo)
Vout
IL_PRI
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
Vg
380
B1
I=-V(d)*I(B2)
B2
V=V(d)*(V(Vg)-V(Va))
Lpri12m
B3
V=-V(Va)/TR
B4
I=-I(VD)/TR
C0
47µ
R03
AC 1
Vdhat1
VD_nom
D0
VD
0.4
Va
dd
Vg Vo
VL
.ac dec 100 10 100k.IC V(Vo) = 12.IC I(Lpri) = 0.494
.param D0 0.2646
.param TR 11
VD_nom sets the dc duty cycle operating point
Vdhat sets the variation around the dc operating point
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
10Hz 100Hz 1KHz 10KHz 100KHz-15dB
-10dB
-5dB
0dB
5dB
10dB
15dB
20dB
25dB
30dB
35dB
40dB
45dB
-300°
-270°
-240°
-210°
-180°
-150°
-120°
-90°
-60°
-30°
0°
30°
60° V(vo)
©2015 Embedded Power Labs – All rights reserved
Flyback Simulation WithAverage Switch Model
+
Vg
380
B1
I=-V(d)*I(B2)
B2
V=V(d)*(V(Vg)-V(Va))
Lpri12m
B3
V=-V(Va)/TR
B4
I=-I(VD)/TR
C0
47µ
R03
0
Vdhat
VD_nom
1
VD
0.4
RQ
1
Va
dd
Vg Vo
VL
.dc VD_nom 0.0 0.99 0.005*.IC V(Vo) = 12*.IC I(Lpri) = 0.494
*.param D0 0.param TR 11
VD_nom sets the dc duty cycle operating point
Vdhat sets the variation around the dc operating po
©2015 Embedded Power Labs – All rights reserved
0mV 100mV 200mV 300mV 400mV 500mV 600mV 700mV 800mV 900mV-30V
0V
30V
60V
90V
120V
150V
180V
210V
240V
270V
300V
330VV(vo)
Flyback Simulation WithAverage Switch Model
+
D =0 D =0.99
©2015 Embedded Power Labs – All rights reserved
Averaged Switch Small Signal Model
1 1 1
2 2 2
1 1 1
2 2 2
ˆ
ˆ
ˆ
ˆ
ˆ
v t V v t
v t V v t
i t I i t
i t I i t
d t D d t
1v t 2v t
1i t 2i t
d t
1d t v t 2d t i t
!
2 1
1 2
v t d t v t
i t d t i t
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Discard Higher Order Nonlinear
Terms
Averaged Switch Small Signal Model
DC And Small Signal Terms!
2 1
2 2 1 1
1 1 1 1
1
2 2 1 1 1
1 1 1
ˆˆ ˆ
ˆ ˆˆ ˆˆ ˆ 0
ˆˆ ˆˆˆ
v t d t v t
V v t D d t V v t
D V D v t V d t d t v t
d t v t
V v t D V D v t V d t
D V v t V d t
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Averaged Switch Small Signal Model
1 2
1 1 2 2
2 2 2 2
2
1 1 2 2 2
2 2 2
ˆˆ ˆ
ˆ ˆˆ ˆ
ˆ ˆ 0ˆˆ ˆ
ˆˆ
i t d t i t
I i t D d t I i t
D I D i t I d t d t i t
d t i t
I i t D I D i t I d t
D I i t I d t
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Construct The Switch Model
2 2 1 1 1ˆˆ ˆV v t D V v t V d t 1 1 2 2 2
ˆˆ ˆI i t D I i t I d t
1 1I i t
1 1V v t 2ˆI d t 2 2D I i t 1 1D V v t
1ˆV d t
2 2ˆV v t
ˆD d t
2 2I i t
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Construct The Switch Model
2 2 1 1 1ˆˆ ˆV v t D V v t V d t 1 1 2 2 2
ˆˆ ˆI i t D I i t I d t
1 1I i t
1 1V v t 2ˆI d t
1ˆV d t
2 2ˆV v t
ˆD d t
2 2I i t1: D
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Averaged Switch Small SignalBuck Converter Model
ˆg gV v t
ˆg gI i t
2ˆI d t
1: D ˆ
gV d t L
C ˆC CV v t R
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Boost Switch Model
Re-drawn from “Fundamentals of Power Electronics”, 2nd ed., Erickson and Maksimovic, Figure 7.50
1 1V v t
1 1I i t 2
ˆV d t' :1D
1ˆI d t 2 2ˆV v t
2 2I i t
ˆD d t
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General Two-Switch Network
Re-drawn from “Fundamentals of Power Electronics”, 2nd ed., Erickson and Maksimovic, Figure 7.50
1v t
1i t
2v t
2i t
1 1V v t
1 1I i t
ˆD d t
2 2ˆV v t
2 2I i t' :D D
1 ˆ'
V d tD D
2 ˆ'
I d tD D
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Averaged Switch Small Signal Model: Flyback
1 1V v t
1 1I i t
ˆD d t
2 2ˆV v t
2 2I i t' :D D
1 ˆ'
V d tD D
2 ˆ'
I d tD D
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Averaged Switch Small Signal Model: Flyback
C R
:1N
1 1V v t
1 1I i t
ˆD d t
2 2ˆV v t
2 2I i t' :D D
1 ˆ'
V d tD D
2 ˆ'
I d tD D
L
ˆgv t
gi t
ˆLv t Li t
ˆCv t
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C R
:1N
1 1V v t
1 1I i t
ˆD d t
2 2ˆV v t
2 2I i t' :D D
1 ˆ'
V d tD D
2 ˆ'
I d tD D
L
ˆgv t
gi t
ˆLv t Li t
ˆCv t
Averaged Switch Small Signal Model: Flyback
NowWhat?
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C R
:1N
1 1V v t
1 1I i t
ˆD d t
2 2ˆV v t
2 2I i t' :D D
1 ˆ'
V d tD D
2 ˆ'
I d tD D
L
ˆgv t
gi t
ˆLv t Li t
ˆCv t
Averaged Switch Small Signal Model: Flyback
Simulation: Maybe
1 'g D CV D V D N V V
21
CI VR
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Averaged Switch Small Signal Model: Flyback
Re-drawingMay Help
This Arrangement Based On Work Of Christophe Basso
L
C R
:1N
1 ˆ'
V d tD D
2 ˆ'
I d tD D
1 1I i t
1 1V v t 2 2ˆV v t
2 2I i t
' :D D
ˆgv t
gi t
ˆLv t Li t
ˆCv t
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Averaged Switch Small Signal Model: Flyback
Q1
D1
C R vC(t)
vg(t)
ig(t) N:1
LvL(t)
iL(t) iC(t)
+
Re-drawAs For Averaged
Model
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Averaged Switch Small Signal Model: Flyback
Q1 D1
C R vC
(t)
ig(t) N:1
LvL(t)iL(t)
iC(t)
VD
+
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Averaged Switch Small Signal Model: Flyback
C R vC(t)
vg(t)
ig(t) N:1
LvL(t)iL(t)
iC(t)
1 ˆ'
V d tD D
2 ˆ
'I d t
D D
' :D D
+
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Averaged Switch Small Signal Model: Flyback
+
This LooksMore
Promising
1 ˆ'
V d tD D
2 ˆ
'I d t
D D
' :D D
L
C R
DV:1N
ˆgv t
gi t
ˆLv t
Li t
Ci t
ˆCv t
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Averaged Switch Small Signal Model: Flyback
Derive Transfer Functions?Still Very Tedious
!
1 ˆ'
V d tD D
2 ˆ
'I d t
D D
' :D D
L
C R
DV:1N
ˆgv t
gi t
ˆLv t
Li t
Ci t
ˆCv t
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1 ˆ'
V d tD D
2 ˆ
'I d t
D D
' :D D
L
C R
DV:1N
ˆgv t
gi t
ˆLv t
Li t
Ci t
ˆCv t
Averaged Switch Small Signal Model: Flyback
The Point Of This Example?Averaged Switch
Small Signal ModelingHas Limitations
!
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ErrorAmp/
Compensator
Small Signal Model OfPulse-Width Modulator
Vref Vout+ –PowerStagePWM
VoltageDividerNot LTI
We Also Need A Small Signal Model For The Pulse Width Modulator
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Small Signal Model OfPulse-Width Modulator
0
VRAMP_MIN
VRAMP_MAX
0
vC(t)
PWM(t)
0 d·TS TS
VRAMP
vRAMP(t)
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Small Signal Model OfPulse-Width Modulator
_
_
C RAMP MIN
RAMP
RAMP MINC
RAMP RAMP
v t Vd t
VVv t
V V
ˆ
ˆC C C
d t D d t
v t V v t
_
_
_
ˆˆ
ˆ
ˆˆ
RAMP MINC C
RAMP RAMP
C RAMP MINC
RAMP RAMP
C RAMP MIN
RAMP
C
RAMP
VV v tD d t
V VV Vv t
V VV V
DV
v td t
V
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Pulse WidthModulator
Small Signal Model OfPulse-Width Modulator
1
RAMPV
PWM Has A Fixed Small Signal Gain
ˆCv t d t
!
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More On Small Signal Modeling
• “Fundamentals of Power Electronics”, 2nd ed., Erickson and Maksimovic, Chapter 7
• V. Vorperian, "Simplified analysis of PWM converters using model of PWM switch. Continuous conduction mode," Aerospace and Electronic Systems, IEEE Transactions on, vol. 26, pp. 490-496, 1990.
• V. Vorperian, "Simplified analysis of PWM converters using model of PWM switch. II. Discontinuous conduction mode," Aerospace and Electronic Systems, IEEE Transactions on, vol. 26, pp. 497-505, 1990.
• Papers, seminars, books by Ray Ridley and Christophe Basso
©2015 Embedded Power Labs – All rights reserved
Summary
• We Need Small Signal Models To Use Standard Control Tools To Design The Loop
• Two Averaging Methods Shown To Derive A Small Signal Model Of A Switching Converter:– Average Inductor Voltages And Capacitor Currents– Average Switch Network Port Voltages And
Currents
• Transfer Functions Of Interest Can Be Found From The Small Signal Models
©2015 Embedded Power Labs – All rights reserved
You Can Download The Latest Version Of The SeminarIn Adobe Acrobat (.pdf)
And Microsoft PowerPoint Show Format (.ppsx)From The Embedded Power Labs website:
http://www.embeddedpowerlabs.com/publications.html
©2015 Embedded Power Labs – All rights reserved
About The PresenterBob White has over 30 years experience in power electronics. He has held managerial and individual contributor positions in product development, technology development, applications and systems engineering, and technical marketing. His areas of expertise include power systems for computing and telecommunications systems, digital power, and applications of wide bandgap power semiconductor devices. Bob is currently the president and chief engineer of Embedded Power Labs, a power electronics consulting company.
Bob has been very active in the IEEE Power Electronics Society and the APEC committees, including twice serving as the APEC General Chair.
He is a Fellow of the IEEE, has a BSEE from MIT, a MSEE from Worcester Polytechnic Institute and is currently pursuing a Ph.D. in power electronics at the University of Colorado-Boulder. He is also an Honorably Discharged veteran of service in the United States Air Force.