An Improved Droop Controller for ParallelOperation of Single-phase Inverters using R-C
Output ImpedanceSanjay Tolani
Department of Electrical EngineeringIndian Institute of Technology
Kanpur 208016, IndiaEmail: [email protected]
Parthasarathi SensarmaDepartment of Electrical Engineering
Indian Institute of TechnologyKanpur 208016, India
Email: [email protected]
AbstractβThis paper proposes a new droop-based approachfor proportional load sharing among parallel-connected invert-ers in an islanded microgrid. For achieving accuracy in loadsharing among the parallel connected inverters, R-C type virtualimpedance is emulated as the output impedance of inverters.A new method of average power computation is proposedwhich significantly reduces the delay encountered in conventionalapproaches. In contrast with the conventional droop-controlmethods, the proposed approach results in effectively reducedline impedance, consequently improving the full-load voltageregulation. Simulation results are provided with two singlephase inverters, of different rating, connected in parallel. It isshown that proportional sharing of active and reactive powers isobtained with excellent dynamic performance.
I. INTRODUCTION
With rapid infiltration of power electronics in distributedgeneration (DG) systems, parallel connection of inverters hasbecome the de rigeur configuration. This topology is beingincreasingly researched to obtain N+1 redundancy and hencecreate a modular power distribution system, which could be asmart micro-grid. The reliability as well as modularity of thesupply system can be increased by replacing a single inverterunit with multiple low power inverter units in parallel. Severalmethods of operating inverters in parallel have been reportedin [1], [2], [3]. These techniques need control interconnectionamong the parallel inverters with a central control unit whichdemand a dedicated fast communication infrastructure. Limi-tations of the physical layer of communication not only restrictthe geographical spread of the inverter units but also act as asource of noise and failure.Control schemes for parallel operation of inverters withoutcontrol interconnection were presented in [4], [5], [6]. Theseare mainly based on the droop method which stems from theapproach used in conventional power systems for parallelinglarge synchronous generators. For inductive line impedance,the frequency is made to droop with increase in active powerwhile voltage is made to similarly respond to reactive power.Major advantage of the droop method is that it is based onlyon measurement of local variables. To achieve good active andreactive power sharing, the controller allows variation of the
frequency and amplitude of the output voltage of each parallelinverter. Although this variation is usually restricted withinvery tight limits, the conventional droop method still has somemajor limitations, especially for single-phase systems.
Firstly, its transient response is either slow or oscillatory,chiefly due to the choice of pass-band of low-pass filtersnecessary to calculate the average active and reactive power.In [5], an improvement in transient response is achieved byintroducing power derivative and integral terms into a conven-tional droop scheme, though limitations of the filter pass-bandstill exists. In [8], to improve the transient response active andreactive powers are measured by integrating the product ofthe current and voltage over one fundamental cycle and theaverage calculated from a presumed knowledge of the cycletime. Obviously this is strictly valid for periodic waveforms,but since the frequency is being continuously varied due todroop action, this method has some inherent inaccuracies.Although some improvement in response time is observed,it can still be further improved. Also, this method workssatisfactorily only when line impedances are predominantlyinductive or resistive [4], [5], [6]. For predominantly inductiveline impedances, π β π and π β π droops are used forpower sharing while, conversely, for predominantly resistivelines π β π and π β π droop characteristics are employed.In such cases, the frequency-linked power (active/reactive) isshared accurately while the voltage-linked power invariablyis unequally shared [9]. The sharing inequality in such casescan be overcome if line impedances are in inverse proportionof the power rating of the inverters [9]. To overcome theseproblems, virtual inductor [5], virtual resistor [6] or compleximpedance (R-L) [7] is emulated as output impedance of theinverter. Arguably, it is better to force the output impedanceof the inverter to be resistive [6], [9] because its impedancedoes not change with the frequency and the effect of nonlinearloads on the voltage THD can be compensated more easily. Butin both cases, effective impedance between inverter and loadbus increases, which degrades the load bus voltage regulation.In the present work, a significant improvement in transient re-sponse is achieved by introducing a Second Order Generalized
2012 IEEE International Conference on Power Electronics, Drives and Energy Systems December16-19, 2012, Bengaluru, India
978-1-4673-4508-8/12/$31.00 Β©2012 IEEE
Integrator (SOGI) based power filter into a conventional droopscheme. It is proposed to emulate predominantly resistive lineimpedances through addition of virtual capacitances, whicheffectively reduce the line inductances, instead of augmentingthe total resistance through virtual resistance emulation. Thisresults in net decrease in the effective line impedance withsignificant improvement in output voltage regulation. Virtualresistances are added to compensate for the mismatch in perunit value of line resistances which results in improvementin active power sharing among the inverters. Thus the actualemulated impedance is of R-C type which is realized usingproper transfer functions. Simulation results are reported,confirming the validity of this control technique.
II. SYSTEM CONFIGURATION AND MODELING
A. System Configuration
Fig.1 shows the typical configuration of a microgrid whichconsists of a combination of distributed micro-generator units,each coupled to the microgrid through its single phase inverter.Inverters from all the sources are paralleled to form themicrogrid which can operate both in islanded and grid-tiedmode. All the inverters are connected with a common load busthrough interconnecting lines (π π1, πΏπ1;π π2, πΏπ2; ...π ππ, πΏππ).Modulation signal for each single phase inverter is generatedby a dedicated controller which takes feedback of local vari-ables.
B. Plant Modeling
Second order filters are used at the inverter output terminalsfor attenuating the switching ripples in the output voltage.The inverter with filter forms the basic plant. The second-order filter comprises of a tuned inductor (πΏπ ) and a capacitor(πΆπ ) along with the internal resistance of inductor (π π ).The equivalent series resistance (πΈππ ) of the filter capacitoris not considered in the model, since its effect appears farabove the frequency range of concern [10]. Fig.2 shows themulti-loop structure of voltage control scheme for inverterhaving feedback loops using filter capacitor current, ππ, andthe capacitor voltage, π. Nominally modeling the inverter as
mode
(islanded mode)distributed load
1βΞ¦
DC Link v
n
2
Lfn
Cfn
Cf2
Lf2
e1
l2R l2L
l1Ll1
Cf1
Lf1
Voltage Controlled VSI
1
DGS1
DGS2
DGSn sensitive load
grid tiedR
lnRne lnL
e2
Fig. 1: Microgrid based on Parallel Inverters System
an algebraic gain (πππ) [3], the control and disturbance transferfunctions for the open-loop plant are derived from fig. 2 as
π(π )
π£π(π )
Ξ= πΊπ(π ) =
1
πΏππΆππ 2 +π ππΆπ + 1(1)
βπ(π )
π(π )
Ξ= πΊπ(π ) =
π π + πΏππ
πΏππΆππ 2 +π ππΆπ + 1. (2)
Nominal parameter values used for control design and simu-
Cfs1
Rf
VdcH(s)1
Lfs
Kc
icvi
il
um
Kf
eref+
+ ++ e
active damping inner loop
outer voltage feedback loop
voltage controller
i Plantfeedβforward loop
+
Fig. 2: Block diagram of close-loop voltage control
lation are listed in Table I.
C. Design of Voltage Controller
To achieve good tracking performance and disturbancerejection, three control loops are introduced as shown in fig.2.
1) Active Damping Loop: To damp out the resonant oscil-lations due to the filter, active damping is provided by an innercapacitor current loop with gain πΎπ. Modified system transferfunctions in presence of active damping loop are as follows
π(π )
π£π(π )= πΊβ²
π(π ) =1
πΏππΆππ 2 + (π π +πΎπ)πΆπ + 1(3)
βπ(π )
π(π )= πΊβ²
π(π ) =π π + πΏππ
πΏππΆππ 2 + (π π +πΎπ)πΆπ + 1. (4)
2) Voltage Regulation Loop: In order to track the referenceinverter output voltage, a controller π»(π ) is designed usingloop shaping technique. Using this technique it is found outthat a second order controller given by (5) can fulfill thedesired control specifications.
π»(π ) =πΎ(π + ππ§1)(π + ππ§2)
π (π + ππ)(5)
3) Feed-Forward Loop: To reduce the phase error of theoutput voltage, a feed-forward loop with gain πΎπ is providedas shown in fig. 2. The usefulness of this loop can beexplained by frequency-domain behavior of the close looptransfer function of the voltage control loop. The close-loopvoltage gain transfer function, πΊππ, and the disturbance transferfunction, ππ, are stated as follows
πΊππ =π
ππππ=
πΊβ²π(π» +πΎπ )
1 +πΊβ²ππ»
(6)
ππ = βπ
π=
πΊβ²ππ»
1 +πΊβ²ππ»
. (7)
Bode plot of πΊππ is shown in fig. 3 for both the cases whenthe feed-forward loop is absent (πΎπ = 0) and when a unity
gain feed-forward loop is present(πΎπ = 1). It can be seen, thephase error for πΎπ = 1 at operating frequency of 50 Hz isβ0.02β while for πΎπ = 0 it is β5β.
β80
β60
β40
β20
0
20
Mag
nit
ud
e (d
B)
101
102
103
104
105
β180
β135
β90
β45
0
Ph
ase
(deg
)
Frequency (Hz)
Kf = 0Kf = 1
Fig. 3: Bode diagrams of the closed-loop transfer function πΊππ(π )
III. PROPOSED WIRELESS POWER SHARING CONTROLLER
A. R-C Output Impedance Based Droop Control Method
Fig.4 shows the equivalent circuit of an inverter connectedto an ac bus. Here, net impedance, which is the aggregate of
I
R
S=P+jQ
Ξ΄E V 0
Fig. 4: Equivalent circuit of an inverter connected to an ac bus.
inverter output impedance and line impedance, between theinverter and load bus is considered as resistive. Denoting theinverter and bus voltage phasors as οΏ½ΜοΏ½ (=πΈ β πΏ) and π (=π β 0),the power flow equations are given by
π =πΈπ cos(πΏ)β π 2
π (8)
π = β(πΈπ
π
)sin(πΏ). (9)
Generally, with low absolute values of the net impedance, πΏis negligible. Therefore, the above equations reduce to
π β π
π (πΈ β π ) (10)
π β β(πΈπ
π
)πΏ (11)
From (10) and (11), it is clear that, predominantly, the realpower depends on the magnitude difference (πΈ β π ) whilereactive power depends on the angle difference πΏ of οΏ½ΜοΏ½ and π .Hence, the droop equations are given by
πΈβ = πΈπ + ππ (12)
πβ = ππ βππ (13)
where, πΈβ and πβ are reference peak voltage and frequencyrespectively. πΈπ and ππ represent no-load peak voltage andfrequency while π and π are respectively the frequency andvoltage droop coefficients. The assumption of predominantlyresistive line impedance is not strictly valid in actual practice,where the nature of line impedance depends on the intercon-necting line length and is generally of R-L type. Therefore,to make the net interconnecting impedance predominantlyresistive, an R-C type virtual impedance is emulated in serieswith each inverter. The capacitive component is added forcompensating the inductive component of the natural inter-connecting impedance while a virtual resistance is addedto compensate for the mismatch in per unit value of lineresistances, which improves active power sharing among theinverters [9].Simplified version of fig. 2 along with droop control and vir-tual impedance loop is given in fig. 5. The resistive componentof R-C virtual impedance (ππ£) is emulated by introducinga voltage drop in the output voltage reference, which variesproportionally with the output current. Capacitive componentof the emulated impedance is introduced by drooping theoutput-voltage reference proportionally to the time integralof the output current (see fig. 5). Mathematical equationsdetailing these operations are as follows, with reference tofig. 5.
π(π ) = πβ(π )πΊππ β {ππ£(π )πΊππ + ππ(π )}π(π ) (14)
Now, if ππΏ(= π π + π πΏπ) is the line impedance, the load busvoltage π£(π ) can be given by
π£(π ) = π(π )β ππΏ(π )π(π ) (15)
Using (14), (15) is expressed as
π£(π ) = πΊππ(π )πβ(π )β{ππ£(π )πΊππ+ππ(π )+ππΏ(π )}π(π ) (16)
Due to close loop voltage control, at operating frequency,
e*
Droop Control
vsCZv = Rv + 1
dZ
erefβ
++e
βP
Q
G
i
cl
Fig. 5: Block diagram of R-C type Virtual impedance based Droop ControlMethod
ππ(π ) is negligible and πΊππ has almost unity gain withnegligible phase lag. Therefore, equation (16) reduces to
π£(π ) β πβ(π )β {ππ£(π ) + ππΏ(π )}π(π )β πβ(π )β {(π π£ +π π) + (
1
π πΆπ£+ π πΏπ)}π (17)
V
Cvj ( )R v+ Rl
Ξ΄βE*
S=P+jQ
1Ο lL _
I0
Ο
Fig. 6: Approximate equivalent circuit of an inverter connected to an ac busafter the emulation of R-C impedance
Using equation (17), the approximate equivalent circuit isdrawn which is shown in fig.6. From fig.6, it is clear that vir-tual capacitive reactance compensates the inductive reactanceof the interconnecting line and virtual resistance increases theaggregate resistance. Thus due to the cumulative effect of bothtype of virtual impedances, net π
ππΏratio is improved.
B. Average Power Measurement using Proposed Filter
The reference inverter output voltage is given by using (12)and (13), where π and π are the average value over one line-cycle of instantaneous active, π, and reactive, π, output power.Conventionally, the average is carried out using first order lowpass filter [4], [5], [6]. The instantaneous power output fromsingle phase inverter contains a double frequency ripple com-ponent superimposed on dc component. To attenuate this ripplecomponent, the corner frequency (ππ) of low pass filter shouldbe kept at very low value but this makes the system dynamicssluggish. However, increasing the cutoff frequency increasesthe power signal ripple which in turns causes fluctuations ofthe system frequency and voltage amplitude due to droopcontrol action. This paper proposes a new power filteringtechnique which greatly improves the transient performanceas well as mitigates the problem of frequency and voltageoscillations under steady state condition.To capture the double frequency ripple component, SOGI isproposed whose resonant frequency is tuned at 100 Hz, fora system frequency of 50 Hz. The proposed power filter isshown in fig.7. A low pass filter is also used to filter out thehigh frequency component which remain in power signal dueto switchings and sensor noise. The SOGI is represented by
π»π(π ) =2ππππ
π 2 + 2ππππ + π2π
(18)
where, π is the damping factor and ππ is the resonant fre-quency. Consequently, the measured power does not involve
+
_P,Q
LPF
p , q
SOGI
Fig. 7: Proposed Filter.
large delay nor is it corrupted by steady state ripple. Fig.8shows the response of the two power measurement calculationmethods. Fig.8a shows the response of a conventional first-order low pass filter with corner frequency of 10 Hz. This
0 0.1 0.2 0.3 0.4 0.5 0.60
200
400
600
800
Time (s)
Po
wer
(W
att)
fc=10 Hz
fc=1 Hz
(a)
0 0.1 0.2 0.3 0.4 0.5 0.60
200
400
600
800
Time (s)
Po
wer
(W
att)
Proposed Filterwith fc=10 Hz
(b)
Fig. 8: (π) Response of Conventional Low Pass Filter (π) Response ofProposed Filter
results in an acceptably small settling time of 0.1 s but withdisproportionately high peak to peak ripple (24%), in steadystate. The ripple content can be reduced by using lower cornerfrequency (1 Hz) but at the expense of large settling time(0.6 s), as shown by the second plot in fig.8a. However,with the proposed filter, it is possible to obtain very lowpeak to peak ripple less than 1%, without compromising thesettling time, as shown in fig. 8b. The proposed method thusclearly ensures a ripple free average-power signal with a veryfast response, as compared to conventional low pass filterapproaches. Complete block diagram of the proposed power-sharing controller is shown in fig. 9.
C. Design of Virtual R-C Impedance
In order to achieve proper parallel operation, the closed-loopoutput impedance of the inverter must be examined. Using fig.5, the close loop output impedance, ππ, is given by
ππ(π ) = βπ(π )
π(π )= ππ(π ) +πΊππ(π )
1 + π π π£πΆπ£
π πΆπ£(19)
ππ can be obtained in terms of system parameters by substi-tuting (6),(7) in (19). Fig. 10 shows the frequency responseof the output impedance for nominal system parameters andvirtual impedance selected as π π£ = 0.1Ξ©, πΆπ£ = 20ππΉ . Fromfig. 10, in the frequency range of interest enclosing the linefrequency 50 Hz, the phase varies between β55β to β58β
ensuring that the output impedance is of R-C type. But the dcgain of output impedance is infinite as shown in fig. 10, whichcauses two problems. Whenever a step change in load occurs,oscillatory transient response appears. In addition to this, even
Cfs1
Rf
VdcH(s)1
Lfs
Kc
icvi
il
ume*
90
SOGI
LPF
SOGI
LPF&
E*
P
βΟ
Q
zV
virtualimpedance loop
Kf
eref +
+ ++ e
active damping inner loop
outer voltage feedback loop
voltage controller
i Plant
+P
Q
p
q
e
i i
+
proposed filter droop control
&
feedβforward loop
Fig. 9: Complete block diagram of the proposed power-sharing controller
β40
β20
0
20
Mag
nit
ud
e (d
B)
100
101
102
103
104
105
β100
β50
0
50
100
Ph
ase
(deg
)
Frequency (Hz)
50
Fig. 10: Bode diagrams of the close loop output impedance
a negligible dc offset present in sensed output current can beamplified to a large value. So for stable parallel operationvirtual impedance needs to be modified. The modified virtualimpedance is given by
ππ£(π ) = π π£ +1
π πΆπ£
2ππππ
π 2 + 2ππππ + π2π
(20)
where, π and ππ have usual meaning as described in (18). Thismodification ensures that the capacitive component becomeseffective only for the desired frequency range as shown inBode diagram of the output impedance given in fig. 11. Now,it can be seen that the output impedance at the line frequencyis of R-C type and ensures attenuation of low frequencies.
IV. SIMULATION RESULTS
The proposed controller has been simulated for a micro-gridwith two single phase inverters of different rating, connectedin parallel, sharing a common load. System parameters arementioned in Table I. To validate the feasibility of the pro-posed controller, lines connecting the inverters and the loadare chosen with unequal per-unit impedances. For makingnet impedance predominantly resistive between inverter andload, virtual capacitances of values πΆπ£1 = 6.34ππΉ and
β40
β30
β20
β10
0
10
20
Mag
nit
ud
e (d
B)
100
101
102
103
104
105
β100
β50
0
50
100
Ph
ase
(deg
)
Frequency (Hz)
50
Fig. 11: Bode diagrams of the modified close loop output impedance
TABLE I: Nominal System Parameters
Parameters Inverter1 Inverter2
Rating 2kVA 1kVA
Droop Coefficients π1=-0.0031 π2=-0.0063π1=-0.0075 π2=-0.0150
Nominal RMS Voltage 230V 230V
Nominal frequency 50Hz 50Hz
Filter Parameters 0.54mH,47πF 0.54mH,47πF
Line impedance (0.7+j0.6)Ξ© (0.72+j0.65)Ξ©
Switching frequency 10kHz 10kHz
πΆπ£2 = 5.8ππΉ are used respectively for inverter-1 and inverter-2.Fig.12 shows the simulation result when only virtual capaci-tances are emulated and resistances are not emulated. It can beobserved that the transient response at the startup and for loadstep changes (at 1.5 s and 3 s respectively) is well dampedand having settling time of 0.1 s. It is interesting to note
0 1 2 3 40
100
200
300
400
500
Time(s)
P (
Wat
t)
Inverter 1
Inverter 2
(a)
0 1 2 3 40
100
200
300
400
500
Time(s)
Q (
VA
R)
Inverter 2
Inverter 1
(b)
Fig. 12: Active and Reactive Power Shared by Inverters when πΆπ£1 =6.34ππΉ , πΆπ£2 = 5.8ππΉ and π π£1 = 0, π π£2 = 0 (π) Active Power (π)Reactive Power
that the reactive power is proportionately shared between theinverter modules while the active power sharing is not strictlyproportional.Fig.13 shows the simulation result when virtual resistances arealso emulated. It is observed that now both active and reactivepowers are shared in almost exact proportion of the ratings ofthe inverters.
V. CONCLUSION
In this paper, a novel droop controller for parallel invertershas been proposed. Measuring the average power using SOGIwas found to give superior performance compared to using aconventional low pass filter. Design of virtual R-C impedanceis also discussed. By emulating an R-C type virtual impedancein the inverter output, the droop controller was found to beeffective in power sharing accuracy.
ACKNOWLEDGMENT
The authors would like to thank the Department of Sci-ence and Technology, Govt. of India for supporting thiswork through the sponsored project vide sanction numberDST/TM/SERI/2K10/48.
REFERENCES
[1] J. F. Chen and C. L. Chu, βCombination voltage-controlled and current-controlled PWM inverter for UPS parallel operation,β IEEE Trans. PowerElectron., vol. 10 Issue.5, pp. 547-558, Sep. 1995.
[2] Azrik M. Roslan, Khaled H. Ahmed, βImproved Instantaneous AverageCurrent-Sharing Control Scheme for Parallel-Connected Inverter Con-sidering Line Impedance Impact in Micro grid Networks,β IEEE Trans.Power Electron., vol. 26, no. 3, March 2011.
0 1 2 3 40
100
200
300
400
500
600
Time(s)
P (
Wat
t)
Inverter 2
Inverter 1
(a)
0 1 2 3 40
100
200
300
400
500
Time(s)
Q (
VA
R)
Inverter 1
Inverter 2
(b)
Fig. 13: Active and Reactive Power Shared by Inverters when πΆπ£1 =6.34ππΉ , πΆπ£2 = 5.8ππΉ and π π£1 = 0.05Ξ©, π π£2 = 0.8Ξ© (π) ActivePower (π) Reactive Power
[3] Shahil Shah and Partha Sarathi Sensarma, βThree Degree of FreedomRobust Voltage Controller for Instantaneous Current Sharing AmongVoltage Source Inverters in Parallel,β IEEE Trans. Power Electron., vol.25, no. 12, Dec. 2010.
[4] M. C. Chandorkar and D. M. Divan, βControl of parallel connectedinverters in standalone ac supply system,β IEEE Trans. Ind. Electron.,vol. 29,no. 1, pp. 136-143, Jan./Feb. 1993.
[5] J. M. Guerrero, L. Garcia de Vicuna, J. Matas, M. Castilla, and J.Miret, βA wireless controller to enhance dynamic performance ofparallelinverters in distributed generation systems,βIEEE Trans. Power Electron.,vol. 19, no. 5, pp. 1205-1213, Sep. 2004.
[6] J. M. Guerrero, J.Matas, Garcia de Vicuna, M. Castilla, and J. Miret,βDecentralized Control for Parallel Operation of Distributed GenerationInverters Using Resistive Output Impedance,βIEEE Trans. Ind. Electron.,vol. 54, no. 2, April 2007.
[7] J. Matas, M. Castilla, J. Miret , βVirtual Impedance Loop for Droop-Controlled Single-Phase Parallel Inverters Using a Second-Order General-Integrator Scheme,β IEEE Trans. Power Electron., vol. 25, no. 12, Dec.2010.
[8] M. A. Abusara , S. M. Sharkh , βControl of Line Interactive UPS Systemsin a Microgrid,β Industrial Electronics (ISIE), Symposium on June 2011,pp. 1433 - 1440.
[9] Q. C. Zhong, βControl of Parallel-connected Inverters to Achieve Propor-tional Load Sharing,β 18th IFAC World Congress, August 28 - September2, 2011, pp. 2785-2790.
[10] M. J. Ryan, W. E. Brumsickle, and R. D. Lorenz, βControl topologyoptions for single-phase UPS inverters,β IEEE Trans. Ind. Appl., vol. 33,no. 2, pp. 493501, Mar./Apr. 1997.