Flash Lamp AnnealingJ. C. Gelpey, S. M. McCoy, D. M. Camm, G. StuartMattson Technology Canada Inc., 605 W Kent Ave, Vancouver, Canada, V6P 6T7
Wilfried LerchMattson Thermal Products GmbH, Dornstadt, Germany
Flash Lamp AnnealingJ. C. Gelpey, S. M. McCoy, D. M. Camm, G. StuartMattson Technology Canada Inc., 605 W Kent Ave, Vancouver, Canada, V6P 6T7
Wilfried LerchMattson Thermal Products GmbH, Dornstadt, Germany
WCJT July 14, 2005
Outline
Motivation
Flash Lamp Annealing Overview
Other Alternatives
Process Results
Work in process
Summary and Conclusions
WCJT July 14, 2005
Motivation
Advanced devices require junction that are:— Highly activated— Abrupt— Shallow— Low leakage
The process must also be manufacturable— Reasonable throughput and COO— Good process control— Minimal integration issues
Milli-second Annealing appears to meet these requirements
WCJT July 14, 2005
Why ms-annealing?
RTP times have been getting shorter (soak anneals ~10s, spike anneals ~1s), but these techniques heat the entire thickness of the wafer, so there is a practical limit on reduction of thermalbudget.Laser annealing times have been getting longer (melt LTP in the ns to µs range), but these techniques have shown difficult integration issues.ms annealing by either flash lamps or lasers seems to hit the “sweet spot”
LTP ms annealing spike RTP soak RTP furnace
ns ms 1s 10s 103s
WCJT July 14, 2005
Evolution of Temperature Profiles
1275°C, 1300°C, 1325°C fRTP(106 K/s RU, 170 K/s RD at 1100°C)
1050°C Spike(250 K/s RU, 80 K/s RD,120 K/s RD)
1100°C Spike(300 K/s RU, 80 K/s RD, 120 K/s RD)
600
700
800
900
1000
1100
1200
1300
1400
1050°C 10 s Soak
Arbitrary time (s)
Pyr
omet
er te
mpe
ratu
re (
°C)
WCJT July 14, 2005
Review of Anneal Types
t
T
Spike Impulse Laser Melt Flash Assist
Wafer response similar to heating source. Characterized by a rounded thermal profile.
Heat source is faster than the wafer but bulk is kept relatively uniform. Thermal profile is peaked.
Heat source acts much faster than the wafer. Only surface layer is heated. Thermal profile is sharply peaked.
Initial bulk heating as Impulse, augmented by flash for surface annealing over entire wafer
t
T
t
T
t
T
d
T
d
T
d
T
d
T
d=wafer depth
WCJT July 14, 2005
How Does ms Annealing Work?
The thermal diffusion time constant of a wafer (from front to back) is on the order of 10-20ms.If heating is applied for longer than this, the front and back will be at essentially the same temperature.If heating is applied for less than the diffusion time constant, a large thermal gradient can be generated (if heating is from one side).Since only a small volume of the wafer is heated, the rest of the wafer acts as a very efficient heat sink and very rapid cooling of the front surface can be achieved.
WCJT July 14, 2005
Thermal Profile in ms Annealing
Front and back side temperature as a function of time in flash lamp annealing (modeled)
Evolution of temperature pulse in flash lamp annealing
This is a 1 dimensional effect in flash lamp annealing, but 3 D in laser processes
WCJT July 14, 2005
TerminologyTerminology
Ti
t
TBulk heating
of wafer
Fast ramp by flash heating Rapid cooling by
thermal conduction to bulk
Radiativecooling of wafer
Temperature profile of device layer shown
WCJT July 14, 2005
Flash Lamp Annealing Approaches
Multiple flash lamps required to achieve desired temperature jumps
— Either many conventional Xe flash lamps or a few water-wall arc flash lamps
Some sort of pre-heating needed to raise the bulk temperature— Either hotplate or backside lamp heating (similar to
conventional RTP)
Hot Device SideColder Back Side
T
Q
Vortek Arc Flash Lamps
Vortek Arc Lamp
wafer
Hot Device SideColder Back Side
T
Q
Hot Device SideColder Back Side
T
Q
T
Q
Vortek Arc Flash Lamps
Vortek Arc Lamp
waferwafer
Reflector
Wafer
Hotplate
Window
WCJT July 14, 2005
Flash Lamp Annealing Players
Mattson— Water-wall Ar arc lamps for both bulk heating and
flash lampsWaferMasters
— Xe arc lamps for flash, hotplate used for pre-heatDNS
— Xe arc lamps for flash, hotplate used for pre-heat
Each has unique preferences for pre-heat profile, temperature ranges and flash profiles
WCJT July 14, 2005
Temperature-Time Radiometer Data
WCJT July 14, 2005
♦ Patented water wall technology♦ High pressure argon with fast time
response
Deionized W
ater
Argon G
as
Spiraling Water
Spiraling Gas
Electric Arc
Clear Q
uartz Tube
Cathode
AnodeW
ater and G
as to R
ecirculation System
Deionized W
ater
Argon G
as
Spiraling Water
Spiraling Gas
Electric Arc
Clear Q
uartz Tube
Cathode
AnodeW
ater and G
as to R
ecirculation System
Vortek Vortek –– High Intensity Arc LampHigh Intensity Arc Lamp
WCJT July 14, 2005
Comparison c/w vs. flash spectrum
c/w spectrum constant over wide current range, line dominated
Flash spectrum time-integrated through flash, strong increase in UV, Ar+ lines appear
UV cut-off dominated by quartz envelope
100 200 300 400 500 600 700 800 900 1000 11000.0
0.2
0.4
0.6
0.8
1.0
Inte
nsity
[a.u
.]
Wavelength [nm]
Flashc/w arc
WCJT July 14, 2005
Searching for applications… (2)
Melting ice off Canadian roads
WCJT July 14, 2005
Flash Uniformity
Camera image of 600°C jump from Ti of 700°C (frame just prior to jump minus frame just after jump)
WCJT July 14, 2005
Process Results
Two primary applications currently— Poly activation
Improved activation of doped poly to reduce poly depletion—can gain 0.5-2Å in physical gate dielectric thicknessSomewhat easier process to integrate and should be in production in several fabs soon
— USJ anneal for SDE and HALOImproved activation of SDE and HALO implants to reduce SCE, improve Ion
Some integration work must be done
WCJT July 14, 2005
Impact of poly-Si Activation on CET
+ ++
+
- - - -
++
- - - -
CET 1
+ +
Lower Activationin Poly-Si
Higher Activationin Poly-Si(after ms annealing)
Si Wafer
Poly-Si
Dielectric n-Poly-Si
n-Poly-Si
p-Si Wafer
p-Si Wafer
Die
lect
ric
Die
lect
ric
*CET
*CET = Capacitance Equivalence Thickness
EF
EF
EF
EF
5-8Å
InversionDepletion
InversionDepletion
CET 2CET 1 > CET 2
WCJT July 14, 2005
Poly Activation
ms annealing shows improvement in poly depletion of ~1ÅImprovement in both p- and n-doped polysilicon
Adachi, et. al., VLSI Symoosium 2005
WCJT July 14, 2005
BFBF22 Process ResultsProcess Results
fRTP shows significant improvement compared to best Spike RTP data.~3 technology node extension.
WCJT July 14, 2005
Comparison FLASH to Spike for BF2
0 5 10 15 20 25 30 35 40 451018
1019
1020
1021
1022
49BF2+ 1.1 keV 1E15 cm-2 300 mm
as-implanted Flash TPeak=1302°C 1030°C 1050°C 1100°C
Bor
on c
once
ntra
tion
(cm
-3)
Apparent depth (nm)
798 Ω/sq.
747 Ω/sq.583 Ω/sq.
440 Ω/sq.
as-implanted:200/300 mm Xj(@1e18cm-3)~16/21 nm
Extremely shallow junction for FLASH-annealed BF2 implanted wafers
WCJT July 14, 2005
Variation of fRTP Peak TemperatureB in Ge pre-amorphized Silicon
462 Ω/sq., 423 Ω/sq., 368 Ω/sq., 443 Ω/sq.
0 10 201018
1019
1020
1021
1022
Diffusion-less process with increase in electrically active dose
as-implanted (B) 1275°C (C) 1300°C (D) 1325°C (E) 825°C/1300°C
Bor
on c
once
ntra
tion
(cm
-3)
Apparent depth (nm)
EDCB
(Ge 30keV, 1E15) B: 500eV, 1E15
WCJT July 14, 2005
TEM Analysis of B in Ge pre-amorphized Si
200 nm
700/1275°C, 0.8 ms_( B )
200 nm
700/1300°C, 0.8 ms_( C )
200 nm 200 nm
825/1300°C, 0.8 ms_( E )
f-DL
p-DL
Weak beam dark field plan-view micrographs
p-DLf-DL
700/1325°C, 0.8 ms_( D )
Evolution of defects, corresponding to Ostwald ripening processNo complete dissolution of defects in the crystal
WCJT July 14, 2005
Φelectr. active(Hall)
1270 1280 1290 1300 1310 1320 13303234363840
360
380
400
420
440
460
480
500
3x1014
4x1014
5x1014
Rs(4PP)Rs(Hall)Mobility
Mob
ility
(cm
2 V-1s-1
) // S
heet
resi
stan
ce (Ω
/sq.
)
Peak Temperature (°C)
Φel
ectr.
act
ive (
cm-2)
Electrical parameters for B in amorphous Si
• Moderate increase in electrically active dose• Weak increase in junction depth (diffusion-less process)• Mobility increase with temperature too
Quality of crystal improve (dissolution of EOR)
WCJT July 14, 2005
Variation of fRTP Peak TemperatureB in crystalline Silicon
687 Ω/sq., 578 Ω/sq., 412 Ω/sq.
0 10 20 261018
1019
1020
1021
1022
Diffusion-less process with increase in electrically active dose
(A) as-implanted (B) 1275°C (C) 1300°C (D) 1325°C
Bor
on c
once
ntra
tion
(cm
-3)
Apparent depth (nm)
A
DCB
B: 500eV, 1E15
WCJT July 14, 2005
Electrical parameters for B in crystalline Si
1270 1280 1290 1300 1310 1320 13303234363840
400
500
600
700
2x1014
2.5x1014
3x1014
3.5x1014
4x1014
Rs(4PP) Rs(Hall) Mobility
Mob
ility
(cm
2 V-1s-1
) // S
heet
resi
stan
ce (Ω
/sq.
)
Temperature (°C)
Φelectr. active(Hall)
Φel
ectr.
act
ive (
cm-2)
Good correspondence between Hall-effect and 4PP sheet resistance measurements for USJ (± 1%). 4PP tips do not penetrate too deep
WCJT July 14, 2005
Isochronal (t=30 s) post-annealing for Boron Junctions in α- and c-Silicon
200 300 400 500 600 700 800 900 1000 1100200300400500600700800900
10001100120013001400
fRTP(1300°C), w/o PAI fRTP(1300°C), w/ PAI SPEG(650°C), w/ PAI
She
et re
sist
ance
(Ω
/sq.
)
Temperature (°C)
• Flash and SPEG annealed junctions are “electrically“ stablefor temperatures up to 750°C
• Dopant deactivation is observed for >750°C• Dopant reactivation is observed for T>900°C
c-Si
α-Si
α-Si
WCJT July 14, 2005
Leakage as a function of doping and annealLeakage as a function of doping and anneal
To optimize leakage, must have deep enough PAI and flash superior to SPE or spike
WCJT July 14, 2005
B2H6 Plasma Doping with He PA Results
B co
ncen
tratio
n ( c
m-3
)
1 0 1 7
1 0 1 8
1 0 1 9
1 0 2 0
1 0 2 1
1 0 2 2
1 0 2 3
0 1 0 3 02 0D e p th ( n m )
2 .0 n m /d e c
H e -P A d e p th6 .5 n m
a fte r F L A1 0 0 0 o h m /sq
9 .1 n m
a s-d o p e d
SIMS profiles before and after FLA. Doping process was He-PA +PD (bias: 60 V)
Sasaki et. al. 2004 VLSI Symposium
WCJT July 14, 2005
B2H6 Plasma Doping with He PA Results
G e P A I + I / I + F L A - 2 [ 4 ]
H e - P A + P D+ F L A - 1
T h i s w o r k
G e P A I + I / I + F L A - 2 [ 4 ]
H e - P A + P D+ F L A - 1
T h i s w o r k
T h i s w o r k
Shee
t res
ista
nce
( kΩ
/sq.
) 1 . 5
1 . 0
0 . 5
5 1 0 1 5 2 0X j ( @ 5 x 1 0 1 8 c m - 3 )
0
Relationship between Rs and Xj for this work and reported works using FLA.
Sasaki et. al. 2004 VLSI Symposium
WCJT July 14, 2005
Strained SiGe
Flash shows minimal and balanced diffusion of B and As in SiGeMinimal Ge updiffusionNo relaxation of strain measurable after flash processing
Kohli, et. al. ECS 2004, Honolulu
WCJT July 14, 2005
Potential Challenges
Pattern Effect— Even with broad spectral bandwidth and wide angular variation,
there could be some pattern effect— We have not observed any pattern effect—so far— Can be solved with absorber or anti-reflection layers or influenced by
pulse width
SIMS depth profiles for B for various design-scale cells. Pattern pitch is indicated by the relation that becomes small in the order of pattern type A, B, and C (A>B>C)
Ito, et. al.. IWJT 2005
WCJT July 14, 2005
More Challenges
Stress— Stress induced by the thermal profile can generate defects in
the wafer or even fracture the wafer— Can be solved by reducing pattern induced non-uniformities
on a local scale and by properly supporting the wafer on a global scale
High Cost— Flash tools are far more complex than conventional RTP tools
and cost significantly more— The improvement in device performance has to justify the
additional cost— As more tools are made, costs may be brought down
WCJT July 14, 2005
Work to be Done
Detailed examination of As and P— We still don’t understand all of the physics— Measurements are difficult
Additional work on SOI and stained siliconMore device work
— Good Xj/Rs results do not necessarily translate into improved transistor performance
— More work is needed to optimize devices (not a simple plug in process)
WCJT July 14, 2005
Summary and Conclusions
ms annealing has been demonstrated to deliver shallow, highly active P- and N-type junctions meeting the 45nm ITRS requirements and beyond
Poly depletion is reduced on both n- and p-type polysilicon
Boron flash activation is stable with subsequent processing
Flash lamp annealing is a manufacturable approach for USJ formation
First application may be poly activation
Device results have been obtained, but more are needed to understand integration issues