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Gurdeepak Singh
Gurvir Kaur Gill
Roll Number:-4003,4004
PUNJABI UNIVERSITY, Patiala
INTEL-80386
Architecture
PRESENTATION
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Type Of Processor Intel 80386
Produced From 1985 to Sept.2007Common
manufacturer(s)
Intel, AMD, IBM
Max. CPU clock 12MHz to 40MHz
Min. Feature Size 1.5m to 1m
Instruction Set X86(IA-32)
Packages 132-pin PGA,132-pin PQFP
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Introduction toIntel-80386
a 32-bit microprocessor introduced by Intel
in 1985.The 32-bit registers and data paths support
32-bit addresses and data.
The processor can address up to fourgigabytes of physical memory and 64
terabytes (2^(46) bytes) of virtual memory
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Introduction toIntel-80386
It had two versions:-The i386SX variant, The i386SLvariant
This is termed asx86,IA-32, orthe i386
and was a advanced processor than 80286.
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Main Features
The 80386 could correctly execute code
intended for earlier 16-bit x86 processors
such as the 80286
1.The 80386 (commonly known as the
"386 chip") could handle four million
operations per second and handle memory
up to four gigabytes (4,294,967,296).
On chip Memory Management facilities:On chip Memory Management facilities:--
Address translation registers
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Main Featuresmultitasking hardware, a protection
mechanism, paged virtual memory
Special debugging Registers
Embedded systems that utilize a 80386 or
one of its derivatives are widely used in
aerospace technology.
converting large 8086/80286 programs tothe 80386 can produce dramatic increases in
performance.
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AddressingModes Direct, Register Indirect
Based Mode
Indexed Mode
Scaled Indexed Mode
Based Indexed mode
Based scaled indexed mode Based Indexed mode with displacement
Based scaled indexed mode with
displacement
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The processing modes of the 80386
GS
The processing modes of the 80386 determines the features that are accessible
Note : Major new feature in the i386 CPU was
80386 protected mode - this mode fixed many
shortcomings that existed in the 80286
processor and in the 80286 protected mode:
Three Types
Protected Mode
Real-Address Mode
Virtual Mode
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Interrupts
Interrupts are asynchronous events typically
triggered by external devices needingattention.
two sources for external interrupts:-
Maskable interrupts, which are signalled via theINTR pin.
Nonmaskable interrupts, which are signalled
via the NMI (Non-Maskable Interrupt) pin.
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InterruptsDivide errorDebug exceptions
Nonmaskable interrupt
Breakpoint (one-byte INT 3 instruction)
Overflow (INTO instruction)
Bounds check (BOUND instruction)
Invalid opcode
Coprocessor not available
Double fault
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InterruptsInvalid TSS
Segment not present
Stack exception
General protection
Page fault
Coprocessor error
Available for external interrupts via INTR pin
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Operating Systems
The 386 processor family enables a range of
low- cost, high- performance entry- levelsystem designs capable of running the entire
installed base of DOS, MS- Windows,
OS/2, UNIX, and RTOS applications
written for the Intel architecture.
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Drawbacks Intel originally intended for the 80386 to debut at
16MHz. However, due to poor yields, it was
instead introduced at 12MHz. Intel discovered a bug that could cause a system to
unexpectedly halt when running 32-bit software.
The i387 math coprocessor was not ready in time
for the introduction of the 80386, and so many ofthe early 80386 motherboards instead provided a
socket and hardware logic to make use of an
80287
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MAP INFOSOFTWARE
Used to save all kind of
information of every site init and can easily find thelocation of site on earth toinsert latitude and longitudeof every site.
Also save angles of GSMantennas of various sites ,information about variouslinks.
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HANDOVER
Cell 1 Cell 2
--- Handover is a process by which the control/communication
of a Mobile is transferred from one cell to another
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DRIVE TEST
Used to health check up of the Network.
It requires:
GPS (Global Positioning System)
A Mobile Set
CablesAccessories
Net Moniter Software
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GPS
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