FF - TB May 10th, 2005 1
L1
L0 F
AN
OU
T
LOG
IC
ALICE general Trigger layout
FE
E
LTU
CT
PL0
BUSY
FE
E
L1
TT
C v
iV
ME
BU
S
L2a, L2r
L2a,
L2r
L0
TT
C e
x CH
AC
H B
L2a, L2r
L0
L0
L1, L2a, L2r
L1, L
2a, L
2r
(LVDS)
BUSY
BUSY
(OPT FIBER)
(OPT FIBER)
TR
IG IN
PU
TS
(LV
DS
)
BU
SY
L0
(LV
DS
)
(LV
DS
)
(LVDS)
(LVDS)
(LVDS)
(LV
DS
)
BUSY
BU
SY
FA
NIN
LO
GIC
MEB
MEB
(EC
L)
OP
T S
LIT
TE
R
L1
(ECL)
(OP
T F
IBE
R)
TR
IG I
/P
FA
NIN
LO
GIC
(LV
DS
)
(LV
DS
)
FF - TB May 10th, 2005 2
Results of LVDS fan-in/fan-out survey(Orlando’s slide at 11/4/05 TB)
DETECTOR BUSY INPUTS L0 OUTPUTS L0 INPUTSDAQ 6 N/A N/ADM <3 <3 not requiredFMD 10 10 N/AHMPID 14 14 N/APHOS <3 <3 3PMD <3 <3 not requiredSDD 24 24 N/ASPD 20 20 not requiredSSD 16 16 N/AT0 <3 <3 not requiredTOF <3 72 N/ATPC <3 <3 N/ATRD <3 <3 not requiredV0 <3 <3 not required
FF - TB May 10th, 2005 3
Conclusions: L0 FANOUT and BUSY + TRIG I/P FANIN units
Proposed technical solution
VME 6U units plugged in LTU partition crates (probably need of 2 more crates)
Fanout: 1 LVDS IN - 12 LVDS OUT (limited by front panel mechanics)
Optional clocked delays to compensate cable lengths (25ns steps, 10-20 steps)
Important: minimum input/output latency required (50ns or better)
Jumpered cable shield GND connection (shorted or through a resistor)
Fanin: 12 LVDS IN - 1 LVDS OUT (limited by front panel mechanics)
Optional remote controlled channel masking
Optional clocked delays to compensate cable lengths (25ns steps, 10-20 steps)
Jumpered cable shield GND connection (shorted or through a resistor)
Compatible signal standard at IN and OUT:
same LVDS Tx and Rx as in LTU
same connectors as in LTU
Number of units (from Orlando’s survey) 10 Fanins and 15 Fanouts
Detectors asked to agree on technical solution and confirm quantities
Looking for collaborator(s) that are prepared to make the design
Time scale for availability: March 2006 (proto end of 2005)
FF - TB May 10th, 2005 4
LVDS trigger cables
Needed for: L0 fanout + Busy fanin + Trigger inputs to CTP
Cable lengths of 50 - 70m
Compensation at receiver side to correct for:
risk of loosing pulses
variation of pulse duty cycle
Based on passive equalizer to plug in front of the unit receiver connector
THREnd of differential shielded pair
Output of differential Rx (÷10 probe)
THR
PSpice 100m cable and source models
Measured 100m cable
FF - TB May 10th, 2005 5
LVDS transmission
Differential current source transmitter
LVDS Tx Normal typ output current (3.5mA)
LVDM Tx Double typ output current (7mA)
Single 3.3V supply
1.2V700mV
@ Zo=100Ω
50mV
Iout
Iout Zo
Tx Rx
tr, tf < 1ns
Tx = TI 65LVDM31
4 ch, 7mA, LVDS driver
tpd = 3ns Max
Rx = TI 65LVDS32B
4 ch, 50mV hysteresis, LVDS receiver
-2V / +4.4V Common Mode
Tpd = 6ns Max
Differential voltage discriminator receiver
Differential signal hysteresis = 50mV or 100mV
Output high if input unconnected or shorted
Single 3.3V supply
Texas Instruments evaluation board
+4.4V
-2.0V
FF - TB May 10th, 2005 6
Cable equalization principle
1) Maximization of the media bandwidth according to Max acceptable signal attenuation
2) Conservation of the cable termination impedance
PSpice 100m cable equalization Measured 100m cable attenuation
Cable Equalizer
Equalized cable
-16dB Atten.
Cable
-16dB = Max acceptable signal attenuation with:
• Worst case (min) current source at Tx (5.4mA for LVDM Tx)
• Worst case (max) hysteresis cycle at Rx, times safe margin of 2 (100mV for LVDS Rx)
• High impedance cable (120Ω) to maximize signal voltage at Rx (this is also better cable)
Equalized cable
FF - TB May 10th, 2005 7
Test results
120Ω262Ω (261Ω)
262Ω (261Ω)
160pF (150pF)
160pF (150pF)
148Ω (150Ω)
1.15μH (1μH)100m Draka
Li-2Y(St)H 3x2x0.088mm2
3x shielded twisted pairsZ0 = 120Ω ±10%
Without cable equalizer With cable equalizer
Rx output (÷10 probe)
End cable positive signal
Rx
Passive cable equalizer
FF - TB May 10th, 2005 8
Conclusions: trigger cables
Done simulations and tests of:100m Draka Li-2Y(St)H 3x2x0.088mm2 (3x shielded twisted pairs – 4.7ns/m)
Passive cable equalization showed safe working conditions up to 100m:equalizer to be implemented in compact solution
Draka could build single shielded pair with same characteristics for Alice:under verification through C. Dechelette
Estimated total cable length for whole ALICE:
~13Km from Orlando’s L0 and Busy table and 50m average per cable
~2.5Km for the CTP inputs cables (based on 50 Inputs and 50m average)
~5Km reserve for future use
TOTAL ~ 20Km