ZeUschr. Bd. 5 ,
f . math. S. 2’40-
Louik und 249 (1959)
Grundlagen d. i t lath.
A HIGH SPEED PARALLEL ADDER
By ALAN ROSE in Pu’ottingham
It is well known1) that the digits 1, 0 of binary numbers can be represented by the truth-values T , F respectively and that serial and parallel adders can be con- structed from logical decision elements. However, even the conventional parallel adder may have to propagate the “carry” several times before giving the correct sum of two binary numbers. The object of the present paper is to give a, new method of adding two binary numbers by means of logical decision elements. The operating time for this method is, in general, considerably less than that for the conventional parallel adder. We shall first show that all the digits of a sum may be evaluated simultaneously, only four stages being necessary in each case. We shall then adapt the method to t,he construction of an adder using much less equipment, the decrease in speed being, in most cases, very slight.
Let us suppose that we wish to add the two N-digit binary numbers x, y where
Thus the binary representations of x , y are
Y N YN--1 * . * !/I XN x37-1 . . x i ,
respectively. Let z = n + y
and let the binary representation of z be z N 1 zN , . . zl. Let wN be the digit which, in the ordinary process of manual addition, is carried immediately after the eva’- uation of x, (72 = 1 . 2 , . . . , N ) . Let m(= m(n) ) be the least non-negative integer such that = Y , ~ - ~ . We shall now show that if m(m) exists then
L
wn = 2, -711
and if m(n) does not exist then w, == 0 .
We shall prove the result by induction or1 R . If n =; 1 we first note that w1 = 1 if and only if x1 = y1 = 1. If x1 = y1 then m(1) = 0 and w1 = x1 i t s required. If x1 $. y1 then m(1) does not exist and wI = 0 as required.
We now assume the result for 71 and prove it for n + 1 . We first note that wn+, -- 1 if and only if
xnT1 f ~ n - - 1 4- wit 2 2 ,
1) See, for example, B. V. BOWDEN, Faster than thought, London 1953, pp. 52-54; also ANDREW D. BOOTH and KATHLEEN H. V. BOOTH, Automatic digital calculatora, Second Edi- tion, London 1956, pp. 3 7 4 4 .
A EIQH SPEED PARALLEL ADDER 241
If xn+l = Y , + ~ then m (n + 1) = 0 . If xn+1 = y,+l = 1 then Z n + l + Yn+l-!- Wn 2 2 and wn+, = 1 = x % + ~ as required. If xn+l = yn+l = 0 then x7,+, + $,,+I + wfl 5 1 and wn+, = 0 =- xn+l as required. If xn+l $. Y , + ~ then xn+l + yn+l + W , = 1 +'u,. Thus we have
W n + 1 = W n .
If m(n + 1) exists we have, since xn+l f y n + l ,
m(n + 1) = m(n) + 1 .
Hence, using our induction hypothesis,
'%+I = W n = Xn-m(n) = Xnn+l-m(n+j) *
If m(n + 1) does not exist then m (n) does not exist and, using our induction hypo- the&, we deduce that
w,+1= wn = 0 .
Thus the result is proved.
of p n , qn, P l , Pn+l respectively (n = 1 , 2 , . . . , N) then we may take We next show that if the digits xn, y,, , x l , z , + ~ correspond to the truth-values
p , = P 1 f 81, P , = P , & P , = ( P a = : , ) ,
Pn+l= (zy~il ((nE$+l(~$ v q i ) ) & Pj & 4j)) v Pn & qn
PN+1 = (.q2 ((D?=j+i (Pd v q3)
(Pnq 1 Pn+i)
(n = 2 , 3 , . . ., N - l ) ,
Pi 47.)) v P, &z !IN.
For P , the result is trivial. Before considering P, , P , , . , . , PN+i let us make the abbreviations
& l = %&!I19
Q, = (TZ ; ( ( f l r++~ v qi)) & Pj & qj)) v & qn (n = 2 7 3 3 * 1 * 9 N j - We shall show first that the digit w, is represented by the truth-value of Q, ( n = 1 , 2 . . . , N ) , i. e. that Q, takes the truth-value T when xnmm = 1 and that when xn-,,, = 0 and also when m does not exist Q, takes the truth-value F. If x , + ~ = 1 and m = 0 then the formula pn & q, takes the truth-value T as
does Q,. If xnn-m = 1 and m 2 1 then the formulae
Pn " qn 9 Pn-1" qn-i 9 * . . 7 Pn-m+l V q n - m + l , Pn-m & qn-m
all take the truth-value T as do the formulae
(n?=n-m+l (pi v qi)) & Pn-m & qn-m 9 Qn
If z,-~ = 0 then the formulae
Pn-m & qn-m 9 P n - m + l & qn-rn+l , * - 9 q n 16 Ztschr. f . math. Logik
242 ALAN ROSE;
all take the truth-value F as do the formulae
If m does not exist then the formulae
PI & PI, ~z & qz, . * - 9 Pn & qn
all take the truth-value E’ as does Q,. Hence, in all cases, Q, takes the required truth-value and the result is proved.
Since, for n = 1 , 2 , . . . ) N - 1 , P,+l is Qn = (pn+l E qn+l) , the result for Pn+I (n = 1 , 2 , . . . , N - 1) follows a t once. Also, since PN+I is Q N , theresult for PN+1 follows a t once from the fact that z and y have only N digits.
Thus, to obtain a decision mechanism for Q% (n = 2 , 3 , . . . , N ) we require a “2’ element whose n inputs correspond t,o the formulae
( n k i + l ( P i v q i ) ) & P j & q q j ( i = 1 ) 2 ) . . . , n - - l ) ) p ,n&qn.
Each of the first .n - 1 of these n inputs may be obtained from a ‘‘W’ element, the j t h (i = 1 ) 2 , . . . , n - 1) such element having n - j + 2 inputs correspond- ing to the formulae
Pj+i V qj+l, Pqj+~ V Q ~ + z , - * 3 Pn V qn, p j ) qj*
Thus each Q, (n = 2 , 3 , . . . ) N ) decision mechanism uses 3 stages and the P, (n = 3,4, . . . ) N ) decision mechanisms each use, in all, 4 stages. For P,, P,, P N + 1 we require, of course, 1 , 2 , 3 stages respectively.
In order to construct a fast adder a t lower cost we first note that
Qn = T (3s: ((a?= j +I (pi v qi) ) & Pj & v P n & Qn v (a,@=, (pi v q4)) & Qk - 1
( b = 2 , 3 , . . .) 12-1).
This follows a t once from the distrributive law
u&g,1 v i = T E f = , ( u & vl).
Thus we may construct a decision mechanism for Q, by combining a decision mechanism for Qk-l with a further mechanism, the input corresponding to Qku1 occurring two stages before the output corresponding to Q, . The further mecha- nisms for the cases k = 5; n = 5, 6 , 7 , 8 are shown in Figure 1 . The outputs Ps, P , , P8, P, shown in this figure are obtained in the szme way as in the original fast adder described above. We shall in future refer t o a mechanism whose inputs are the primary inputs and QM and whose outputs are P M + ~ , P,+, , . . . , PM+X+I as an f l M x mechanism. Thus Figure 1 illustrates an fld4 mechanism. In this figure any two points marked with the same number are considered to be connected. The construction of the mechanism depends, of course, on the value of X but not on the value of N.
A HIOH SPEED PARALLEL ADDER 243
t 4 CYI I
1 c *
244 ALAN EOSE
It follows that an adder for binary numbers of AX digits may be constructed from one fast adder’) for (X + 1)-digit numbers and 1 - 1 BMX mecha- nisms. The latter mechanisms are, of course, iden- tical2) in construction and correspond to the cases
N = X , 2x, . . . , ( A - 1)X. The arrangement for the case il = 8, X = 4, N = A X = 32 is shown in Figure 2 . Each f l M , mechanism will contain 30 decision elements, no input being fed to more than 6 elements (cf. Pig. 11, except flZ8,[ which contains 28 elements (cf. foot- note 2). The &digit number adder corresponds to the formulae PI ~ P,, P,, P 4 , P5, Q, and therefore contains 38 elements. Thus the 32-digit number adder contains a total of 236 decision elements. As in the case of the conventional parallel adder the whole mechanism will eventually reach a steady state, when the answer (i. e. outputs P I , P , . . . . , P,J may be read off.
However this will normally occur much SooIler than in the conventional parallel adder. The proba- bility that a single propagation from each of the first seven mechanisms to the next will be sufficient is greater than (cf. the footnote on p. 247) the proba- bility that, for each 5-tuple
(4y + 1 , + + 2 , . . . ,4,u + 5 )
( p = 1 , 2 , . . . , 6 ) , there exists an integer H (= H (p ) ) such that 4,~i + 1 5 HI 4p + 5 and x, = y,. This probabiLity is greater than 415. In the same way it can be shown that the probability that a t most two propagat,ions are necessary is greater than 99/100.
Let us, as a typical example , consider the addition 10001101011010110010100000110100 +
+ 11000010010111010101101110001011
of two binary numbers, each of 32 digits, by the two adders.
*) Since this adder is not required to give outputs corres- ponding to QX+* and P X A 2 it is essentially an adder for X-digit numbers with the addition of two “=” elements.
is Q l x two “=” elements are omitted from 2) Since Pg-1) X, X ’
El
A HIGH SPEED PARALLBL ADDER
(A) Conventional Parallel Adder
10001101011010110010100000110100
11000010010111010101101110001011
245
1st sum 01001111001101100111001110111111
1st carry 1 1 1 1 1
2nd sum 101001111101001000110001110111111
2nd carry 1 1 1 3rd sum 101001 11 1100000000100001 1101 11 11 1
3rd ca.rry 1 1 1 4 th sum 101001 11 1110010000000001 1101 1111 1 4th carry 1
5th sum 1010011111100100010000011101111I1
(13) Past Adder1)
1 st sum 01001111001101100111001 110111111
2nd sum 101001111110010001000001 110111111
l) In exhibiting the method of working of this adder we divide the digits of z and y into blocks of four corresponding to the 5-digit number adder and the seven lQXr mechanisms. In the same way the “carry” digits, corresponding to Q1, Q2, . . . , QsB are divided into blocks of four. For those values of for which there exists an integer v (= ~ ( p ) ) (1 5 v 5 4) such that ~ 4 ~ + , + y ~ p + o ( ( o = ( 2 , . . . , v ) we shall have initially
W4&+rn = 0
w4p+o = 0.
(0 = 1 . 2 , . . . , v ) ,
but this value of w ~ , , + ~ may be altered by propagation and we therefore write, for convenience -
When, in subsequent lines of L‘carry” digits, we consider the effect, of propagation we use the “@’ notation in a similar way. The line of ‘‘c(trry” digits will reach a steady state as soon as there exist no integers 0 , q (4 5 0 28, f3 + 1 S q~ 5 32) such that we = 1 ; wo+1, Wg+a , . . . , wp = 0.
-
246 ALAN ROSE
A more extreme example is provided by the sum:
10101101001101111001000001101001 + 11011000110010010110111110011100
(A) Conventional Parallel Adder
10101101001101111001000001101001
11011000110010010110111110011100
1st sum
1 st carry
2nd sum
2nd carry
3rd sum
3rd carry
4th sum
4th carry
5th sum
5th carry
6 t,h sum
6t,h carny
7th sum
7th carry
8th sum
8th carry
9th sum
9th carry
10 t'h sum
10th carry
11th sum
01110101111111101111111111110101
1 1 1 1
101100101111111001111111111100101
I 1 1
101000101111110001111111111000101
1 1 1
100000101111100001111111110000101
1 1 1
110000101111000001111111100000101
1 1
110000101110000001111111000000101
1 1
1100001011000000011111l0000000101
1 I.
110000101000000001111100000000101
1 1
110000100000000001111000000000101
1 1
110000110000000001110000000000101
1
110000110000000001100000000000101
11th carry 1
12th carry 1
12th sum 110000110000000001000000000000101
A HIGH SPEED PARALLEL ADDER
13 th sum 1100001 10000000000000000000000101
13th carry 1
14th sum 110000110000000010000000000000101
1 st carry loo0 1006 o000 11 11 o000 o000 2nd carry 1111 1006 1111 1111 ~~
3rd carry 1111 1001 1111 1111 m0 1111
4th carry 11111001111111111111111111111000
247
o000 1000
1111 1000
1111 1000
2nd sum 110000110000000010000000000000101
Thus method (A) requires 13 propagations while method (B) requir only 3. Such examples are, of course, rare. They are, however, considerably less rare than examples of the opposite extreme, such as the example obtained from the above by altering the values of x, and xl, from 1 to 0. In this case method (A) requires 4 propagations while method (B) requires 1, the presence of a steady state following from the identity of “2nd carry” and “3rd carry”. As will be seen from this last brief example method (B) is still considerably faster than method (A), even in an example of the rarest of all type of addition.
Finally we note that the conditions for one and two propagations to be suffi- cientl) correspond to the respective formulae
n&l (Zg:;+l (Pi = qt ) ) , n;=l(&=*j+I 4 j + 9 (pi = qi)). The corresponding decision mechanisms, which are of 3 stages, require a further 13 decision elements (p5 = q5, p6 = q6, . . . pzs = qzs are already provided), thus increasing the total number to 249. These outputs may, in most cases, be used to enable the final outputs to be read off as soon as they are available, without the need to determine whether the adder has reached a steady state. It hardly seems wort,h while to construct additional mechanisms corresponding to other cases, sirice the probability of such a case occurring for a sum selected at random is less than 1/100.
l) These are the conditions for all digitfl 0 to be eliminated. The working may also be termi- nated by meohanism which indicates that a steady state has been reached.
248
' k (ey,
k+ 7
ALAN ROSE
k k-1
skt7 r I I
I I I I &t,
I_ I I I 1 I i
ck t-
Fig. 3
i I
i i"l". C
I Fig. 4
- CARRY
A HIGII SPEED PARALLEL ADDER 249
A somewhat slower, but less expensive, adder may be constructed by using a mechanism with several outputs, these outputs corresponding to the digits wn (n = 1 , 2 , . . . , N ) . An earlier formula Q, found by the author was
and a single mechanism giving outputs corresponding to all t-he Q, has been con- structed by KILBURN, EDWARDS and ASPJNALL~). The circuit illustrated in their publication was a relay circuit but they also outlined a method of replacing the relays by transistors. The present formulae Qn correspond to either of the circuits shown in Figures 3 and 4. These circuits are somewhat similar to that of KILBURN, EDWARDS and ASP IN ALL^) and may, of course be replaced by transistor circuits in the same way.
In Figures 3 and 4 we use the notation of the diagram referred to in footnote 2. The upper portion of Figure 4 is omitted as it is identical with the corresponding portion of Figure 3 . These circuits make the operatfon conditions of certain switches correspond to the formulae xk V yk or to xk and Ye instead of the formulae xk + Yk. I n this way a better pulse will be obtained when using transistors since, to obtain outputs x k + y k , more stages are required. I n fact the outputs xk + T/k are often obtained from outputs x& v yk by using further decision elements, so the method of Figure 3 requires no additional equipment. Naturally even better pulses are obtained by using the method of Figure 4.
(Eingegangen am 2. April 1959)
1) T. KILBURN, D. B. G. EDWARDS and D. ASPINALL, Parallel addition in digital computers: A new fast “carry” circuit, The Institution of Electrical Engineers, Meaaurement and Control Section, Specialist discussion meetings on new digital-computer techniques 10 th-17 th Feb- ruary 1959, pp. 17-19.
2, Op. cit., Figure 1, p. 18.
Recommended
