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Advanced Electronic Design : www.a-e-d.com
Advanced Electronic Design : www.a-e-d.com
Alain Houelle
Nicolas Vaucher
XILINX ISE - PART 5
Pin Assignment
The architecture is done. Its ports must be connected to real pins of the FPGA (Xilinx). We
will connect
- the inputPort on a “push button” of the development board - the outputPort on a “LED” of the development board
Depending of the board routing, push buttons and LEDs are connected on specific pins of the
FPGA. You will find all information about the the development board inn its documentations.
Example – Spartan3E FPGA Starter Kit Board User Guide :
In the documentation, we can see that the
“push button” EAST is connected to pin
“H13” and needs a pull down.
inputPort outputPort
inputPort outputPort
LED
Development Board
FPGA
testGate
Advanced Electronic Design : www.a-e-d.com
Advanced Electronic Design : www.a-e-d.com
Alain Houelle
Nicolas Vaucher
In the same way, we can see that the LED number 0 is
connected on pin “F12”.
So we will connect inputPort on pin H13 and outputPort on
port F12.
First we will come back in implementation mode by
clicking on “Implementation button”
Next we will set “testGate” as the “top
module”. The “top module” is the module
which will be downloaded in to the FPGA.
You should obtain something like this (top module
symbol next “testGate”)
Advanced Electronic Design : www.a-e-d.com
Advanced Electronic Design : www.a-e-d.com
Alain Houelle
Nicolas Vaucher
Select I/O pin planning
(PlanAhead) – Post-
Synthesis
Select “I/O Ports”
Open “Scalar ports”
You should find your architecture ports:
inputPort
outputPort
Advanced Electronic Design : www.a-e-d.com
Advanced Electronic Design : www.a-e-d.com
Alain Houelle
Nicolas Vaucher
Select “inputPort”
Choose for :
inputPort : site=H13 ; I/O Std=LVCMOS33; Pull Type= PULL DOWN
outputPort : site=F12 ; I/O Std=LVCMOS33
Save your Design
And close Floor Planner Tool.