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AVR Microcontroller and Embedded System Using Assembly and CMazidi, Naimi, and Naimi

© 2011 Pearson Higher Education,Upper Saddle River, NJ 07458. • All Rights Reserved.

Introduction to ComputingIntroduction to ComputingChapter 0Chapter 0

The AVR microcontrollerand embedded

systemsusing assembly and c


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TopicsTopics

• Internal organization of computers– The different parts of a computer

• I/O• Memory• CPU

– Connecting the different parts• Connecting memory to CPU• Connecting I/Os to CPU

– How computers work


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Internal organization of computersInternal organization of computers

• CPU• Memory• I/O

– Input• E.g. Keyboard, Mouse, Sensor

– Output• E.g. LCD, printer, hands of a robot


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MemoryMemory

• Everything that can store, retain, and recall information.– E.g. hard disk, a piece of paper, etc.


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Memory characteristicsMemory characteristics

• Capacity– The number of bits that a memory can store.

• E.g. 128 Kbits, 256 Mbits

• Organization– How the locations are organized

• E.g. a 128 x 4 memory has 128 locations, 4 bits each

• Access time– How long it takes to get data from memory

…

4 bits

128

loca

tions

012

127


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Historical contextHistorical context

• Once upon a time, computer professionals noticed that 210 was very nearly equal to 1000 and started using the SI prefix "kilo" to mean 1024. That worked well enough for a decade or two because everybody who talked kilobytes knew that the term implied 1024 bytes. But, almost overnight a much more numerous "everybody" bought computers, and the trade computer professionals needed to talk to physicists and engineers and even to ordinary people, most of whom know that a kilometre is 1000 meters and a kilogram is 1000 grams.

• Then data storage for gigabytes, and even terabytes, became practical, and the storage devices were not constructed on binary trees, which meant that, for many practical purposes, binary arithmetic was less convenient than decimal arithmetic. The result is that today "everybody" does not "know" what a megabyte is. When discussing computer memory, most manufacturers use megabyte to mean 220 = 1 048 576 bytes, but the manufacturers of computer storage devices usually use the term to mean 1 000 000 bytes. Some designers of local area networks have used megabit per second to mean 1 048 576 bit/s, but all telecommunications engineers use it to mean 106 bit/s. And if two definitions of the megabyte are not enough, a third megabyte of 1024 000 bytes is the megabyte used to format the familiar 90 mm (3 1/2 inch), "1.44 MB" diskette. The confusion is real, as is the potential for incompatibility in standards and in implemented systems.


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Prefixes for binary multiplesPrefixes for binary multiples

• In December 1998 the International Electrotechnical Commission (IEC), the leading international organization for worldwide standardization in electrotechnology, approved as an IEC International Standard names and symbols for prefixes for binary multiples for use in the fields of data processing and data transmission.

• In computing, a binary prefix is a specifier or mnemonic that is prepended to the units of digital information, the bit and the byte, to indicate multiplication by a power of 2. In practice the powers used are multiples of 10, so the prefixes denote powers of 1024 = 210.

• The computer industry uses terms such as kilobyte, megabyte, and gigabyte, and corresponding symbols KB, MB, and GB, in two different ways. For example, in citations of main memory or RAM capacity, gigabyte customarily means 1073741824 bytes. This is a power of 2, specifically 230, therefore this usage is referred to as a binary unit or binary prefix.


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Binary PrefixBinary Prefix

Prefixes for binary multiples

Value Pronunciation Prefix Origin Derivation

210 kibi Kikilobinary:

(210)1 kilo: (103)1

220 mebi Mimegabinary:

(210)2 mega: (103)2

230 gibi Gigigabinary:

(210)3 giga: (103)3

240 tebi Titerabinary:

(210)4 tera: (103)4

250 pebi Pipetabinary:

(210)5 peta: (103)5

260 exbi Eiexabinary:

(210)6 exa: (103)6


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Decimal PrefixDecimal Prefix

Value Prefix Pronunciation

1000 K kilo

10002 M mega

10003 G giga

10004 T tera

10005 P peta

10006 E exa

10007 Z zetta

10008 Y yotta


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Prefixes in IndustryPrefixes in Industry

• In most other contexts, the industry uses kilo, mega, giga, etc., in a manner consistent with their meaning in the International System of Units (SI): as powers of 1000. For example, a 500 gigabyte hard drive holds 500000000000 bytes, and a 100 megabit per second Ethernet connection transfers data at 100000000 bit/s.

• As of 2011 the adoption of the IEC International Standard names and symbols for prefixes for binary multiples for use in the fields of data processing and data transmission has been slow and usage has been limited in the marketplace and in the press.


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Reality About Binary and Decimal PrefixReality About Binary and Decimal Prefix

• Faced with this reality, the IEEE Standards Board decided that IEEE standards will use the conventional, internationally adopted, definitions of the SI prefixes.

• Mega will mean 1 000 000, except that the base-two definition may be used (if such usage is explicitly pointed out on a case-by-case basis) until such time that prefixes for binary multiples are adopted by an appropriate standards body.

• In our SEE 3223 course we will use the binary prefix


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The reality of Binary Prefix ImplementationThe reality of Binary Prefix Implementation

The original DecimalIs adopted as Binary Prefix in most Computing

books/manuals

Prefix ValuePronunciation (as from

derivation)

K 1024 kilo

M 10242 mega

G 10243 giga

T 10244 tera

P 10245 peta

E 10246 exa

Z 10247 zetta

Y 10248 yotta


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Semiconductor memoriesSemiconductor memories

•RAM–SRAM (Static RAM)

–DRAM (Dynamic RAM)

–NV-RAM (Nonvolatile RAM)

• ROM– Mask ROM– PROM (Programmable

ROM)

– EPROM (Erasable PROM)

– EEPROM (Electronic Erasable PROM)

– Flash EPROM


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Memory\ROM\Memory\ROM\Mask ROMMask ROM

• Programmed by the IC manufacturer


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Memory\ROM\Memory\ROM\PROM (Programmable ROM)PROM (Programmable ROM)

• OTP (One-Time Programmable)– You can program it only once


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Memory\ROM\Memory\ROM\EPROM (Erasable Programmable ROM)EPROM (Erasable Programmable ROM)

• UV-EPROM– You can shine ultraviolet (UV) radiation

to erase it

– Erasing takes up to 20 minutes

– The entire contents of ROM are erased

2764


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Memory\ROM\Memory\ROM\EEPROM (Electrically Erasable EEPROM (Electrically Erasable Programmable ROM)Programmable ROM)

• Erased Electrically– Erased instantly

– Each byte can be erased separately

VSS

I/O2

I/O1I/O0

A0

A1

A2

A3

A4

A5

A6

A7

A12

RDY/BSY

I/O3

I/O4

I/O5

I/O6

I/O7

CE

A10

OE

A11

A9

A8

NC

WE

VCC

8K x 8


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Memory\ROM\Memory\ROM\Flash ROMFlash ROM

• Erased in a Flash• the entire device is erased at once


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Semiconductor memoriesSemiconductor memories

•RAM–SRAM (Static RAM)

–DRAM (Dynamic RAM)

–NV-RAM (Nonvolatile RAM)

• ROM– Mask ROM– PROM (Programmable

ROM)

– EPROM (Erasable PROM)

– EEPROM (Electronic Erasable PROM)

– Flash EPROM


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Memory\RAM\Memory\RAM\SRAM (Static RAM)SRAM (Static RAM)

• Made of flip-flops (Transistors)• Advantages:

– Faster

– No need for refreshing

• Disadvantages:– High power consumption

– Expensive

2K x 8

SRAM


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Memory\RAM\Memory\RAM\DRAM (Dynamic RAM)DRAM (Dynamic RAM)

• Made of capacitors• Advantages:

– Less power consumption

– Cheaper

– High capacity

• Disadvantages:– Slower

– Refresh needed


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Memory\RAM\Memory\RAM\NV-RAM (Nonvolatile RAM)NV-RAM (Nonvolatile RAM)

• Made of SRAM, Battery, control circuitry• Advantages:

– Very fast

– Infinite program/erase cycle

– Non-volatile

• Disadvantage:– Expensive


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Review QuestionsReview Questions


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Review Questions (Cont’d)Review Questions (Cont’d)


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Internal parts of computers\Internal parts of computers\CPUCPU

• Tasks:– It should execute instructions

• It should recall the instructions one after another and execute them


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VCCGND

A0-An-1

n

D0-D78

CS

OE

Connecting memory to CPUConnecting memory to CPU

• Memory pin out

WE

VCC


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Connecting memory to CPUConnecting memory to CPU

VCCGND

A0-An-1

n

D0-D78

CS

OE

WE

CPU

VCC

Address

Data

WE

Time

CS

Writing to memory

Address

Data

WE

Time

CS

Reading from memory

OE


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Connecting I/Os to CPUConnecting I/Os to CPU

• CPU should have lots of pins!

Mouse

Keyboard

Graphic CardSound Card

NetworkCPU


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Connecting I/Os to CPU using busConnecting I/Os to CPU using bus

CPU

I/O 0

Address bus

Data bus

Control bus

I/O 1 I/O 2 I/O n

WriteRead


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Connecting I/Os and Memory to CPUConnecting I/Os and Memory to CPU

CPU I/O 0

Address bus

Data bus

Control bus

I/O 1 I/O 2 I/O n

WriteRead

VCCGND

A0-An-1

n

D0-D78

CS

OE

WE

VCC


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Connecting I/Os and memory to CPU using busConnecting I/Os and memory to CPU using bus

CPU

I/O 0

Address bus

Data bus

Control bus

I/O 1 I/O 2 I/O n

WriteRead

VC

CG

ND

A0-

An-

1

D0-

D7

CS

OE

WE

0

1

2

3

0

How could we manage it? How could we manage it?


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VC

CG

ND

A0-

An-

1

D0-

D7

CS

OE

WE

Connecting I/Os and Memory to CPU using bus Connecting I/Os and Memory to CPU using bus (Peripheral I/O)(Peripheral I/O)

CPU

Address bus

Data bus

Control busWriteRead

0

1

..

63

IO/MEM

I/O 0 I/O 1 I/O 2 I/O n


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VC

CG

ND

A0-

An-

1

D0-

D7

CS

OE

WE

Connecting I/Os and Memory to CPU using bus Connecting I/Os and Memory to CPU using bus (Memory Mapped I/O)(Memory Mapped I/O)

CPU

I/O 16

Address bus

Data bus

Control bus

I/O 17 I/O 18 I/O n

WriteRead

0

1

..

15

Logic circuit

The logic circuit enables CS

when address is between 0 and

15

How could we make the logic circuit? How could we make the logic circuit?

Solution

1. Write the address range in binary

0 0 0 0 0 0 0 00 0 0 0 1 1 1 1

From address 0 To address15

2. Separate the fixed part of address 3. Using a NAND, design a logic circuit whose output activates when the fixed address is given to it.

a7 a6 a5 a4 a3 a2 a1 a0

a5a6

a4

a7CS


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Another example for address decoderAnother example for address decoder

• Design an address decoder for address of 300H to 3FFH.

Solution

1. Write the address range in binary 2. Separate the fixed part of address 3. Design the logic circuit.

a9a10

a8

a11CS0 0 1 1 0 0 0 0 0 0 0 0

0 0 1 1 1 1 1 1 1 1 1 1

From address 300H To address 3FFH

a7 a6 a5 a4 a3 a2 a1 a0a11 a10 a9 a8

0 0 1 1

a11 a10 a9 a8

An easy way of designing

An easy way of designing


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Exercise (refer Figure 0-16)Exercise (refer Figure 0-16)

1. Is the memory device a RAM or ROM?

2. What is the size of the device?

3. What is the base address of the device?

4. Modify the circuit such that the base address starts at C000H


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Figure 0-16Figure 0-16


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Exercise (refer Figure 0-19)Exercise (refer Figure 0-19)

1. Is the memory device a RAM or ROM?

2. What is the size of the device?

3. What is the base address of the device

4. Modify the circuit such that the base address starts at C000H


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Figure 0-19Figure 0-19


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Inside the CPUInside the CPU

• PC (Program Counter)• Instruction decoder• ALU (Arithmetic Logic Unit)• Registers

CPU

PC

ALU B

A

D

C

registersInstruction decoder


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Operation of a ProcessorOperation of a Processor

While (in operation)

Fetch instruction pointed by PC

Increment PC to point to next Instruction

Decode Instruction

Load 1st Operand (if any)

Load 2nd Operand (if any)

Execute Instruction

End While


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VC

CG

ND

A0-

An

-1

D0-

D7

CS

OE

WE

How computers workHow computers work

CPUALU B

A

D

C

registersInst. Dec.I/O 16 I/O 17 I/O 18 I/O n

Logic circuit

PC: 01

Address bus

Data bus

Control bus WriteRead

0

0

1

2

3

4

5

6

7

31h

C4h

26h

81h

EAh

0h

5h

31

A [17]B AA [6]AA+B[7]A


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VC

CG

ND

A0-

An

-1

D0-

D7

CS

OE

WE


CPUALU B

A

D

C


Logic circuit

PC: 1

Address bus

Data bus


0

1

2

3

4

5

6

7

31h

C4h

26h

81h

EAh

0h

5h

31

A [17]B AA [6]AA+B[7]A

17

9


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VC

CG

ND

A0-

An

-1

D0-

D7

CS

OE

WE


CPUALU B

A

D

C


Logic circuit

PC: 12

Address bus

Data bus


1

0

1

2

3

4

5

6

7

31h

C4h

26h

81h

EAh

0h

5h

C4 A [17]B AA [6]AA+B[7]A

17

99

2

26

3

6

5


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VC

CG

ND

A0-

An

-1

D0-

D7

CS

OE

WE


CPUALU B

A

D

C


Logic circuit

PC:

Address bus

Data bus


0

1

2

3

4

5

6

7

31h

C4h

26h

81h

EAh

0h

5h

A [17]B AA [6]AA+B[7]A

5

9

81

334

5

9+

E

4

EA

E

7

Eh

5


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How Instruction decoder worksHow Instruction decoder works

Opcode Operand

Instruction

Opcode Operand

Instruction

Operation Code Meaning

000 A x

001 A [x]

010 A A – register (x)

011 A A + x

100 A A + register (x)

101 A A – x

110 Register (xH) Register (xL)

111 [x] A

0

1

2

3

4

5

6

7

31h

C4h

26h

81h

EAh

0h

5h

A [17]B AA [6]AA+B[7]A

0011 0001

1100 0100

0010 0110

1000 0001

1110 1010

0000 0000

0000 0101

17 = 10001b


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Von Neumann vs. Harvard architecture Von Neumann vs. Harvard architecture

• Von Neumann architecture

Address bus

Data bus

Control bus

Address bus

Data bus

Control bus

CPU Address bus

Data bus

Control bus

DataMemory

CodeMemory

• Harvard architecture

CPUCode

MemoryData

Memory


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Review QuestionsReview Questions

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