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WEBENCH® Power Designer & Power Architect Basics
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Walkthrough of WEBENCH Power Designer
Electrical and Thermal Simulation
Build it and Reporting
Objectives
WEBENCH Overview
WEBENCH Tools
Power Designer Power supply and system architect design
LED driver design
Sensor analog front end design
Filter design and simulation
PLL implementation
LED Designer
Sensor Designer
Active Filter Designer
PLL Designer
Op amp design and simulationAmplifier Designer
WEBENCH Supports Broad Portfolio 12 Years Of Modeling And Verification
• LM258x
• LM259x
• LM267x
• LM557x, LM2557x
• LM2267x, LM22680
• LM315x
• LMZ1050x
• LMZ1420x/200x
• LM201xx/3x3
• LM(2)5005/07/10/(11)
• LM5001/02/08/09
• LM(2)5085/88
• LM2734/35/36
• LM2743
• LM2830/31/32
• LM2852/53/54
• LM3100/02/03
• LM3478/88
• LM34910/17/19/30
• LM3668
• LM3670/71/73/74
Circuit Calc & Sim model CC but no Sim WebTHERM /Build It
• LM2700
• LM2622
• LM3481
• LM3224
• LM258x
• LM259x
• LM267x
• LM557x, LM2557x
• LM2267x, LM22680
• LM315x
• LM5118
Switchers/Controllers/LED Drivers: 162 base part numbers in WEBENCH
Supported Topologies: Buck (over 60% of total designs), Boost, Flyback and SEPIC (newest)
• 1.0V: LM2743
• 2.5V: LM3670/1
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• 40A-60A: LM(2)5119, LMZ22010 (interleaved)
• 30A: LM27402
• 20A: LM2743, LM5116
• 0.6V: LM283x, LM2743, LM3150, etc.
• 100V: LM5116
• 95V: LM5008/9Vin Max
Vin Min
Coverage of WEBENCH Enabled Parts (Buck Switchers)
Vout Min
Iout
Multilingual capability
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• Chinese• simplified• traditional
• Japanese• Korean• Russian• Portuguese• German (coming soon)
Distributor & vendor versions
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And more…
• >110 component manufacturers & distributors• >21,000 components• Price and availability electronically updated hourly
• Avago exampleAvago example• Only contains Avago LEDsOnly contains Avago LEDs
WEBENCH® Tool Suite
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WEBENCH Power Designer
WEBENCH Visualizer
FPGA/Power Architect
AlteraPowerPlay
Power Architect & FPGAs
From optimized design to prototype
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2. Create design
Custom prototypeovernight
Custom prototypeovernight
PrototypePrototype
4. Build It!
Generate schematic& electrical analysis
Generate schematic& electrical analysis
Generate layout &thermal analysis
Generate layout &thermal analysis
3. Analyze design
Select designSelect design
Enter requirementsEnter requirements
1. Enter reqs
Optimize for:Optimize for:
Use graphs to visualize design
Use graphs to visualize design
• Footprint• Efficiency
• Footprint• Efficiency
Access WEBENCH tools from homepage or product folder
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WEBENCH Visualizer:Calculates 50 Designs in 2 Seconds
ChartsCharts Recommended SolutionsRecommended Solutions
WEBENCH Dashboard
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Power Power TopologyTopology
BOMBOM
Optimization Optimization GraphsGraphsChartsCharts
OptimizerOptimizer
Share DesignShare Design
System System SummarySummary
SystemSystemOp ValuesOp Values
PrototypingPrototyping& Reports& Reports
CircuitsCircuits
DesignDesignReqsReqs
WEBENCH® Tool Suite
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WEBENCH Power Designer
WEBENCH Visualizer
Power Architect & FPGAs
WEBENCH Optimization Tuning
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WEBENCH Design Optimization
Optimization Setting
FrequencyComponent
SelectionSummary
1 – Smallest footprint Highest
• Smallest footprint• Don’t care about cost
Smallest size but lowest efficiency
2 – Lowest cost High • Lowest costHigh frequency means
smaller / cheaper components
3 – Balanced Medium• In stock• Low cost
Balanced approach using IC’s middle frequency
4 – High efficiency Low
• Low DCR, ESR, Vf• Low cost
Higher efficiency, with low cost but larger parts
5 – Highest efficiency Lowest
• Low DCR, ESR, Vf• Don’t care about cost
Highest efficiency but largest parts
Key Optimization Parameters Graphed
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Power DissipationBy Component
FrequencyIC Temperature
FootprintEfficiency BOM Cost
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Schematic – Buck Converter
Input Load
Current Path with Switch On
Current Path with Switch Off
Components: Input Capacitor Regulator with integrated FET Inductor Catch Diode Output Capacitor Feedback Network Feature Controls
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Visualize Behavior – Power Dissipation
Diode:Isw*Vf *(1-DutyC)
Inductor:ILRMS
2 * DCRCin:ICinRMS
2 * ESR
Cout:ICoutRMS
2 * ESR
Switch: DC: IswRMS
2 * Rsw * DutyC AC: ½ * Vin * Isw * (Trise + Tfall)/TswQuiescent: Iq * Vin
Efficiency = Pout / PinPin = Vout * Iout + Pdiss
FET Selection: AC Loss
• PswAC = ½ * Vdsoff * Idson * (trise + tfall)/Tsw
Vsw = -VdsIsw
TriseTfall
Regions of power loss (V*I)
Vg
Vth
Miller Plateau
Vth
Miller Plateau
Vdriver
Vsw
Switch Off On Off
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FET Selection: AC Loss
• PswAC = ½ * Vdsoff * Idson * (trise + tfall)/Tsw
Vsw = -VdsIsw
Trise Tfall
Regions of power loss (V*I)
Vg
Vth
Miller Plateau
Vth
Miller Plateau
Vdriver
Vsw
Switch Off On Off
Low Freq = Low LossHigh Freq = High Loss
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How To Reduce FET Power Loss
• Choose a FET with low RdsOn
• Choose a FET with low capacitance
• Lower the switching frequency
BUT
• Lowering frequency affects the inductor selection
• We want to keep the inductor ripple current constant– Because this changes the peak switch current and the Vout ripple
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Inductor Current vs Switch Voltage
Inductor Current
Switch Voltage
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Inductor Ripple Current
Voltage applied
Inductor Ripple Current (also determines peak switch current and Vout ripple)
dI = (1/L)*V*dt
OnTime
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Inductor Selection – Lower Frequency
Voltage applied
Inductor Ripple Current (also determines peak switch current and Vout ripple)
Lower Frequency =Increased On Time = Increased Inductor Ripple Current = Increased Peak Switch Current and Increased Vout Ripple
Higher frequency:
If L is kept constant, ILpp increases
Lower frequency:
dI = (1/L)*V*dt
OnTime
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Inductor Selection – Raise Inductance
Voltage applied
Inductor Ripple Current (also determines peak switch current and Vout ripple)
Higher frequency:
If L is kept constant, ILpp increases
Lower frequency:
dI = (1/L)*V*dt
OnTime
So we need to increase L
Lower frequency with higher inductance:
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Effect Of Lower Frequency On Inductor
• If we keep the inductor ripple current constant by increasing the inductance:– The inductor gets larger (more turns)
– The inductor power dissipation goes up (longer wire)
Optimization – efficiency vs footprint
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Left SideHigher frequencySmaller footprint
Right SideLower frequencyLower resistance
small inductor large inductor
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Optimization Summary
• To get high efficiency– Decrease frequency to reduce AC losses– Choose components with low resistance
• To get small footprint– Increase frequency to reduce inductor size– Choose components with small footprint
• Cost
• These parameters are at odds with each other and need to be balanced for a designer’s needs
• Tools are available to visualize tradeoffs and make it easier to get to the best solution for your design requirements
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• Design has been configured for stable operation BUT
• May want to verify under dynamic conditions
• Improve line/load transient response
• Minimize output voltage ripple
• Modify control loop
• Interactive waveform viewer allows detailed analysis of results
Why Do Electrical Simulation?
Visualize Results
Try Solutions
Identify Problems
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Electrical Simulation
Specify simtype
Click start to initiate sim
• Bode Plot• Line Transient• Load Transient• Startup • Steady State
Esim page
Waveform viewer
Click to view waveforms
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Waveform Viewer
Click on a tile to add a waveform
Click and drag down and to the right to zoom in
Click and drag up and to the left to zoom out
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Evaluate Transient Response
• LM22680– Voltage mode pulse width modulation control scheme (PWM)
– Lower part count – SIMPLE SWITCHER®
• LM25576– Emulated current mode (ECM)
– Fast transient response
• Will evaluate:– How does ECM compare with PWM
– Vin: 14-22V, Vout: 3.3V, Iout: 2A
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Buck Schematics
LM22680 PWM
LM25576 ECM
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LM22680 vs LM25576Vout for Load Transient
LM22680
(Pulse Width Modulated)
LM25576
(Emulated Current Mode) has faster transient response recovery time
Load Transient: 0.2 – 2.0A
50 usec rise/fall time
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Overlay simulations
• Red: LM22680 (Pulse Width Modulated)
• Blue: LM25576 (Emulated Current Mode) has faster transient response recovery time
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© 2011 National Semiconductor Corporation.
• Co-heating of parts not accounted for with ThetaJA
• Change copper thickness, airflow, ambient temperature, voltage, current
• Color temperature plot across the board
• Adjustable scaling
Why Do Thermal Simulation?
Visualize Results
Try Solutions
Identify Problems
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Why Do Thermal Simulation?
• Identify and solve thermal issues– Co-heating of adjacent parts not taken into account with thetaJA
• Different ways to solve thermal problems:– Heat sink– Fan– Copper area/thickness
• Thermal simulation factors– Model Types:
• Physical geometry/materials modeled for regulator• Lumped cuboid models for passive components• Board modeled as a separate part, with traces modeled explicitly
– Simulation accuracy• 3D conduction• Radiation• Convection
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WebTHERM® – Board Layout
Thermal Sim Page
PC Board
Inputs:•Input voltage•Current•Top and bottom ambient temperature•Copper thickness•Airflow•Board orientation
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WebTHERM® Results
•View interactions between components
•Diode and IC both generate heat
•Effect of backside copper and vias
Top
Bottom
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LM3150 Controller
4oz copper thicknessLow side FET is 68C
.5oz copper thicknessLow side FET is 117C
Vin: 14-22VVout: 3.3VIout: 6A
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Order a Build It® kit
Build It PageBuild It Page
Order custom prototype kit:• Bare board and parts• Hourly pricing and inventory updates• Shipped overnight
WEBENCH Visualizer
optimized designsoptimized designs
Efficiency vs footprint vs BOM cost
mouseover detailmouseover detail
change axeschange axes
Why are solutions different?
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WEBENCH® Tool Suite
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WEBENCH Power Designer
WEBENCH Visualizer
Power Architect
Real system means many supplies
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Many Loads, Many Supplies
• Core Supply 1.25V @ 3.0A
• FPGA IO 3.3V @ 0.5A
• Vcca 3.3V @ 0.2A
• Flash 3.3V @ 2.0A
• SDRAM 1.8V @ 1.0A
• CCD 2.5V @ 0.2A
• PLL 1.25 @ 0.2A
• Motor Control 12V @ 2.0A
• Miscellaneous 3.3V @ 2.0A
9 Loads and 5 Voltages
WEBENCH® Processor Architect
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Includes TI processors!Includes TI processors!
Loads are pre-populatedLoads are pre-populated
Adding new/more loads
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WEBENCH optimized now for systems
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Analyze Performance, Cost, and Footprint for Selected Architecture
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Share design
Complete design report
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Your design• Inputs• Supplies• Schematics • BOMs• Local Languages
WEBENCH Power Designer
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Dynamic design optimization:Provides supply configuration/topology based on size, cost,
efficiency
WEBENCH Design Tools save you time
Other Features (Not discussed today): Visualizer, Power Architect, LED Designer, FPGA/uP
Architect
Thanks
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Appendix
LED Lighting Gadgets
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Phase (TRIAC) Dimmable LED Drivers
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LM3466 Multi-String LED Current Equalization
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