We buy good boards!(Improve yield from design to production)

Christophe LOTZ

christophe.lotz@aster-technologies.com

ASTER Technologies

IEEE 8th InternationalBoard Test Workshop

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Content• Introduction

• Yield improvements

• Defect prevention vs. Defect detection

• Test Coverage vs. Test Efficiency

• Production model

• Technologies convergence• Coverage Analysis

• + Traceability & Quality tools

• = Test Innovation

• Conclusion

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The world changes• Electronic design and production changes:

Functional complexity of electronic boards. Staggering board density. Outsourcing of board production.

Block 1 Block 2

Block 3

Non-functional channels

We buy good boards

SMD, fine pitch, BGA, buried via

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Yield improvements

Defect Prevention

Defect Detection

• For a lot of people, Quality is costly. However, Non-Quality can be fatal.

• When it is impossible to reduce the task, it is always possible to reuse the results for other purpose: i.e. Test for Designability, Production line optimization, Repair Cycle, Product life…

• Combine Design Re-Use with Test Re-Use…

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Defect prevention• Design Flow

• Electrical DfT rules checking from schematic.

• Probe optimization from schematic.

• Probe placement – Mechanical DfT rules.

• DfM – Design for Manufacturing.

• Coverage estimation

–Inspection: AOI, AXI

–Structural test: ICT,FPT,MDA,BST

–Functional test: In-System test, Emulation…

• Lack of automation/understanding between design and production center (The WALL)!

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• Manufacturing flow• Assembly machine

–Feeder control/supply chain management,

–Passive measurement during placement.

• Traceability tools

–Work In Process,

–Box Building.

• Repair station

–CAD data,

–Fault ticket,

–Diagnosis.

–Defect occurrence/re-occurrence

Defect Prevention

Quality System mustbe able to report

the amount of defects by partnumber

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Defect Detection

• Insufficient

• Excess

• Cold Solder

• Marginal Joints

• Voids

• Polarity (PCAP)

• Missing

• Gross Shorts

• Lifted Leads

• Bent Leads

• Extra Part

• Bridging

• Tombstone

• Misaligned

• Polarity

• Shorts

• Open

• Inverted

• Wrong Part

• Dead Part

• Bad Part

• In-System Programming

• Functionally Bad

• Short/Open on PCB

AOI

In-Circuit

X-RaySolder

Material

Placement

• At-speed memory tests

• At-speed interconnect

• Fault Insertion

• Gate level diagnosis

JTAG

(unpowered)

(unpowered)

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Defect Detection

MPS PPVS PCOLA/SOQ PCOLA/SOQ/FAIM

Material Value Correct Correct

Live Live

Placement Presence Correct Correct

Live Live

Polarity Orientation Orientation

Solder Solder Short Short

Open Open

Quality Quality

Function Function Feature

At-Speed

In Parallel

Measurements

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• One coin/two sides: Defect Coverage

• Drill-down on flows for more defect categories

Defect Detection

FunctionManufactureDesign

SolderingPlace

componentsBuy Materials(Supply chain)

OrientationPresence

MPS, PTC, PPVS, PCOLA/SOQPCOLA/SOQ/FAIM…

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• Demonstration using an absurd example • Board - 4 components: 3 resistors, 1 BGA.

• The 3 resistors are measured with very high accuracy.

• No test on the BGA.

• Is the board test score really 75%?

3 resistors / 4 components

• We need something to weight the coverage… It must be credible, easy to update to reflect growing electronics complexity.

Test Coverage

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Test Efficiency• For each category (MPS) of defects (D), we

associate the corresponding coverage (C).

• The test efficiency is based on a coverage balanced by the defects opportunities.

DfCf

DM + DP + DS

DM CM + DP CP + DS CS

We need a better coverage where there are

more defect opportunities!

Effectiveness =

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• Coverage• Material=0%, Placement=100%, Solder=100%

• Massive production:• Material=2PPM, Placement=10PPM, Solder=10PPM

• Test efficiency=90.9%

• High mix:• Material=15PPM, Placement=10PPM,

Solder=15PPM

• Test efficiency=60.5%

Test Efficiency

Everything is relative.

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DPMOEscape rate

IPC

• How to know your defect universe?• Average number: It is better than nothing as it make possible to differentiate a resistor from an IC.

–www.ppm-monitoring.com

–www.inemi.org

• DPMO collected from the real production line

–Placement defects andsoldering defects by package.

–Material defects by partnumber.

Defect universe

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Production model• Summarize the coverage in a limited set of

numbers that will guide the test strategy choice.

• The “Escape” is an effective way to measure the manufacturing quality.

Test

First PassYield

Fall-OffRate

Pass

Fail

Good

Bad

Good

Bad

Escape

False reject

Productsshipped

Productsrepaired

Yield

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• Design re-use is widely accepted throughout the electronics industry.

• Design | test specification | test development | quality management are isolated in separated silos. Limited data exchange between silos.

• It is time for test-reuse and technologies convergence.

• It increases the test value.

• It decreases the test cost.

Technologies convergence

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• Functional coverage could be managed as described in BTW06 paper.

• By Declaration

Functional test

Schematic and layout viewers used to simplify

coverage declaration.

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• By Inheritance

Functional test

Recognition of pre-analyzed modules

with corresponding coverage

Derivation and accumulation for the new design.

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• For a complex board, it represents 3 to 5 days work to analyze the functional coverage if nothing has been prepared from design flow.

• Benefits:• Get the overall coverage

(inspection + structural + functional),

• Identify overlapping (potential optimization),

• Identify lack of coverage (Failure Mode and Effects Analysis).

Functional test

Tested?

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• Functional test• Functional Test coverage tool used as functional

test specification tool.

–Define test strategy early in the design flow.

– Identify unique test contribution.

–Avoid un-required overlapping.

• Functional Blocks recognition make possible to develop an Automatic Functional Test Generator.

–Automate test development and coverage analysis in high-hierarchical design flow.

– Integrate Designer knowledge for repair purpose.

Test Innovation

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• Test line• Test coverage results re-used in functional test

repair station.

–The Pass tests tell us which defects are not on the board.

–The Fail tests tell us which defects could be on the board.

• Combined with historical data in order to guide diagnosis to the most probable source of defect.

Test Innovation

Repair

Traceability Quality

Tester interface

CADData

Testers

DatabaseViewer

/ Advisor

Data processing/ Exploitation

Parsing /Recording Coverage

Database

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• Dynamic test program optimization driven by Quality management tool.

• When the test is the bottleneck of the production:

• The Quality Management system is collecting DMPO in real time.

• Defect profile is used to tune the assembly line.

• According to the defect profile, the test program is dynamically optimized.

Test Innovation

No need to maintain test on defect thatno longer occurs !

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Conclusion

• From design, during production and in a more general way, through the whole product life cycle, coverage estimation permits the test process to be optimized.

• By deploying various testers in the best order, at the best time, with controlled levels of redundancy, costs can be reduced and quality levels raised.

• The economic challenges are critical: the tools to meet them are available.