Way beyond fast © 2002 Axis Systems, Inc. CONFIDENTIAL Axis Common Transaction Interface (CTI) Architecture Highlights 9/11/2003 Ching-Ping Chou Axis Systems,

© 2002 Axis Systems, Inc. CONFIDENTIAL© 2002 Axis Systems, Inc. CONFIDENTIAL way beyond fastway beyond fast

Axis Common Transaction Interface (CTI) Architecture

Highlights

Axis Common Transaction Interface (CTI) Architecture

Highlights

9/11/2003

Ching-Ping Chou

Axis Systems, Inc

9/11/2003

Ching-Ping Chou

Axis Systems, Inc


OverviewOverview

Synthesizable and Hardware Acceleratable BFM Interface. Event Driven, Transaction Based SW/Emulator

Communications. High Level API Functions (C and e). Light-weight Multi-threaded Foundation. Modualized, Layered, and Extendable Hierarchy. Feature Highlights. Higher Level Common Command Controller xbCtrl

(optional).

Synthesizable and Hardware Acceleratable BFM Interface. Event Driven, Transaction Based SW/Emulator

Communications. High Level API Functions (C and e). Light-weight Multi-threaded Foundation. Modualized, Layered, and Extendable Hierarchy. Feature Highlights. Higher Level Common Command Controller xbCtrl

(optional).


HW callback

DMA

Virtual Channel

Virtual Channel

Virtual Channel

User Design(DUT)

Interface B

Interface A

HW (emulator)Axis_clkgen

(user specified)

Control &Communication

Layer(HW)

InterfaceProtocolLayer(HW)

CTI A

CTI B

CTI HW (Emulator) Library

User RTL

SW

Control &CommunicationLayer(API)

InterfaceProtocol

Layer(API)

CTI API Library

UserMainTest

Function

(Xthread 1)

Generator(Xthread 1)

Verifier(Xthread 4)

Task B(Xthread 3)

call

create thread

create thread

shared memoryXthread eventXthread signal

User Test Functions

callblocking/non-blocking

returnresuming

Task A(Xthread 2)

create thread

BFM A

BFM B

TransactionCommandEncoder &Result Decoder


Shares user specified DUT clock generated from either SW simulator or HW emulator.

Manages CTI-predefined HW events or user-defined HW events for interrupt callback.

Manages CTI FIFOs. Provides throughput of at least 1 FIFO word per

cycle.

Synthesizable, Hardware Acceleratable BFM Interface


Event Driven, Transaction Based SW/Emulator Communications

Event Driven, Transaction Based SW/Emulator Communications

Provides SW callback upon HW CTI status changes (e.g. FIFO full, empty, rewind, timer timeout, error) or user-defined signal changes (e.g. DUT interrupt, BFM checkpoint reached)

Consists of single or bi-directional FIFO for transaction command/information/data exchange between SW and emulator.

Provides Arbitrary-length burst transfer through DMA. CTI API manages SW/HW FIFO coherence.

Provides SW callback upon HW CTI status changes (e.g. FIFO full, empty, rewind, timer timeout, error) or user-defined signal changes (e.g. DUT interrupt, BFM checkpoint reached)

Consists of single or bi-directional FIFO for transaction command/information/data exchange between SW and emulator.

Provides Arbitrary-length burst transfer through DMA. CTI API manages SW/HW FIFO coherence.


High Level API Functions (C and e)High Level API Functions (C and e)

C Stdio-like puts/gets blocking I/O, non blocking I/O.

I/O control and query functions. HW event enable/disable. Reset HW. SW-HW I/O or event synchronization. HW timer support. HW memory DMA.

C Stdio-like puts/gets blocking I/O, non blocking I/O.

I/O control and query functions. HW event enable/disable. Reset HW. SW-HW I/O or event synchronization. HW timer support. HW memory DMA.


Light-Weight Multi-thread FoundationLight-Weight Multi-thread Foundation

Provides light weight non-preemptive Multi-thread feature in C.

Supports dynamic thread creation and termination.

Provides SW event signals for synchronization between Threads.

Provides conditional thread resuming.

Provides light weight non-preemptive Multi-thread feature in C.

Supports dynamic thread creation and termination.

Provides SW event signals for synchronization between Threads.

Provides conditional thread resuming.


Modualized, Layered, and Extendable HierarchyModualized, Layered, and Extendable Hierarchy

Each CTI element (API and HW library) is modulized. No centralized configuration parameters are required.

Each CTI instance is independent to each other, yet they can easily communicate to others thru HDL connections or SW information sharing and synchronization.

CTI module can be instantiated at any location in user's HDL hierarchy. It is not limited to only connect to DUT top level ports.

More layers of SW or HDL can be added on top of existing CTI components.

It is highly reusable in any verification topology.

Each CTI element (API and HW library) is modulized. No centralized configuration parameters are required.

Each CTI instance is independent to each other, yet they can easily communicate to others thru HDL connections or SW information sharing and synchronization.

CTI module can be instantiated at any location in user's HDL hierarchy. It is not limited to only connect to DUT top level ports.

More layers of SW or HDL can be added on top of existing CTI components.

It is highly reusable in any verification topology.


Feature HighlightsFeature Highlights

Supports Multi-thread. Supports HW event triggered callback/resume. Provides CTI pre-defined events; user-defined events. Provides more complete testbench features. Does not use uncontrolled clock. SW reset HW. Good modualization, distributed configuration,

extendability, and reusability. CTI HW library feels like RTL, API feels like pure SW

functions.

Supports Multi-thread. Supports HW event triggered callback/resume. Provides CTI pre-defined events; user-defined events. Provides more complete testbench features. Does not use uncontrolled clock. SW reset HW. Good modualization, distributed configuration,

extendability, and reusability. CTI HW library feels like RTL, API feels like pure SW

functions.


Higher Level Common Command Controller xbCtrl (optional)

Higher Level Common Command Controller xbCtrl (optional)

Pre-defines common transaction command formats to share the same encoding space among multiple layers of CTI command processors with flexibility to create user-defined commands.

Consists comman command decoder, command issuer interfaces to BFM or memory controller for HW overlapped operation.

Provides throughput Up to 3 FIFO words outward, and 2 FIFO words inward.

PS: With encoding, a variable-length multi-word transaction command (CSIC-like) can be applied.

Pre-defines common transaction command formats to share the same encoding space among multiple layers of CTI command processors with flexibility to create user-defined commands.

Consists comman command decoder, command issuer interfaces to BFM or memory controller for HW overlapped operation.

Provides throughput Up to 3 FIFO words outward, and 2 FIFO words inward.

PS: With encoding, a variable-length multi-word transaction command (CSIC-like) can be applied.

Documents

Way beyond fast © 2002 Axis Systems, Inc. CONFIDENTIAL Axis Common Transaction Interface (CTI) Architecture Highlights 9/11/2003 Ching-Ping Chou Axis Systems,