volatge dip mitigation with D-Statcom

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MITIGATION OF VOLTAGE SAG AND SWELL IN

DISTRIBUTION SYSTEM USING D-STATCOM

Thesis submitted for partial fulfillment of the requirements

for the degree of

Master of Electrical Engineering

By

KALYAN SRINIVAS ADAPA

(EXAM Roll No. M4ELE12-13)

(Reg. No. 113463 of 2010-12)

Under the Guidance and Supervision of

Dr. Sunita Halder nee Dey

Department of Electrical EngineeringFaculty of Engineering and Technology

JADAVPUR UNIVERSITY

Kolkata-700032, India.

2010 2012


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JADAVPUR UNIVERSITY

Kolkata-700032, India.

FACULTY OF ENGINEERING AND TECHNOLOGY

Department of Electrical Engineering

ertificate of Recommendation

This is to certify that Kalyan Srinivas Adapa has completed his project workentitled Mitigation of Voltage Sag and Swell in Distribution system using

D-STATCOM under my direct supervision and guidance. This thesis is

submitted in partial fulfilment of the requirements for the award of degree of

Master of Electrical Engineering during the academic year 2011-2012.

...

Dr. Sunita Halder nee Dey

Supervisor of Thesis

Department of Electrical Engineering,

Jadavpur University,

Kolkata 700032.

Forwarded by:

..

Prof. NIRMAL KUMAR DEB

Head,

Department of Electrical Engineering,

Jadavpur University ,

Kolkata 700032.


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JADAVPUR UNIVERSITY

Kolkata-700032, India

FACULTY OF ENGINEERING AND TECHNOLOGY

Certificate of Approval *

The foregoing THESIS is hereby approved as a creditable study of anEngineering Subject carried out and presented in a manner satisfactory towarrant its acceptance as a pre-requisite to the DEGREE for which it has beensubmitted. It is notified to be understood that by this approval, the undersigneddo not necessarily endorse or approve any statement made, opinion expressedand conclusion drawn therein but approve the THESIS only for the purpose forwhich it has been submitted.

FINAL EXAMINATION FOR

EVALUATION OF THE THESIS BOARD OF EXAMINERS

.

.

.

.

.

* Only in case the thesis is approved (Signature of Examiners)


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Declaration of Originality and Compliance of Academic Ethics

I hereby declare that this thesis contains literature survey and originalresearch work by the undersigned candidate, as part of her Master ofEngineering in Electrical Engineering studies.

All information in this document have been obtained and presented inaccordance with academic rules and ethical conduct.

I also declare that, as required by these rules and conduct, I have fullycited and referenced all materials and results that are not original tothis work.

Name KALYAN SRINIVAS ADAPA

Examination Roll Number : M4ELE12-13

Thesis Title : Mitigation of Voltage Sag and Swell

In Distribution System using

D-STATCOM

Signature with Date :


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ACKNOWLEDGEMENT

It is a pleasant task to express my gratitude to all those who have assisted me in my

project work.

First of all I take this opportunity to express my sincere thanks and deepest sense of

gratitude to my guide, Dr. Sunita Halder nee Dey of Electrical Engineering Department

for offering her guidance to me in carrying out this project. I would like to thank her for

providing me with her valuable time and helpful suggestions. She also helped me by

providing constructive ideas throughout the tenure of this work.

I am indebted to Prof. Nirmal Kumar Deb, Head, Department of Electrical

Engineering, Jadavpur University, for providing me with all the necessary facilities forcarrying out this work.

I would also like to convey my gratitude to Prof. Subrata Pal, in-Charge, Power

System Laboratory of Department of Electrical Engineering, Jadavpur University for his

valuable suggestions during the Project. I am also thankful to Prof. P. K. Chattopadhyay,

Prof. S. K. Goswami of Department of Electrical Engineering, Jadavpur University for

their guidance, encouragement and valuable suggestions in the course of this work.

I would like to express my heart-felt gratitude to my parents, my roommates and my

colleagues for their love and active support throughout the endeavour.

Last, but not the least, I would like to thank my batch-mates and fellow PhD

researchers, KDV Narasimha Rao, yadaiah CH, subrahmaniam, sudhakar reddy and all

others who have directly or indirectly helped me in this work.

Kalyan Srinivas Adapa

Electrical Engineering Department

Jadavpur University

Kolkata-700032

May 31, 2012 .


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PREFACE

The THESIS has been submitted towards the partial

fulfillment of the requirement for the AWARD of the

DEGREE of MASTER of ELECTRICAL ENGINEERING of Faculty of

Electrical Engineering and Technology of the Jadavpur

University, Kolkata-700032.


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I

CONTENTS

1. Introduction 1-5

2. Concept of Voltage Sag and Swell 6-15

2.1 Voltage Sag 6

2.1.1 Definition 6

2.1.2 Causes . . 7

2.1.2.1 Due to Fault ........................................................................ 7

2.1.2.2 Due to Motor Starting ......................................................... 7

2.1.2.3 Due to Transformer Energizing .......................................... 7

2.1.3 Effects .. . 7

2.1.4 Characteristics .. 8

2.1.4.1 Magnitude of Sag ........................................................... . 8

2.1.4.2 Duration of Sag ................................................................ 9

2.1.4.3 Unbalance of Sag ............................................................. 9

2.1.4.4 Phase Angle Jump ........................................................... 9

2.1.5 Stand ards . . 9

2.1.5.1 IEEE Standards ............................................................. 10

2.1.5.2 Industry Standards .......................................................... 11

2.1.6 Mitigation Techniques .. .. 11

2.1.7 Simulation Techniques applied for Mi tigation .. . 12

2.2 Voltage Swell ....... 13


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II

2.2.1 Definition ... . 13

2.2.2 Categorie s .. . 13

2.2.3 Terminology Used ...... 14

2.2.4 Causes . 14

2.2.5 Effe cts ... .. 15

2.2.6 Mitigation Techniques .. .. 15

2.2.7 Simulation Techniques applied for Mitigation ..... 15

3. Theory of D-STATCOM 17-20

3.1 Distribution Static Compensat or .. 17

3.1.1 Basic Configuration and Operation of D- STATCOM... ... 18

3.1.2 Operating modes of D- STATCOM . 20

4. Modeling of Test System and Controllers for System Simulation 21-33

4.1 Test Systems .. ...... 21

4.1.1 Test System -1 for Si mulation . 21

4.1.2 Test System - 2 for Simulation . 21

4.2 Sinusoidal PWM b ased Control Scheme .... . 22

4.2.1 Sinusoidal PWM b ased Control . 22

4.3 Basic Test Systems Without Controller for Voltage Sag ... ... 24

4.4 Basic Test Systems Without Controller for Voltage Swell.. 26

4.5 Modeling Of Distribution Static Compensator with Test System-1 28

4.5.1 For Voltage Sag ... . 29


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III

4.5.2 For Voltage Swell ... 30

4.6 Modeling Of Distribution Static Compensator with Test System-2 31

4.6.1 For Voltage Sag .. .. 32

4.6.2 For Voltage Swell ... 33

5. System Simulation a nd Discussion 34-45

5.1 Voltage Sa g . 3 4

5.1.1 Without Controllers . . 34

5.1.1.1 Closing of the RL load in Test System- 1 34

5.1.1.2 Single Line to Ground Fault in Test System-2 . 37

5.1.2 With Controllers .. . 39

5.1.2.1 Closing of the RL Load in Test System- 1 . . 39

5.1.2.2 Single Line to Ground Fault in Test System-2 .. 40

5.2 Voltage Swell ... .. 41

5.2.1 Without Controllers . 41

5.2.1.1 Capacitive load in Test System- 1 .. . 41

5.2.1.2 Capacitive load in Test System- 2 . 43

5.2.2 With Controllers .. . 45

5.2.2.1 Capacitive load in Test System-1 .. 45

5.2.2.2 Capacitive load in Test System- 2 .. 46

6. Conclusion and Future Scope 47-48

6.1 Conclusion .. 47


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6.2 Future Scope 48

Reference 49-51

Appendix 1

Introduction to PSCAD 52-56


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1

CHAPTER

INTRODUCTION

Industrial and commercial consumers of electrical power are becoming

increasingly sensitive to power quality problems. Reliability and quality are two

important parameters in the field of power engineering. Electricity delivery is no

exception. Combining todays utility power with the ever increasing quantity of

electrical sensitive load yields one of the major contributors to downtime in business

and industries today. Issues of deregulation, standards and customer awareness

(economics and legal) have brought forth a great deal of focus and motivation in theseareas. Tremendous dedication from engineers as well as huge amounts of revenue has

been spent to enhance the quality and reliability of electricity delivery.

Power quality has become a very important issue recently due to the impact on

electricity suppliers, equipment manufacturers and customers. Power quality is

described as the variation of voltage, current and frequency in a power system. It

refers to a wide variety of electromagnetic phenomena that characterize the voltage

and current at a given time and at a given location in the power system [9].

Nowadays, there are so many industries using high technology for manufacturing and

process unit. This technology requires high quality and high reliability of power

supply. The industries like semiconductor, computer and the equipments of

manufacturing unit are very sensitive to the changes in the quality of power supply.

[10]. This power quality is essential for proper operation of industrial processes which

involves a good protection to the system for being well and progressive for long

usage. Power quality problems such as voltage sag, swell, harmonic distortion,unbalance, transient and flicker may have impact on customer devices which will

cause malfunctions and loss of production [11].

The last decade has seen a marked increase on the deployment of end-user

equipment that is highly sensitive to poor quality controlled electricity supply. Several

large industrial users are reported to have experienced large financial losses as a result

of even minor lapse in the quality of electricity supply [20]. Efforts have been made to

remedy the situation, where solutions based on the use of the latest power electronic


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technologies prominently. Indeed, custom power technology, the low- voltage

counterpart of the more widely known flexible ac transmission system (FACTS)

technology, aimed at high-voltage power transmission applications, has emerged as a

credible solution to solve many problems relating to continuity of supply at the end-

user level. Both the FACTS and custom power concepts may be directly credited to

EPRI (Electric Power Research Institute).

Power quality problems in industrial applications concern a wide range of

disturbances, such as voltage sags and swells, flicker, interruptions, harmonic

distortions etc. Prevention of such phenomena is important particularly because of the

increasing heavy automation in almost all the industrial processes. High quality in the

power supply is needed, since failures due to such disturbances usually have a highimpact on production costs. Table 1(a) describes the demarcation of the various power

quality issues defined by IEEE Standard 1159-1995 [4]

Table 1(a): Demarcation of the various power quality issues defined by IEEE Standard 1159-1995.


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Voltage sag is the most important power quality problems faced by many

industries and utilities. It contributes more than 80% of power quality (PQ) problems

that exist in power systems [23]. Voltage dips are one of the most happening power

quality problems. Off course, for an industry an outage is worse, than a voltage dip,

but voltage dips occur more often and cause severe problem and economical losses.

Utilities often focus on disturbances from end-user equipment as the main power

quality problems. This is correct for many disturbances, flicker, harmonics, etc., but

voltage dips mainly have their origin in the higher voltage levels. Faults due to

lightning, is one of the most common causes to voltage dips on overhead lines. If the

economical losses due to voltage dips are significant, mitigation actions can be

profitable for the customer and even in some cases for the utility. Since there is no

standard solution which will work for every site, each mitigation action must be

carefully planned and evaluated. There are different ways to mitigate voltage dips,

swells and interruptions in transmission and distribution systems. At present, a new

generation of power electronics based equipment aimed at enhancing the reliability

and quality of power flow in low voltage distribution network, so called custom

power controllers are extensively used in compensating the voltage sag.

PSCAD/EMTDC [21], a highly developed graphical user interface has been used by

the researchers to perform the modelling and analysis of such controllers for a wide

range of operating conditions.

Voltage sag is a short duration RMS voltage reduction in the range of 0.1 - 0.9

per unit which is caused by a fault in the power system or starting of large loads such

as motor. Some of the equipments trip when the RMS voltage drops below 90% for

longer than one or two cycles. A normal duration of sag according to the standard is

10 ms to 1 minute and considered as the most serious problem of power quality [13].

Sag could be balanced or unbalanced depending on the type of fault and could have

unpredictable magnitude depending on the distance from the fault and the transformer

connection. In power distribution system, voltage sag has become the most common

power disturbance which certainly affects the industrial and large commercial

customers such as the damage of the sensitive equipments and lost of daily production

and finances [12]. Every consumer is subjected to a voltage sag occurrence since

faults cannot be totally avoided. In fact, the greatest losses will fall upon customers

having sensitive equipment such as PLCs (programmable logic controllers) and ASDs


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(adjustable speed drives) [14]. It has been reported that, high intensity discharge

lamps used for industrial illumination get extinguished at voltage sags of 20% and

industrial equipments like PLC and ASD malfunction at a voltage sag of 10%.

Voltage swell is basically opposite of voltage sag or dip. Voltage swell is a

temporary voltage level increase for durations from a half cycle to a few seconds,

typical magnitudes are between 1.1 and 1.8 p.u. These disturbances can also last as

long as several cycles. The common sources for swell are high-impedance neutral

connections, sudden large load reductions, and a single phase fault on a three phase

system. Swells can cause data errors, light flickering, electrical contact degradation,

and semiconductor damage in electronics causing hard server failures.

Various methods have been applied to reduce or mitigate voltage sags and

swell. The conventional methods can be used. However the PQ problems are not

solved completely due to uncontrollable reactive power compensation and high costs

of new feeders and UPS. Among the controllers, the Distribution Static

Compensator(DSTATCOM) and the Dynamic Voltage Restorer(DVR) are most

effective devices, both of them based on the Voltage Source Converter (VSC)

principle. A new PWM (Pulse Width Modulation) based control scheme has been

implemented to control the electronic valves in the two-level VSC used in the D-

STATCOM [28]. The D-STATCOM has emerged as a promising device to provide

not only for mitigation of voltage sag and swell but a host of other power quality

solutions such as voltage stabilization, flicker suppression, power factor correction

and harmonic control.

Thus, many techniques are used to mitigate voltage sag and swells, but the use

of a custom power device is considered to be the most efficient method. Like FlexibleAC Transmission Systems (FACTS) for transmission systems, the term custom power

pertains to the use of power electronics controllers in the distribution system,

especially, to deal with various power quality problems. Just as FACTS improves the

power transfer capabilities and stability margins, custom power makes sure customers

get pre-specified quality and reliability of supply [12]. The custom power devices

which are increasingly being used to reduce voltage sag and swell are mainly

Dynamic Voltage Restorer (DVR), Distributed Static Compensator (D-STATCOM)

and Solid State Transfer Switch (SSTS) [9]. However, there are many other problems


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that make the power quality worse, such as voltage harmonics, notch and the

distortion by nonlinear load currents [8].


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CHAPTER 2

Concept of voltage sag and swell

2.1. Voltage Sag

2.1.1 Defini tion

Voltage sag is defined as a sudden drop in the root mean square (R.M.S)

voltage and is usually characterized by the remaining (retained) voltage. Voltage sag

is thus, short duration reduction in RMS voltage, caused mainly by short circuits,

overloads and starting of large motors. In the IEEE standard 1159-1995, the term

sag is defined as decrease in RMS voltage or current to values to between 0.1 to 0.9

per unit for duration of 0.5 cycles to one minute [4].

Voltage sag is an important power quality problem as compared to harmonics,

flicker, EMI, noise etc. Loads can suffer detrimental effect from voltage sag resulting

in economic loss. The most severe sag is caused by faults in the power system at

transmission and distribution level. The characteristic of sag will depend on type and

location of fault in the system. Voltage sags are the most common power disturbance

whose effect is quite severe especially in industrial and large commercial customers

such as the damage of the sensitivity equipments and loss of daily productions and

finances. The examples of the sensitive equipments are Programmable Logic

Controller (PLC), Adjustable Speed Drive (ASD) and Chiller control. Voltage sag at

the equipment terminal can be due to a short circuit fault hundreds of kilo meters

away in the transmission system. Most of the current interest in voltage sag is directed

to voltage sag due to short circuit faults. These voltage sags are the ones which causes

majority of equipment tripping [5,6].

Based on the time duration and voltage magnitude, sag is further classified as:

a) Instantaneous Sag: Instantaneous sag is said to occur when the r.m.s voltage

decreases to between 0.1 and 0.9 per unit for time duration of 0.008333 second to

0.5 second.


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b) Momentary Sag: Momentary sag is said to occur when the r.m.s voltage

decreases to between 0.1 and 0.9 per unit for time duration of 0.5 second to 3

seconds.

c) Temporary Sag: Temporary sag is said to occur when the r.m.s voltage

decreases to between 0.1 and 0.9 per unit for time duration of 3 to 60 seconds.

2.1.2 Causes

2.1.2.1 Due to fau lts

Voltage sag due to fault can be critical to the operation of a power plant. The

magnitude of voltage sag can be equal in each phase or unequal respectively and it

depends on the nature of the fault whether it is symmetrical or unsymmetrical. For afault in the transmission line system, customers do not experience interruption, since

transmission systems are looped or networked.

2.1.2.2 Due to motor star ting

Voltage sag due to motor starting are symmetrical since the induction motors

are balanced three phase loads, which will be resulting in each of the phase drawing

approximately the same inrush current. The magnitude of voltage sag depends upon:

i) Characteristic of induction motor.

ii) Strength of the system node where motor is connected.

2.1.2.3 Due to Transformer Energizing

There are mainly two causes of voltage sag due to transformer energizing.

One is normal system operations which include manual energizing of a transformer

and another is the reclosing actions. These voltage sags are unsymmetrical in nature

and often depicted as a sudden drop in system voltage followed by a slow recovery.

The main reason behind voltage sag due to transformer energizing is the over fluxing

of the transformer core which leads to saturation.

2.1.3 Ef fects

Magnitude, duration and phase jumps are the fundamental properties of

voltage sags. These three parameters affect the performance of the customers


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equipment. Initially the consequence of voltage sag considered only the momentary

drop in voltage magnitude for a short duration of time. Magnitude simply indicates

the severity of voltage sag, which is subjected to the type of fault occurring in the

system. Duration indicates the measurement of time of the sag. This factor is

dependent on the effectiveness of the protection scheme employed by the utility. This

could range from few cycles to one minute. Consequently equipment and process

disruptions were the main implicated findings of the effect of voltage sag.

Phase jump occur due to the difference of X/R ratio of the source and that of

the faulted feeder. It is found that the effect of phase jump would lead to mal-

operation, tripping of the device or even permanent damage depending upon the type

of equipment. From these findings the perception of voltage sag changed. The damagethat voltage sag could cause is obviously critical. Many studies have been conducted

on voltage sag and the effect of phase jumps were found. The most related industrial

equipment that was investigated upon was the impacts and behaviour of the ASD.

Failures of Adjustable Speed Drives (ASDs) are not due to magnitude level of the

supply but rather the waveform anomalies, phase shifts or jumps. The adjustable

speed drives are the main driving force in a continuous process plant and this

possesses a serious problem. Hence, modern industries that adopt these sensitive loadsare venerable to little changes of supply.

2.1.4 Character istic

The characteristic of sag depends on type as well as location of fault in the

system. As the fault moves away from the point of interest its magnitude will vary.

Magnitude, duration, unbalance and phase angle jump are the main parameters used to

characterize voltage sag .

2.1.4.1 Magni tude of sag

One common practice is to characterize the sag magnitude through the

remaining voltage during the sag called as retained voltage. The magnitude of voltage

sag can be determined in a number of ways like one cycle or half cycle r.m.s voltage,

magnitude of fundamental component of voltage sag and peak voltage over each cycle

or half cycle. The sag magnitude increases for increasing distance to the fault and for

increasing fault level. It also depends upon cross section of overhead lines or cables as


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it affect the impedance of that line. Also, as the transformer have rather large

impedance, the presence of transformer between the faults and the point of interest

leads to relatively less sag magnitude.

2.1.4.2 Duration of sag

The duration of sag is mainly determined by the fault clearing time. Generally

faults in transmission system are cleared faster than faults in the distribution system,

which affect the duration of fault depending on its location in the system.

2.1.4.3 Unbalance of sag

Faults in power system are classified as symmetrical and unsymmetrical

faults. Voltage sag due to fault in the system can be symmetrical or unsymmetricaldepending on type of fault. Due to three phase fault, the sag will be symmetrical but

due to single phase, double phase or double phase to ground fault the voltage sag in

three phases will not be symmetrical and called as unbalanced sag.

2.1.4.4 Phase-Angl e jump

Phase angle jump manifest itself as a shift in zero crossing of the instantaneous

voltage during fault. Phase angle jump during three phase fault are due to the

differences in X/R ratio between source and the feeder. A second cause of phase angle

jump is the transformation of sags through transformer to lower voltage level. Phase

angle jump are not of concern for most equipments except for power electronics

converter using phase angle information for their firing instants.

2.1.5 Standards

Standards associated with voltage sags are intended to be used as reference

documents describing single components and system in a power system. Both the

manufacturers and the buyers use these standards to meet better power quality

requirement. Manufacturers develop products meeting the requirement of a standard

and buyers demand from the manufacturers that the product comply with the standard

[2]. The most common standards dealing with power quality are issued by IEEE, IEC,

CBEMA and SEMI.


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2.1.5.1 I EE E Standards

The Technical Committees of the IEEE societies and the standard coordinating

committees of IEEE Standards Board develop IEEE Standards. The IEEE standards

associated with voltage sags are given below [4].

(i) IEEE 493-1990 (Recommended Practice for the design of reliable industrial and

commercial power system): This standard proposes different techniques to predict

voltage sag characteristic, magnitude, duration and frequency.

(ii) IEEE 446-1995 (IEEE recommended practice for emergency and standby power

system for industrial and commercial application range of sensibility loads): This

standard discusses the effect of voltage sag on sensitive equipment, motor starting etc.It also shows principles and examples on how systems shall be designed to avoid

voltage sags and other power quality problems when backup system operates.

(iii) IEEE 1159-1995 (IEEE recommended practice for monitoring electric power

quality): The purpose of this standard is to describe how to interpret and monitor

electromagnetic phenomena properly. It provides unique definitions for each type of

disturbance.

(iv) IEEE 1250-1995 (IEEE guide for service to equipment sensitive to momentary

voltage disturbances): This standard describes the effect of voltage sags on computers

and sensitive equipment using solid state power conversion. It also aims to suggest

methods for voltage sag sensitive devices to operate safely during disturbances. It

tries to categorize the voltage related problems that can be fixed by the utility and

those which have to be addressed by the user or equipment designer. The second goal

is to help designers of equipment to better understand the environment in which their

devices will operate. The standard explains different causes of sags, lists of examples

of sensitive loads and offer solution to the problems.

(v) IEEE 1100-1999 (IEEE recommended practice for powering and grounding of

electronic equipment): This standard presents different monitoring criteria for voltage

sags and has a chapter explaining the basics of voltage sags.


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2.1.5.2 I ndustry Standards

SEMI: The SEMI International Standards Program is a service offered by

Semiconductor Equipment and Materials International (SEMI). Its purpose is to

provide the semiconductor and flat panel display industries with standards andrecommendations to improve productivity and business. SEMI standards are written

documents in the form of specifications, guides, test methods, terminology and

practices. The standards are voluntary technical agreement between equipment

manufacturer and end user. The standards ensure compatibility and operability of

goods and services considering voltage sags [6].

(i) SEMI F47-02000 (Specification for semiconductor processing equipment voltage

sag immunity): The standard addresses specifications for semiconductor processing

equipment voltage sag immunity. It only specifies voltage sags with duration from

50ms up to 1s. It is also limited to phase to phase and phase to neutral voltage

incidents.

(ii) SEMI F42-0999 (Test method for semiconductor processing, equipment voltage

sag immunity): This standard defines test methodology used to determine the

susceptibility of semiconductor processing equipment and again how to qualify it

against the specifications. It further describes test apparatus, test setup, test procedure

to determine the susceptibility of semiconductor processing equipment and finally

how to report and interpret the results.

2.1.6 M itigation Techniques

There are many ways to mitigate voltage sag problem. One of them is minimizing

of short circuits caused by utilities directly which can be done by avoiding feeder orcable overloading by correct configuration planning. Another alternative is using the

flexible ac technology (FACTS) devices which have been used widely in power

system nowadays because of the reliability to maintain power quality condition

including voltage sag mitigation. There are many devices that have been created with

the purpose to enhance power quality such as Dynamic Voltage Restorer (DVR),

Distribution Static Compensator (D-STATCOM) and Uninterruptible Power Supply

(UPS). All of these devices are also known as custom power devices.


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Various solutions were proposed and developed by researchers to overcome the

problem of voltage sag. Three main organizations are responsible for tackling and

resolving voltage sags. These are utilities, customers and equipment manufacturers. It

was identified that fault prevention and faster fault clearing in the utility level was an

important aspect in reducing voltage sags. Utilities should design changes in the

power system that could reduce the number of faults and fault clearing time. However

it was stressed that it is impossible to eliminate voltage sag due to faults completely.

Meanwhile traditional solutions such as the Uninterruptable Power Supply (ups) and

other power conditioning equipment for low power factor loads could reduce the

effect of shutdown.

The Dynamic Voltage Restorer (DVR) is an inverter based solution developedrecently by various engineering corporations. The DVR has a reaction time of within

of a cycle and thus making it an attractive mitigation measure. Basically the DVR

is connected in series with critical load. The DVR is capable of injecting voltages of

controllable amplitude, phase angle and frequency into the distribution feeder

experiencing voltage sag. In addition to Dynamic Voltage Restorer, Distribution

Static Compensator (DSTATCOM) and Solid State Transfer Switch (SSTS) have

been developed as mitigation devices to reduce effect of voltage sag.

2.1.7 Simulation Techniques applied for M iti gation

There are various methodologies adopted and developed by researchers

throughout the study of voltage sags. These methodologies are generally classified

into three areas which are real time monitoring, modeling and simulation packages

and the use of mathematical principles and electrical fundamentals.

Various software packages are available which are extremely effective in

predicting and analyzing voltage sag studies. Almost all voltage sag related studies by

researchers are based on simulation packages. Studies using simulation tool were

mainly related with prediction of voltage sag, mitigation studies and understanding of

the characteristic of the voltage sag. Nowadays PSCAD/EMTDC software is widely

used to simulate and analyze the various mitigation techniques. Power System

Computer Aided Design was first conceptualized in 1988 and began its evolution as a

tool to generate data files for the Electromagnetic Transient Program with DC


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analysis (EMTDC) simulation program. PSCAD is a powerful and flexible graphical

user interface to the world renowned EMTDC solution engine. PSCAD enables the

user to schematically construct a circuit, run a simulation analyze the result and

manage the data in a completely integrated, graphical environment.

2.2. Voltage Swell

2.2.1. Defini tion

Voltage Swell is defined by IEEE 1159 as the increase in the RMS voltage level

to 110% - 180% of nominal, at the power frequency for durations of cycle to one

(1) minute. It is classified as a short duration voltage variation phenomena, which is

one of the general categories of power quality problems [31] .

Voltage Swell

2.2.2 Categories

Voltage swells are characterized by their RMS magnitude and duration. The gravity

of the PQ problem during a fault condition is a function of the system impedance

(i.e. relation of the zero-sequence impedance to the positive-sequence impedance of

the system), location of the fault and the circuit grounding configuration. As an

example, on an ungrounded system, the line-to-ground voltages on the unfaulted

Voltage Swell Categories
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phases can go as high as 1.73 p.u. during a Single L-G fault. On the contrary, on a

grounded system close to the substation, there will be no voltage rise on the unfaulted

phases because the substation transformer is usually connected delta-wye, providing a

low impedance zero-sequence path for the fault current [31].

2.2.3 Terminol ogy Used

The term " momentary overvoltage " is used as a synonym for the term swell.

According to IEEE 1159-1995, voltage swell magnitude is to be described by its

remaining voltage, in this case, always greater than 1.0 p. u. For example, a swell to

150% means that the line voltage is amplified to 150% of the normal value [29].

2.2.4 CausesVoltage swells are usually associated with system fault conditions - just like

voltage sags but are much less common. This is particularly true for ungrounded or

floating delta systems, where the sudden change in ground reference result in a

voltage rise on the ungrounded phases. In the case of a voltage swell due to a single

line-to-ground (SLG) fault on the system, the result is a temporary voltage rise on the

unfaulted phases, which last for the duration of the fault[32,33]. This is shown in the

figure 2.2.4.

Fig. 2.2.4: Voltage Swell due to SLG fault

Voltage swells can also be caused by the de energization of a very large load. The

abrupt interruption of current can generate a large voltage, per the formula: V = L

di/dt, where L is the inductance of the line and di/dt is the change in current flow.

Instantaneous Voltage Swell Due to SLG fault


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15

Moreover, the energization of a large capacitor bank can also cause a voltage swell,

though it more often causes a oscillatory transient.

2.2.5 Ef fects

Although the effects of a sag are more noticeable, the effects of a voltage swell

are often more destructive. It may cause breakdown of components on the power

supplies of the equipment, though the effect may be a gradual, accumulative effect. It

can cause control problems and hardware failure in the equipment, due to

overheating that could eventually result to shutdown. Also, electronics and other

sensitive equipment are prone to damage due to voltage swell [32,33].

2.2.6 M itigation Techniques There are many ways to mitigate voltage swell problem. One of them is using

the flexible ac technology (FACTS) devices which have been used widely in power

system nowadays because of the reliability to maintain power quality condition

including voltage swell mitigation. There are many devices that have been created

with the purpose to enhance power quality such as Dynamic Voltage Restorer (DVR),

Distribution Static Compensator (D-STATCOM), Voltage Regulators and

Uninterruptible Power Supply (UPS). All of these devices are also known as custom

power devices.

2.2.7 Simulation Techniques applied for M iti gation

There are various methodologies adopted and developed by researchers

throughout the study of voltage swells. These methodologies are generally classified

into three areas which are real time monitoring, modeling and simulation packages

and the use of mathematical principles and electrical fundamentals [30].

Various software packages are available which are extremely effective in

predicting and analyzing voltage swell studies. Almost all voltage swell related

studies by researchers are based on simulation packages. Studies using simulation tool

were mainly related with prediction of voltage swell, mitigation studies and

understanding of the characteristic of the voltage swell. Nowadays PSCAD/EMTDC

software is widely used to simulate and analyze the various mitigation techniques.

Power System Computer Aided Design was first conceptualized in 1988 and began its


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16

evolution as a tool to generate data files for the Electromagnetic Transient Program

with DC analysis (EMTDC) simulation program. PSCAD is a powerful and flexible

graphical user interface to the world renowned EMTDC solution engine. PSCAD

enables the user to schematically construct a circuit, run a simulation analyze the

result and manage the data in a completely integrated, graphical environment.


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CHAPTER 3

THEORY of D statcom

3.1 Distr ibution static compensator

Distribution Static Compensator (D-STATCOM) also known as shunt voltage

controller consists of a two level voltage source converter (VSC), a dc energy storage

device, a coupling transformer connected in shunt to the distribution network and

associated control circuit [9,10] as shown in the fig below. The VSC converts the dc

voltage across the storage device into a set of three phase ac output voltages. These

voltages are in phase and coupled with the ac system through the reactance of thecoupling transformer. Suitable adjustment of the phase and magnitude of the D-

STATCOM output voltages allow effective control of active and reactive power

exchanges between the D-STATCOM and ac system. Such configuration allows the

device to absorb or generate controllable active and reactive power.

Fig. 3.1(a): Schematic diagram of D-STATCOM

The VSC connected in shunt with the ac system provides a multifunctional

topology which can be used for up to three quite distinct purposes.

a) Correction of power factor.

b) Voltage regulation and compensation of reactive power.

c) Elimination of current harmonics.


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The DC voltage across the storage device will be converted by VSC into a set of

three phase AC output voltages. Several adjustments have to be made to the phase and

magnitude of the D-STATCOM output voltage in order for the active and reactive

power exchanges between the AC system and the device controlled effectively.

3.1.1 Basic Conf igurati on and Operation of D-STATCOMThe DSTATCOM is a three phases, shunt connected power electronic based

device. It is connected near the load at the distribution system. The major components

of D-STATCOM is shown in the fig. 3.1.1(a) below

Fig. 3.1.1(a): Basic building blocks of D-STATCOM.

It consists of a dc capacitor, three phase inverter usually a GTO or an IGBT, ac

filter (coupling transformer) and a control strategy. The basic electronic block of the

D-STATCOM is the voltage sourced inverter that converts input dc voltage into a

three phase output voltage at fundamental frequency.

The D-STATCOM employs an inverter to convert the dc link voltage V dc on thecapacitor to a voltage source of adjustable magnitude and phase. Therefore the

D-STATCOM can be treated as a voltage controlled source. The D-STATCOM can

also be seen as a current controlled source.

Fig. 3.1.1(a) above shows the inductance L and resistance R which represents the

equivalent circuit elements of the step down transformer and the inverter are the main

components of D-STATCOM. The reactive power output of D-STATCOM can be

either inductive or capacitive depending on the operation mode of D-STATCOM.


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Referring to the Fig. 3.1.1(a) above the controller of D-STATCOM is used to

operate the inverter in such a way that the phase angle between the inverter voltage

and the line voltage is dynamically adjusted so that the D-STATCOM generates or

absorb the desired VAR at the point of connection. The phase of the output voltage of

the thyristor based inverter V i is controlled in the same way as the distribution system

voltage V s.

Here, as we can see from the figure 3.1.1(b) below, the shunt injected current I sh

corrects the voltage sag by adjusting the voltage drop across the system impedance

X th.

Figure 3.1.1(b) Working principle of D-STATCOM

The value of the shunt current I sh can be controlled by adjusting the output

voltage of the converter. The shunt injected current I sh can be written as:

Ish = I L Ii (3.1)

Ish th

L

th

th L

Z

V

Z

V I )(

(3.2)

The complex power injection of the D-STATCOM can be expressed as

Ssh = VL Ish* (3.3)


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Here, the effectiveness of the D-STATCOM in correcting voltage sag depends

upon the value of Z th or fault level of the load bus. When the shunt injected current I sh

is kept in quadrature with V L, the desired voltage correction is achieved without

injecting any active power into the system. On the other hand when the value of I sh is

minimized the same voltage correction can be achieved with minimum apparent

power into the system.

3.1.2 Operating modes of D -STATCOM

Figure below shows the three basic operation modes of the D-STATCOM

output current I, which varies depending upon V i. If V i is equal to V s, the reactive

power is zero and the D-STATCOM does not generate or absorb reactive power.

When V i is greater than V s, the D-STATCOM shows an inductive reactance

connected at its terminal. The current I flows through the transformer reactance from

the D-STATCOM to the ac system and the device generate capacitive reactive power.

If V s is greater V i, the D-STATCOM shows the system as a capacitive reactance, then

the current flows from ac system to the D-STATCOM resulting in the device

absorbing inductive reactive power.

Fig. 3.1.2(a): Operating modes of D-STATCOM


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CHAPTER 4

MODELING OF TEST SYSTEM AND

CONTROLLERS FOR SYSTEM SIMULATION

4.1 Test Systems

4.1.1 Test System-1 for Simulation

A

B

C

R=0 0.1 [ohm]

0.1 [ohm]

0.1[ohm]

0.758 [H]

0.758 [H]

12.1 [ohm]

12.1 [ohm]

12.1 [ohm]

0.1926 [H]

0.1926 [H]

0.1926 [H]

A

B

C

A

B

C11.0 [kV]

#2#1

230.0 [kV]

100.0 [MVA]0.758 [H]

MAIN FEEDER LOAD

Fig. 4.1.1: The test system implemented in PSCAD/EMTDC

Fig. 4.1.1 above depicts the Test System-1 implemented in PSCAD/EMTDC to

carry out the simulations for the aforementioned mitigation technique. The test system

comprises of a 230 KV, 50 Hertz transmission system, represented in Thevenins

equivalent, feeding into the primary side of a two winding transformer. The load is

connected to the 11 KV of secondary side of the transformer. Considering this system

to be unchanged and for the accommodation of control technique additional isolation

transformer is used at the secondary side between two winding transformer and the

load.

4.1.2 Test System-2 for Simulation

A

B

C

R=0 0.1 [ohm]

0.1 [ohm]

0.1[ohm]

0.758 [H]

0.758 [H]

0.758 [H]

A

B

C

A

B

C

A B C

100.0 [MVA]

230.0 [kV] 11 [kV] 11 [kV]

#1 #3

12.1 [ohm]

12.1 [ohm]

12.1 [ohm]

0.1926 [H]

0.1926 [H]

0.1926 [H]

MAIN FEEDER LOAD

Fig. 4.1.2: The test system implemented in PSCAD/EMTDC


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Fig. 4.1.2 above depicts the Test System-2 implemented in PSCAD/EMTDC to

carry out the simulations for the aforementioned mitigation technique. A three

winding transformer is used to replace the two winding transformer to accommodate

the implantation of the two-level VSC based D-STATCOM and it will be connected

in the tertiary winding of the transformer to provide instantaneous voltage support at

the load point. The transformer employs a leakage reactance of 10% or 0.1 per unit

with a unity turn ratio and no booster capabilities exist.

4.2 Sinusoidal PWM based Contr ol Scheme

A sinusoidal PWM based control scheme is implemented, with reference to the D-

STATCOM in order to mitigate the voltage sags and swells in power system. The aim

of the control scheme is to maintain a constant voltage magnitude at the point where

sensitive load is connected under the system disturbance.

The control system only measures the r.m.s voltage at the load point, no reactive

power measurement is required. The VSC switching strategy associated with

D-STATCOM is based on a sinusoidal PWM technique which offers simplicity and

good response. Since custom power is a relatively low power application, PWM

methods offer a more flexible option than the fundamental frequency switching (FFS)methods favoured in FACTS applications. Besides, high switching frequencies can be

used to improve the efficiency of the converter, without incurring significant

switching losses.

4.2.1 Sinusoidal PWM based Control

As seen from Fig.4.2 below the controller input is an error signal obtained from

the reference voltage and r.m.s value of the terminal voltage measured. Such error is

processed by PI controller (proportional-integral-controller) and the output is angle

delta, which is then provided to the PWM (pulse width modulated) signal generator.

Thus, briefly we can say that an error signal is obtained by comparing reference

voltage with the r.m.s voltage measured, the PI controller process the error signal,

generates the required angle to drive the error to zero that is load r.m.s voltage is

brought back to reference voltage.


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The sinusoidal signal voltage is phase modulated by means of angle delta and this

modulated signal is compared against a triangular signal in order to generate

switching signals for VSC valves. The main parameters of sinusoidal PWM scheme

are amplitude modulation index and frequency modulation index of the triangular

signal. The amplitude modulation index is kept fixed at 1 p.u. in order to obtain the

highest fundamental voltage component at the controller output. The modulating

angle is applied to PWM generator in phase A. The angle for phase B and phase C are

shifted by 240 degree and 120 degree respectively. The control implementation is

kept very simple in Fig. 4.2 by using only voltage measurements as feedback variable

in the control scheme.

Fig. 4.2: Control scheme for the Test Systems implemented in PSCAD/EMTDC to

carry out the D-STATCOM simulations.


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4.3 Test Systems wi thout Contr oller for Voltage Sag

A

B

C

R=0 0.1 [ohm]

0.1 [ohm]

0.1[ohm]

0.758 [H]

0.758 [H]

0.758 [H]

A

B

C

3 P

h a s e

R

M S

Vrms

Vrms

12.1 [ohm]

12.1 [ohm]

12.1 [ohm]

0.1926 [H]

0.1926 [H]

0.1926 [H]

TimedBreaker Logic

Open@t0BRK C B A

B R K

A

B

C

A

B

C11.0 [kV]

#2#1

230.0 [kV]

100 .0 [MVA]

0 . 0

0 5 [ o h m

]

0 . 8

9 [ H ]

0 . 0

0 5 [ o h m

]

0 . 8

9 [ H ]

0 . 0

0 5 [ o h m

]

0 . 8

9 [ H ]

MAIN FEEDER LOAD

Fig. 4.3(a): The test system without controller implemented in PSCAD/EMTDC.

Fig. 4.3(a) above depicts the Test System without controller implemented in

PSCAD/EMTDC to carry out the simulations for the aforementioned mitigation

techniques. The test system comprises of a 230 KV, 50 Hertz transmission system,

represented in Thevenins equivalent, feeding into the primary side of a two winding

transformer. The load comprising of resistance 12.1[ohm] and 0.1926[H] is connected

to the 11 KV of the secondary side of the transformer. R-L load having 0.005[ohm]and 0.89[H] is connected through a 3 phase breaker to the 230 kv of the primary side

of the transformer. The breaker is operated for 0.2 sec i.e., it is initially opened and

closed from 0.3 to 0.5 sec. The transformer employs a leakage reactance of 10% or

0.1 per unit with a unity turn ratio and no booster capabilities exist.


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A

B

C

R=0 0.1 [ohm]

0.1 [ohm]

0.1[ohm]

0.758 [H]

0.758 [H]

0.758 [H]

12.1 [ohm]

12.1 [ohm]

12.1 [ohm]

0.1926 [H]

0.1926 [H]

0.1926 [H]

A

B

C

A

B

C

A B C

100.0 [MVA]

230.0 [kV] 11 [kV] 11 [kV]

#1 #3

FAULTS C

B

A

TimedFaultLogic

Vrms

A

B

C

3 P h a s e

R M S

Vrms

Main : Contr...

10987654321

fault condition

1

MAIN FEEDER LOAD

Fig. 4.3(b): The test system without controller using three winding transformer

implemented in PSCAD/EMTDC.

Fig. 4.3(b) above depicts the Test System without controller using three winding

transformer implemented in PSCAD/EMTDC to carry out the simulations for the

aforementioned mitigation techniques. The test system comprises of a 230 KV, 50

Hertz transmission system, represented in Thevenins equivalent, feeding into the

primary side of a two winding transformer. The load comprising of resistance

12.1[ohm] and 0.1926[H] is connected to the 11 KV of the secondary side of the

transformer. A three winding transformer is used to replace the two winding

transformer to accommodate the implantation of the two-level VSC based D-

STATCOM and it will be connected in the tertiary winding of the transformer to

provide instantaneous voltage support at the load point. Fault is applicable to the

secondary side of the transformer. Fault consideration is from 0.3 sec and for a

duration of 0.1 sec. A typical single line to ground fault is simulated. The transformer

employs a leakage reactance of 10% or 0.1 per unit with a unity turn ratio and no

booster capabilities exist.


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4.4 Test Systems wi thout Controll er for Vol tage Swell

A

B

C

R=0 0.1 [ohm]

0.1 [ohm]

0.1[ohm]

0.758 [H]

0.758 [H]

0.758 [H]

A

B

C

3 P h a s e

R M S

Vrms

Vrms

12.1 [ohm]

12.1 [ohm]

12.1 [ohm]

0.1926 [H]

0.1926 [H]

0.1926 [H]

TimedBreaker

LogicOpen@t0BRK

3 [ u F ]

3 [ u F ]

3 [ u F ]

C B A B R K

A

B

C

A

B

C11.0 [kV]

#2#1

230.0 [kV]

100.0 [MVA]

MAIN FEEDER LOAD

Fig. 4.4(a): The test system without controller implemented in PSCAD/EMTDC.

Fig. 4.4(a) above depicts the Test System without controller implemented in

PSCAD/EMTDC to carry out the simulations for the aforementioned mitigation

techniques. The test system comprises of a 230 KV, 50 Hertz transmission system,

represented in Thevenins equivalent, feeding into the primary side of a two winding

transformer. The load comprising of resistance 12.1[ohm] and 0.1926[H] is connected

to the 11 KV of the secondary side of the transformer. A capacitive load of 3[F] is

connected through a 3 phase breaker to the 230 kv of the primary side of the

transformer. The 3 phase breaker is initially opened and then closed for duration of

0.1 sec ie., breaker remains closed from 0.3 to 0.4 sec. The transformer employs a

leakage reactance of 10% or 0.1 per unit with a unity turn ratio and no booster

capabilities exist.


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A

B

C

R=0 0.1 [ohm]

0.1 [ohm]

0.1[ohm]

0.758 [H]

0.758 [H]

0.758 [H]

12.1 [ohm]

12.1 [ohm]

12.1 [ohm]

0.1926 [H]

0.1926 [H]

0.1926 [H]

A

B

C

A

B

C

A B C

100 .0 [MVA]

23 0.0 [kV] 11 [kV] 11 [kV]

#1 #3

Vrms

A

B

C

3 P h a s e

R M S

Vrms

TimedBreaker

LogicOpen@t0BRK

3 [ u F ]

3 [ u F ]

3 [ u F ]

C B A B R K

MAIN FEEDER LOAD

Fig. 4.4(b): The test system without controller using three winding transformer in

PSCAD/EMTDC.

Fig. 4.4(b) above depicts the Test System without controller using three winding

transformer implemented in PSCAD/EMTDC to carry out the simulations for the

aforementioned mitigation techniques. The test system comprises of a 230 KV, 50

Hertz transmission sy stem, represented in Thevenins equivalent, feeding into the

primary side of a two winding transformer. The load comprising of resistance12.1[ohm] and 0.1926[H] is connected to the 11 KV of the secondary side of the

transformer. A three winding transformer is used to replace the two winding

transformer to accommodate the implantation of the two-level VSC based D-

STATCOM and it will be connected in the tertiary winding of the transformer to

provide instantaneous voltage support at the load point. A capacitive load of 3[F] is

connected through a 3 phase breaker to the 230 kv of the primary side of the

transformer. The 3 phase breaker is initially opened and then closed for duration of0.1 sec ie., breaker remains closed from 0.3 to 0.4 sec. The transformer employs a

leakage reactance of 10% or 0.1 per unit with a unity turn ratio and no booster

capabilities exist.


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4.5 M odelin g Of Di str ibuti on Static Compensator with the

Test System-1

The schematic diagram of D-STATCOM employed along with the Test System-

1 is shown in Chapter-3 (Fig. 3.1(a)). A two-level VSC based D-STATCOM is

connected to the 11KV secondary winding to provide instantenous voltage support at

the load point. A 750 microfarad capacitor on the dc side provides the D-STATCOM

energy storage capabilities.

The transformer of the test system has been modelled as two winding transformer

to accommodate D-STATCOM an additional isolation transformer is accomodated.

Fig.4.5(a) shows the modelling of the D-STATCOM in PSCAD/EMTDC which has

the two level voltage source converter.

Fig.4.5(b) and Fig.4.5(c) below shows the realization of the test system with D-

STATCOM in PSCAD. The test system comprises a 230 kV transmission system,

represented by a Thevenins eq uivalent, feeding into the primary side of a two

winding transformer. A varying load is connected to 11 KV, secondary side of the

transformer. Here, the simulation of the test system with D-STATCOM acting as a

mitagation device and observing the extent of compensation provided in terms of

recovery of the rms voltage in case of the fault for voltage sag and capacitor bank for

voltage swell.

Fig. 4.5(a): Switching diagram of D-STATCOM


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29

4.5.1 Simul ation for Voltage Sag

A B C

R = 0

0 . 1 [ o h m ]

0 . 1 [ o h m ]

0 . 1 [ o h m

]

0 . 7 5 8 [ H ]

0 . 7 5 8 [ H ]

0 . 7 5 8 [ H ]

A B C 3 P h a s e

R M SVrms

V r m s

1 2 . 1

[ o h m ]

1 2 . 1

[ o h m ]

1 2 . 1

[ o h m ]

0 . 1 9 2 6 [ H ]

0 . 1 9 2 6 [ H ]

0 . 1 9 2 6 [ H ]

T i m e d

B r e a k e r

L o g i c

O p e n @

t 0

B R K 2

C

B

A

B R K 2

1

D

+ F -

* c o m p

I P

*

- 1

d e l t a

T I M E

0 . 1

A B C o m p a r -

a t o r

C o m p

1 . 0

m a

5 0

f r e q

d e l t a

A B C o m p a r -

a t o r

A B C o m p a r -

a t o r

C T R B

G a p

G a n

G b n

G b p

P h a s e

F r e q

M a g

S i n

m a

D +

F

+ d e l

t a

- 1 2 0

f r e q

P h a s e

F r e q

M a g

S i n

m a

C T R A

f r e q

G c p

G c n

- 2 4 0

A B C o m p a r -

a t o r

P h a s e

F r e q

M a g

S i n

m a

D +

F

+ f r e

q C T R C

d e l t a

A

B

C

A

B

C11.0 [kV]

#2#1

11.0 [kV]

100.0 [MVA]

R=0

7 5 0 . 0 [ u F ]

G a n

G a p

G b n

G b p

G c p

G c n

E c

A B C

A B C

1 1 . 0

[ k V ] # 2

# 1 2 3 0 . 0 [ k V ]

1 0 0 . 0 [ M V A ]

0.005[ohm] 0.89 [H]

0 .0 05 [o hm ] 0 .8 9 [H ]

0 .0 05 [o hm ] 0 .8 9 [H ]

A C N E T W O R K

L O A D

D S T A T C O M

C O N T R O L

S Y S T E M

S I N P W M

G E N E R A T O R

Fig. 4.5(b): Modeling Test System-1 for voltage sag with D-STATCOM connected tothe system.


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4.5.2 Simulation for Voltage Swell

A B C R = 0

0 . 1 [ o h m

]

0 . 1 [ o h m

]

0 . 1 [ o h m ]

0 . 7 5 8 [ H ]

0 . 7 5 8 [ H ]

0 . 7 5 8 [ H ]

A B C 3 P h a s e

R M S V r m s

V r m s

1 2 . 1

[ o h m ]

1 2 . 1

[ o h m ]

1 2 . 1

[ o h m ]

0 . 1 9 2 6 [ H ]

0 . 1 9 2 6 [ H ]

0 . 1 9 2 6 [ H ]

T i m e d

B r e a k e r

L o g i c

O p e n @

t 0

B R K 2

3[uF]

3[uF]

3 [uF]

C

B

A

B R K 2

1

D +

F -

* c o m p

I P

*

- 1

d e l t a

T I M E

0 . 1

A B C o m p a r -

a t o r

C o m p

1 . 0

m a

5 0

f r e q

d e l t a

A B C o m p a r -

a t o r

A B C o m p a r -

a t o r

C T R B

G a p

G a n

G b n

G b p

P h a s e

F r e q

M a g

S i n

m a

D +

F

+ d e l

t a

- 1 2 0

f r e q

P h a s e

F r e q

M a g

S i n

m a

C T R A

f r e q

G c p

G c n

- 2 4 0

A B C o m p a r -

a t o r

P h a s e

F r e q

M a g

S i n

m a

D +

F

+ f r e

q C T R C

d e l t a

A

B

C

A

B

C11.0 [kV]

#2#1

11.0 [kV]

100.0 [MVA]

R=0

7 5 0 . 0 [ u F ]

G a n

G a p

G b n

G b p

G c p

G c n

E c

A B C

A B C

1 1 . 0

[ k V ] # 2

# 1 2 3 0 . 0 [ k V ]

1 0 0 . 0 [ M V A ]

A C N E T W O R K

C O N T R O L

S Y S T E M

S I N P W M

G E N E R A T O R

D S T A T C O M

Fig. 4.5(c): Modeling Test System-1 for voltage swell with D-STATCOM connectedto the system.


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4.6 M odelin g Of Di str ibuti on Static Compensator with the

Test System-2

The schematic diagram of D-STATCOM employed along with the Test System-2

is shown in Chapter-3 (Fig. 3.3(b)). A two-level VSC based D-STATCOM is

connected to the 11KV tertiary winding to provide instantenous voltage support at the

load point. A 750 microfarad capacitor on the dc side provides the D-STATCOM

energy storage capabilities.

Fig. 4.6(a): Switching diagram of D-STATCOM

The transformer of the test system has been modelled as three winding

transformer to accommodate D-STATCOM. The purpose of including the transformer

is to protect and provide isolation between the IGBT legs. This prevent the dc storage

capacitor from being shorted through switches in different IGBT. Fig.3.4(a) shows the

modelling of the D-STATCOM in PSCAD/EMTDC which has the two level voltage

source converter.

Fig. 4.6(b) and Fig. 4.6(c) below shows the realization of the test system with D-

STATCOM in PSCAD. The test system comprises a 230 kV transmission system,

represented by a Thevenins equivalent, feeding into the primary side of a three

winding transformer. A varying load is connected to 11 KV, secondary side of the

transformer. In voltage sag condition, sudden drop in the rms voltage at the load

terminal can be observed. In voltage swell condition, sudden rise in the rms voltage at

the load terminal can be observed. A single line to ground fault is applied for

analyzing voltage sag and a capacitor bank is applied to analyze voltage swell.


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4.6.1 Simulation for Voltage Sag

A B C R = 0

0 . 1 [ o h m ]

0 . 1 [ o h m ]

0 . 1 [ o h m

]

0 . 7 5 8 [ H ]

0 . 7 5 8 [ H ]

0 . 7 5 8 [ H ]

A B C

A B C

A

B

C

1 0 0 . 0 [ M V A ]

2 3 0 . 0 [ k V ] 1 1 [ k V ]

1 1 [ k V ]

# 1

# 3

3 P h a s e R M S

D

+ F -

1 V r e f

* c o m p

I P

*

1

d e l t a

1

m a

A B C o m p a r -

a t o r

P h a s e

F r e q

M a g

S i n

A B C o m p a r -

a t o r

A B C o m p a r -

a t o r

P h a s e

F r e q

M a g

S i n

m a

m a

d e l t a

O m

A

D +

F

+ d e l

t a

- 1 2 0

P h a s e

F r e q

M a g

S i n

m a

D +

F

+ d e l

t a

1 2 0

5 0

5 0

5 0

G A

G B

G C

G A N

G B N

G C N

R = 0

750.0 [uF]

D D

D D

D D

G A N G

A

G B N G

B

G C

G C N

V r m s

V r m s

1 2 . 1

[ o h m ]

1 2 . 1

[ o h m ]

1 2 . 1

[ o h m ]

T I M E

0 . 1

A B C o m p a r -

a t o r

C o m p

0 . 1 9 2 6 [ H ]

0 . 1 9 2 6 [ H ]

0 . 1 9 2 6 [ H ]

A B C

D S T A T C O M

C O N T R O L

S Y S T E M

S I N P W M

G E N E R A T O R S

F A U L T S

C B A

T i m e d

F a u l

t

L o g i c

A C N E T W O R K

M a i n : C o n

t r . . .

1 0 9 8 76 54 3 2 1

f a u l

t c o n d

i t i o n

1

L O A D

Fig. 4.6(b): Modeling Test System-2 for voltage sag with D-STATCOM connected to

the system.


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4.6.2 Simul ation for Voltage Swell

A B C R = 0

0 . 1 [ o h m ]

0 . 1 [ o h m ]

0 . 1 [ o h m

]

0 . 7 5 8 [ H ]

0 . 7 5 8 [ H ]

0 . 7 5 8 [ H ]

A B C

A B C

A

B

C

1 0 0 . 0 [ M V A ]

2 3 0 . 0 [ k V ] 1 1 [ k V ]

1 1 [ k V ]

# 1

# 3

3 P h a s e R M S

D +

F -

1 V r e f

* c o m p

I P

*

1

d e l t a

1

m a

A B C o m p a r -

a t o r

P h a s e

F r e q

M a g

S i n

A B C o m p a r -

a t o r

A B C o m p a r -

a t o r

P h a s e

F r e q

M a g

S i n

m a

m a

d e l t a

O m

A

D +

F

+ d e l t a

- 1 2 0

P h a s e

F r e q

M a g

S i n

m a

D +

F

+ d e l t a

1 2 0

5 0

5 0

5 0

G A

G B

G C

G A N

G B N

G C

R = 0

750.0 [uF]

D D

D D

D D

G A N G

A

G B N

G B

G C

G C N

V r m s V r

m s

1 2 . 1

[ o h m ]

1 2 . 1

[ o h m ]

1 2 . 1

[ o h m ]

T I M E

0 . 1

A B C o m p a r -

a t o r

C o m p

0 . 1 9 2 6 [ H ]

0 . 1 9 2 6 [ H ]

0 . 1 9 2 6 [ H ]

A B C

T i m e d

B r e a k e r

L o g i c

O p e n @

t 0

B R K

3 [ u F ]

3 [ u F ]

3 [ u F ] C

B

A

B R K

Fig. 4.6(c): Modeling Test System-2 for voltage swell with D-STATCOM connectedto the system.


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CHAPTER 5

SYSTEM SIMULATION AND DISCUSSION

This chapter describes different types of simulation in the two test systems

described in Chapter-4. Different mitigation techniques for voltage sag and swell have

also been realized and the observations have been discussed. The simulations are

carried out considering two types of test systems and different types of fault causing

voltage sag and swell. The simulations are individually shown for both voltage sag

and swell.

Here, the simulation consist of two parts for voltage sag and swell individually

which have been run separately. The first part involves simulating the two test

systems on different types of faults due to different type of considerations as

mentioned above without using controller. The second part involves simulating the

mitigation techniques with the two test systems (using controllers) so that the

technique can be assessed on their performance in mitigating voltage sag and swell

individually for the all cases considered.

5.1 Voltage Sag

5.1.1 Without Controll ers

5.1.1.1 Closing of the RL load in Test System-1

Using a 3 phase breaker, an RL load having resistance 0.005[ohm] and inductance

0.89[H] is connected to the 230 kv primary side of transformer and has been closed

for a particular duration . Fig. 5.1.1.1(a) shows that the phase voltages of the system is

in fault condition after RL load has been closed for a particular duration in Test

system-1. Fig. 5.1.1.1(b) shows that the rms voltage drops to 0.538p.u . with respect

to the reference voltage.


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Fig. 5.1.1.1(a): Phase voltages due to closing of the RL load.

Fig. 5.1.1.1(b): R.M.S voltage at the load terminal due to closing of the RL load.

Here we have closed RL load for a duration of 0.1 sec and the simulation is

carried out for a period of 300-400 ms. Fig. 5.1.1.1(c) and Fig. 5.1.1.1(d) show the

profiles of phase voltages and rms voltage at load end for closing of the RL load with

longer time duration. The time duration chosen here is 0.3 sec and the simulation is

carried out for a period of 300-600 ms.


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Fig. 5.1.1.1(c): Phase voltages due to closing of the RL load

( with longer time duration ).

Fig. 5.1.1.1(d): R.M.S voltage at the load terminal due to closing of the RL load



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Simulations in case of phase B and phase C reveal the same observation which is

obvious. Fig. 5.1.1.2(c) and Fig. 5.1.1.2(d) show the profiles of phase voltages and

rms voltage at load end for phase A to ground fault with higher fault duration. Here,

we have applied the fault for a duration of 0.3 sec. The simulation is carried out for a

period of 300-600 ms.

Fig. 5.1.1.2(c): Phase voltages for line A to ground fault (with higher fault duration).

Fig. 5.1.1.2(d): R.M.S voltage at the load terminal for phase A to ground fault

(with higher fault duration).


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5.1.2 With Controll ers

5.1.2.1 Closing of the RL L oad in Test System-1

Compensated voltage sag due to closing of the RL load using DSTATCOM in

Test system-1 is shown accordingly in Fig. 5.1.2.1(a). D-STATCOM manages to

maintain a recovery rate at 94%. Here D-STATCOM operation introduces more ripple

in the system and thus invites more harmonic related problem as compared to other

controllers. Fig. 5.1.2.1(b) exhibit the profile of compensated voltage sag due to

closing of the RL load using DSTATCOM with longer time duration of 0.3 sec.

Fig. 5.1.2.1(a): Compensated r.m.s voltage at the load end using D-STATCOM.

Fig. 5.1.2.1(b): Compensated r.m.s voltage at the load end using D-STATCOM

( with longer time duration )


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5.1.2.2 Single L ine to Ground Faul t in Test System-2

Compensated voltage sag for single line to ground fault using D-STATCOM in

Test system-2 for phase A to ground fault is shown accordingly in Fig.5.1.2.2(a). D-

STATCOM manages to maintain a recovery rate at 98%. Here D-STATCOMoperation introduces more ripple in the system as compared to other controllers. Fig.

5.1.2.1(b) exhibit the profile of compensated voltage sag due to closing of the RL load

using DSTATCOM with longer time duration of the fault i.e., 0.3 sec.

Fig. 5.1.2.1(a): Compensated r.m.s voltage at the load end using D-STATCOM for

phase A to ground fault.

Fig. 5.1.2.1(b): Compensated r.m.s voltage at the load end using D-STATCOM(for phase A to ground fault with longer fault duration).


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5.2 Vol tage Swell

5.2.1 Without Controll ers

5.2.1.1 Capacitive load in Test System-1

Fig. 5.2.1.1(a) exhibit the phase voltage swell due to the closing of a capacitive

load, 3[F] through a 3 phase breaker for a duration of 0.1 sec and carried out for a

period of 300-400 ms. Fig. 5.2.1.1(b) shows that the rms voltage rises by 0.582 p.u .

with respect to the reference voltage.

Fig. 5.2.1.1(a): Phase voltages due to closing of the capacitive load.

Fig. 5.2.1.1(b): R.M.S voltage at the load terminal due to closing of capacitive load.


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Fig. 5.2.1.1(c) and Fig. 5.2.1.1(d) show the profiles of phase voltages and rms

voltage at load end for closing of the capacitive load with longer time duration. The

time duration chosen here is 0.3 sec and the simulation is carried out for a period of

300-600 ms.

Fig. 5.2.1.1(c): Phase voltages due to closing of the capacitive load( with longer time duration ).

Fig. 5.2.1.1(d): R.M.S voltage at the load terminal due to closing of the capacitiveload ( with longer time duration ).


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5.2.1.2 Capacitive load in Test System-2

Fig. 5.2.1.2(a) exhibit the phase voltage swell due to the closing of a capacitive

load, 3[F] through a 3 phase breaker for a duration of 0.1 sec and carried out for a period of 300-400 ms. Fig. 5.2.1.2(b) shows that the rms voltage rises by 0.576 p.u .

with respect to the reference voltage.

Fig. 5.2.1.2(a): Phase voltages due to closing of the capacitive load.

Fig. 5.2.1.2(b): R.M.S voltage at the load terminal due to closing of capacitive load.


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Fig. 5.2.1.2(c) and Fig. 5.2.1.2(d) show the profiles of phase voltages and rms

voltage at load end for closing of the capacitive load with longer time duration. The

time duration chosen here is 0.3 sec and the simulation is carried out for a period of

300-600 ms.

Fig. 5.2.1.2(c): Phase voltages due to closing of the capacitive load( with longer time duration ).

Fig. 5.2.1.2(d): R.M.S voltage at the load terminal due to closing of the capacitive

load ( with longer time duration ).


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5.2.2 With Controll ers

5.2.2.1 Capaciti ve load in Test System-1

Compensated voltage swell due to closing of the capacitive load using

DSTATCOM in Test system-1 is shown accordingly in Fig. 5.2.2.1(a). The voltage

swell got reduced from 1.6 to 1.13 p.u. Fig. 5.2.2.1(b) exhibit the profile of

compensated voltage swell due to closing of the capacitive load using DSTATCOM

with longer time duration of 0.3 sec and operated for a period of 300-600 ms.





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5.2.2.2 Capaciti ve load in Test System-2

Compensated voltage swell due to closing of the capacitive load using

DSTATCOM in Test system-2 is shown accordingly in Fig. 5.2.2.2(a). The voltage

swell got reduced from 1.6 to 1.13 p.u. Fig. 5.2.2.2(b) exhibit the profile ofcompensated voltage swell due to closing of the capacitive load using DSTATCOM

with longer time duration of 0.3 sec and operated for a period of 300-600 ms.

Main : Graphs

0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00

0.00

0.20

0.40

0.60

0.80

1.00

1.20

V o

l t a g e

Vrms(pu)


Main : Graphs

0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00

0.00

0.20

0.40

0.60

0.80

1.00

1.20

V o

l t a g e

Vrms(pu)




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CHAPTER 6

CONCLUSION AND FUTURE SCOPE

6.1 ConclusionIn the early era, voltage sag and swell did not pose any major problem prior to the

growth of semiconductor. In the quest for modernization, industries are incorporating

electronic appliances, programmable logic controllers, process control equipment and

robotics as their mainstream operating equipment. The adoption of these sensitive

equipments has identified voltage sag as a major power quality problem and voltage

swell as a moderate power quality problem. Researchers have seen the importance of

understanding and analyzing the phenomenon of voltage sag and swell, its effect on

sensitive equipments. Hence, in this thesis several aspects regarding study of voltage

sag and swell including the different mitigation action developed to reduce their

respective effects.

Present research work intends to investigate the performance of D-STATCOM

technique for mitigation of voltage sag and swell in a power distribution system.

Flexible power electronic based controllers like Distributed Static Compensator has

proven to be quite effective in reducing voltage sag and swell irrespective of system

size. Electromagnetic transient models of this controller has been presented and

applied for the study of power quality. The highly developed graphic facilities

available in PSCAD/ EMTDC have been used to conduct all aspects of model

implementation and to carry out extensive simulation studies.

A new PWM-based control scheme has been implemented to control theelectronic valves in the two-level VSC used in the D-STATCOM. As opposed to

fundamental frequency switching schemes already available in the PSCAD/EMTDC,

this PWM control scheme only requires voltage measurements. This characteristic

makes it ideally suitable for low-voltage custom power applications. The control

scheme is tested under a wide range of operating conditions and it is observed to be

very robust in every case. The distribution static compensator (D-STATCOM) offers

an alternative to conventional series shunt compensation. D-STATCOM is a devicethat promises a prominent future in power system in mitigating power quality related


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problems. D-STATCOM is also found to be useful for mitigation of voltage sag and

swell. With increase in duration of fault D-STATCOM has been found to be better

than other mitigation controllers.

6.2 Future ScopeVoltage sag and swell are an unwanted phenomenon which is almost unavoidable

but can be reduced using suitable techniques, but not limited to the techniques that

have been studied here. There is no one mitigation technique that is suitable with

every application, and whilst the power supply utilities strive to supply improved

power quality, it is up to the application engineer to minimize power quality

problems.

Solid state transfer switch (SSTS) is not the most cost effective but in many

cases, it is a practical mitigating technique to apply especially for sensitive loads.

SSTS solutions are attractive since they do not require additional power conditioning

equipment, but instead involve using another source component. The SSTS simulation

may be performed in addition to present study for different Test Systems which may

help system operator to adopt most suitable controller to mitigate voltage sag and

swell. Other associated problems like assessment of harmonics generation;transformer saturation mitigation technique may also be explored as an extension of

present research work. The effect of the rating of the dc storage device and the

characteristics of the coupling transformer of DSTATCOM on its performance may

als

Documents

volatge dip mitigation with D-Statcom