Correspondence 303

(a)

(b) Fig. l-(a) Impulse and $ep response for rz = 9, c = 30 per cent. (b) Impulse and

step response for n = 10, f = 30 per cent.

Fig. 2-Impulse and step response for n = 8, 6 = 10 per cent.

of a linear phase system. The agreement between the actual response and the approximate one given by (4) is improving for n and e increasing. Indeed, for n and 6 increasing, the band in which the delay is approximated in an equal ripple manner becomes larger and the attenuation at the band edge grows steeper; thus the approximation (4) is better.

As it can be seen in Fig. 1, there exist further echoes. From the tabulated data, it appears that the mth echo has an amplitude [( -l)n+l~/tilm and is delayed by a time mti. It is well known that impulse responses of this type are characteristic of response functions of the type

-2w H(jw) = e

1 + (-l)nce-iw‘l and the corresponding delay function is

To the first order in E, (1) and (6) are identical.

. 63) 1

As an example of application, it is possible to design a system with a reduced overshoot by taking as transfer function the product of a transfer function of the nth degree by the transfer function of the (n + 1)th degree, the ripple being the same. The first echo will be small, as being the sum of two echoes with the same amplitude and with opposite signs.

J. J. NEIRYNCK

Lab. de Recherche Manufacture Belge de Lampes et

de Materiel Electronique Brussels, Belgium

Violation of the Duality Rule

The concept of duality is an old and familiar one. In circuit theory, having proved a certain theorem, one can usually state and prove the dual theorem. An exception arises in the study of the realization of resistive n-port networks.’ There it is found that the necessary and sufficient conditions for a general n X n matrix to be realizable as a short-circuit admittance matrix differ from the conditions for its realizability as an open-circuit impedance matrix. The purpose of this communication is to provide another example of the same nature, which will serve to show that the mere substitu- tion of dual notions in a theorem does not necessarily yield a valid dual theorem.

In essence, what we shall show is the following: There is a limit to the complexity of networks having the property that the combination of any two Kirchhoff’s voltage equations is also a Kirchhoff’s voltage equation; however, there is no limit to the complexity of networks having the property that the combination of any two cut-set equations, or generalized Kirchhoff’s current equations, is also a cut-set equation. In order to treat the matter in a rigorous manner, we shall use the terminology of linear graph theory2 and restate the above idea as a theorem and a conjecture. We shall then prove the theorem and disprove the conjecture, which is the dual of the theorem.

Theorem: There exists a connected graph G which has the maxi- mum number of edges and the following properties:

1) The ring sum of any two circuits is also a circuit. 2) Every edge in G is in some circuit of G. 3) No edges are connected in series.

Since the dual of a circuit is a cut-set? and the dual of a series connection is a parallel connection, we have the following conjecture.

Conjecture: There exists a connected graph G which has the maxi- mum number of edges and the following properties:

1) The ring sum of any two cut-sets is also a cut-set. 2) Every edge in G is in some cut-set of G. 3) No edges arc connected in parallel.

Proof of the theorem: Consider the degrees of the vertices of G. A vertex of degree 1 violates 2). A vertex of degree 2 violates 3). It is not difficult to show that a vertex of degree 4 or higher will lead to a contradiction of 1). Thus we conclude that every vertex of G must have a degree of 3.

Let G contain o vertices. There are 3v/2 edges. Obviously v must be an even integer. Let us remove a set of v/2 edges from G in such a way as to reduce the degree of every vertex to 2. This is always

Manuscript received November I, 1963; revised January 6. 1964. 1 I. Cederbaum. “Topological considerations in the realization of resistive

n-port networks,” IRE TRAN~. ON CIRCUIT THEORY. vol. CT-g, pp. 324-329; September, 1961.

2 S. Se&u and M. B. Reed,, “Linear Graphs and Electrical Networks,” Addison- Wesley Publishing Co., Readmg, Mass.; 1961. The terminology used in this com- munication is the 8ame as that used by Seshu and Reed.

3 Seshu and Reed, op. cit.,* Ch. 2.

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3

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Fig. 1.

Fig. 2.

Fig. 3.

Fig. 4.

possible. The remaining subgraph is a circuit, which can be drawn as the polygon shown in Fig. 1.

Next, we restore the set of v/2 edges one by one and draw the edges inside the polygon. If any two of these restored edges do not intersect each other, then condition 1) is obviously violated. There- fore, all v/2 edges drawn inside the polygon must cross each other, and, consequently, will have the general pattern shown in Fig. 2. If v is equal to or greater than 8, then condition 1) is violated when we consider the ring sum of the circuit containing edges (el, ez) and the circuit containing edges (ea, e,). Therefore, we arrive at the conclusion that the greatest value of u is 6. The only graph which has 6 vertices, all of degree 3, is that shown in Fig. 3.

This graph, with 9 edges, satisfies all the conditions of the theorem. This completes the proof of the theorem.

Disproof of the conjecture: We simply offer a counterexample. Con- sider a complete graph with v vertices. An example of a complete graph with 5 vertices is shown in Fig. 4. It can easily be shown that any complete graph satisfies conditions 1) to 3) of the conjecture. Since there is no limit to the number of vertices, there is no limit to the number of edges either. Therefore the conjecture is incorrect.

P. M. LIN

School of Elec. Engrg. Purdue University

Lafayette, Ind.

On the Synthesis of RLC Voltage Transfer Functions with Prescribed Loads

Earlier work done on terminated networks has dealt primarily with the restricted class of pure ohmic load impedances.’ A method of modifying the voltage transfer function to allow for nearly any Z, is presented here.

Consider the arrangement shown in Fig. 1. Suppose we are given the general specification

a sn + cL,-ls”-’ + . * * + a0 T&(s) = n V2(s> b,s” + brn-lP + . * . + bo

_ Vl(S> (1)

with its prescribed load impedance

.cj- L (8) = 3 Q(s)

to be synthesized in the configuration of Fig. 1. Tfs must of course satisfy the Fialkow-Gerst realizability criteria.2 Now the objective is todetermine what the open-circuit voltage transfer function Ty, of the RLC network should be before the load is connected. Tp, is found as a function of T& and 2, and is then synthesized by con- ventional methods.2-4 The termination of this RLC network in Z, then gives the desired Tfz within a multiplicative constant.

Fig. l-RLC network terminated in load 2~.

T$ may be expressed in terms of the conventional short-circuit admittance parameters of the RLC network and Z, as follows:

Tfa = $K? (over-all parameters) 22

Manuscript received September 10. 1963; revised January 6, 1964. This paper W&B supported in part by the U. S. Army Research Office and the Air Force Office of Scientific Research.

1 S. Darlington, “SyntheCs of reactance 4-p&s,” J. Math. Phys., vol. 18, pp. 2!57-353; 1939.

2 b. D. Fialkow and I. Gerst, “Transfer function of networks without mutual reactance,” Quart. Appl. Math., vol. 12, pp. 117-131; 1954.

3 S. L. Hakimi, “Synthesis of grounded two terminal pair RLC networks,” Proc. Miduxst Sump. on Circuit Theory! pp. Fl-Fll; 1959.

4 R. K. Msnherz, “On the Synthesis of RLC Voltage Transfer Functions With Prescribed Loads,” Network Theory Group, Northwestern Univ., Evanston, Ill., Tech. Rept. No. 4, September 5. 1963.