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VOUT = 5VVIN = 8V
PG
VOUTVIN
PG
GND
SENSE
EN/UVLO
RPG100kΩ
R2100kΩ
R1100kΩ
COUT1µF
CIN1µF
ON
OFF
++
09
50
6-0
01
VOUT = 5VVIN = 8V
PG
VOUTVIN
PG
GND
ADJ
EN/UVLO
RPG100kΩ
R4100kΩ
R3100kΩ
COUT1µF
CIN1µF
ON
OFF
++
R213kΩ
R140.2kΩ
09
50
6-0
02
ADP7102 Data Sheet
Rev. D | Page 6 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NOTES1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. IT IS HIGHLY RECOMMENDED THAT THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE BE CONNECTED TO THE GROUND PLANE ON THE BOARD.
3GND
4NC
1VOUT
2SENSE/ADJ
6 GND
5 EN/UVLO
8 VIN
7 PGADP7102TOP VIEW
(Not to Scale)
095
06-
003
Figure 3. LFCSP Package
NOTES1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.2. IT IS HIGHLY RECOMMENDED THAT THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE BE CONNECTED TO THE GROUND PLANE ON THE BOARD.
VOUT 1
SENSE/ADJ 2
GND 3
NC 4
VIN8
PG7
GND6
EN/UVLO5
ADP7102TOP VIEW
(Not to Scale)
09
506-
104
Figure 4. Narrow Body SOIC Package
Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor. 2 SENSE/ADJ Sense (SENSE). Measures the actual output voltage at the load and feeds it to the error amplifier.
Connect SENSE as close as possible to the load to minimize the effect of IR drop between the regulator output and the load. This function applies to fixed voltages only. Adjust Input (ADJ). An external resistor divider sets the output voltage. This function applies to adjustable voltages only.
3 GND Ground. 4 NC Do Not Connect to this Pin. 5 EN/UVLO Enable Input (EN). Drive EN high to turn on the regulator; drive EN low to turn off the regulator.
For automatic startup, connect EN to VIN. Programmable Undervoltage Lockout (UVLO). When the programmable UVLO function is used, the upper and lower thresholds are determined by the programming resistors.
6 GND Ground. 7 PG Power Good. This open-drain output requires an external pull-up resistor to VIN or VOUT. If the
part is in shutdown, current limit, thermal shutdown, or falls below 90% of the nominal output voltage, PG immediately transitions low. If the power good function is not used, the pin may be left open or connected to ground.
8 VIN Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor. EPAD Exposed Pad. Exposed paddle on the bottom of the package. The EPAD enhances thermal
performance and is electrically connected to GND inside the package. It is highly recommended that the EPAD be connected to the ground plane on the board.
3.25
3.27
3.29
3.31
3.33
3.35
VO
UT (
V)
–40°C –5°C 25°C 85°C 125°C
TJ (°C)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
04
3.25
3.27
3.29
3.31
3.33
3.35
0.1 1 10 100 1000
VO
UT (
V)
ILOAD (mA)
09
50
6-0
05
3.25
3.27
3.29
3.31
3.33
3.35
4 6 8 10 12 14 16 18 20
VO
UT (
V)
VIN (V)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
06
0
100
200
300
400
500
600
700
800
900
GR
OU
ND
CU
RR
EN
T(µ
A)
–40°C –5°C 25°C 85°C 125°C
TJ (°C)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
07
0
100
200
300
400
500
600
700
0.1 1 10 100 1000
GR
OU
ND
CU
RR
EN
T (
µA
)
ILOAD (mA)
09
50
6-0
08
0
100
200
300
400
500
600
700
800
900
64 8 10 12 14 16 18 20
GR
OU
ND
CU
RR
EN
T(µ
A)
VIN (V)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
09
0
20
40
60
80
100
120
140
160
–50 –25 0 25 50 75 100 125
SH
UT
DO
WN
CU
RR
EN
T (
µA
)
TEMPERATURE (°C)
3.3V4.0V6.0V8.0V12.0V20.0V
09
50
6-0
10
0
20
40
60
80
100
120
140
160
180
200
1 10 100 1000
DR
OP
OU
T (
mV
)
ILOAD (mA)
VOUT = 3.3VTA = 25°C
09
50
6-0
11
2.90
2.95
3.00
3.05
3.10
3.15
3.20
3.25
3.30
3.35
3.10 3.20 3.30 3.40 3.50 3.60 3.70
VO
UT (
V)
VIN (V)
09
50
6-0
12
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
0
200
400
600
800
1000
1200
1400
3.10 3.20 3.30 3.40 3.50 3.60 3.70
GR
OU
ND
CU
RR
EN
T (
µA
)
VIN (V)
09
50
6-0
13
LOAD = 5mALOAD = 10mALOAD = 100mALOAD = 200mALOAD = 300mA
4.95
4.96
4.97
4.98
4.99
5.00
5.01
5.02
5.03
5.04
5.05
VO
UT (
V)
–40°C –5°C 25°C 85°C 125°C
TJ (°C)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
14
4.95
4.96
4.97
4.98
4.99
5.00
5.01
5.02
5.03
5.04
5.05
0.1 1 10 100 1000
VO
UT (
V)
ILOAD (mA)
09
50
6-0
15
4.95
4.96
4.97
4.98
4.99
5.00
5.01
5.02
5.03
5.04
5.05
6 8 10 12 14 16 18 20
VO
UT (
V)
VIN (V)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
16
09
50
6-1
18
GR
OU
ND
CU
RR
EN
T (
µA
)
0
100
200
300
400
500
600
700
800
900
1000
–40°C –5°C 25°C 85°C 125°C
TJ (°C)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
0
100
200
300
400
500
600
700
0.1 1 10 100 1000
GR
OU
ND
CU
RR
EN
T (
µA
)
ILOAD (mA)
09
50
6-1
19
0
100
200
300
400
500
600
700
800
900
GR
OU
ND
CU
RR
EN
T (
µA
)
6 8 10 12 14 16 18 20
VIN (V)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-1
20
0
20
40
60
80
100
120
140
160
180
1 10 100 1000
DR
OP
OU
T (
mV
)
ILOAD (mA)
VOUT = 5VTA = 25°C
09
50
6-0
17
4.65
4.70
4.75
4.80
4.85
4.90
4.95
5.00
5.05
4.8 4.9 5.0 5.1 5.2 5.3 5.4
VO
UT (
V)
VIN (V)
09
50
6-0
18
LOAD = 5mALOAD = 10mALOAD = 100mALOAD = 200mALOAD = 300mA
VIN (V)
–500
0
500
1000
1500
2000
2500
4.80 4.90 5.00 5.10 5.20 5.30 5.40
GR
OU
ND
CU
RR
EN
T (
µA
)
09
50
6-0
19
LOAD = 5mALOAD = 10mALOAD = 100mALOAD = 200mALOAD = 300mA
1.75
1.77
1.79
1.81
1.83
1.85
VO
UT (
V)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
–40°C –5°C 25°C 85°C 125°C
TJ (°C)
09
50
6-0
20
1.75
1.77
1.79
1.81
1.83
1.85
0.1 1 10 100 1000
VO
UT (
V)
ILOAD (mA)
09
50
6-0
21
1.75
1.77
1.79
1.81
1.83
1.85
2 4 6 8 10 12 14 16 18 20
VO
UT (
V)
VIN (V)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
22
0
100
200
300
400
500
600
700
800
900
–40°C –5°C 25°C 85°C 125°C
GR
OU
ND
CU
RR
EN
T (
µA
)
TJ (°C)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
23
0
100
200
300
400
500
600
700
0.1 1 10 100 1000
GR
OU
ND
CU
RR
EN
T (
µA
)
ILOAD (mA)
09
50
6-1
28
GR
OU
ND
CU
RR
EN
T (
µA
)
VIN (V)
0
200
400
600
800
1000
1200
2 4 6 8 10 12 14 16 18 20
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-1
29
4.98
4.99
5.00
5.01
5.02
5.03
5.04
5.05
5.06
5.07
5.08
VO
UT (
V)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
–40°C –5°C 25°C 85°C 125°C
TJ (°C)
09
50
6-0
24
4.98
4.99
5.00
5.01
5.02
5.03
5.04
5.05
5.06
5.07
5.08
0.1 1 10 100 1000
VO
UT (
V)
ILOAD (mA)
09
50
6-0
25
4.98
4.99
5.00
5.01
5.02
5.03
5.04
5.05
5.06
5.07
5.08
6 8 10 12 14 16 18 20
VO
UT (
V)
VIN (V)
LOAD = 100µALOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
26
0
0.5
1.0
1.5
2.0
–40 –20 0 20 40 60 80 100 120 140
I OU
T S
HU
TD
OW
N C
UR
RE
NT
(µ
A)
TEMPERATURE (°C)
3.3V4V5V6V8V10V12V15V18V20V
09
50
6-0
53
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 300mALOAD = 100mALOAD = 10mALOAD = 1mA
09
50
6-0
27
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 300mALOAD = 100mALOAD = 10mALOAD = 1mA
09
50
6-0
28
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 300mALOAD = 100mALOAD = 10mALOAD = 1mA
09
50
6-0
29
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 300mALOAD = 100mALOAD = 10mALOAD = 1mA
09
50
6-0
30
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
31
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
32
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
33
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
34
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
35
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
36
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
10 100 1k 10k 100k 1M 10M
PS
RR
(d
B)
FREQUENCY (Hz)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
37
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0 0.25 0.50 0.75 1.00 1.25 1.50
PS
RR
(d
B)
HEADROOM VOLTAGE (V)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
38
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0 0.25 0.50 0.75 1.00 1.25 1.50
PS
RR
(d
B)
HEADROOM VOLTAGE
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
39
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0 0.25 0.50 0.75 1.00 1.25 1.50
PS
RR
(d
B)
HEADROOM VOLTAGE (V)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
40
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
0 0.25 0.50 0.75 1.00 1.25 1.50
PS
RR
(d
B)
HEADROOM VOLTAGE (V)
LOAD = 1mALOAD = 10mALOAD = 100mALOAD = 300mA
09
50
6-0
41
0
5
10
15
20
25
30
0.00001 0.0001 0.001 0.01 0.1 1
NO
ISE
(µ
V r
ms)
LOAD CURRENT (A)
3.3V1.8V5V5VADJ5VADJ NR
09
50
6-0
42
0.01
0.1
1
10
10 100 1k 10k 100k
FREQUENCY (Hz)
3.3V5V5V ADJ5V ADJ NR
µV
/√H
z
09
50
6-0
43
CH2 50mVCH1 200mA M 20µs A CH1 76mA
1
2
T 10.4%
Ω BW
BW
09
50
6-0
44
LOAD CURRENT
OUTPUT VOLTAGE
CH1 200mA CH2 50mV M 20µs A CH1 168mA
1
2
T 10.2%
BW
BWΩ
09
50
6-0
45
LOAD CURRENT
OUTPUT VOLTAGE
CH1 200mA CH2 50mV M 20µs A CH1 216mA
1
2
T 10.2%
BW
BWΩ
09
50
6-0
46
LOAD CURRENT
OUTPUT VOLTAGE
CH2 10mVCH1 1V M 4µs A CH4 1.56V
1
2
T 9.8%
BW
BW
09
50
6-0
47
OUTPUT VOLTAGE
INPUT VOLTAGE
CH2 10mVCH1 1V M 4µs A CH4 1.56V
1
2
T 9.8%
BW
BW
09
50
6-0
48
OUTPUT VOLTAGE
INPUT VOLTAGE
CH1 1V CH2 10mV M 4µs A CH4 1.56V
1
2
T 9.8%
BW
BW
09
50
6-0
49
OUTPUT VOLTAGE
INPUT VOLTAGE
CH2 10mVCH1 1V M 4µs A CH4 1.56V
1
2
T 9.8%
BW
BW
09
50
6-0
50
OUTPUT VOLTAGE
INPUT VOLTAGE
CH2 10mVCH1 1V M 4µs A CH4 1.56V
1
2
T 9.8%
BW
BW
09
50
6-0
51
OUTPUT VOLTAGE
INPUT VOLTAGE
CH2 10mV M 4µs A CH4 1.56V
1
2
T 9.8%
BW
BWCH1 1V
09
50
6-0
52
OUTPUT VOLTAGE
INPUT VOLTAGE
Data Sheet ADP7102
Rev. D | Page 17 of 28
THEORY OF OPERATION The ADP7102 is a low quiescent current, low-dropout linear regulator that operates from 3.3 V to 20 V and provides up to 300 mA of output current. Drawing a low 750 μA of quiescent current (typical) at full load makes the ADP7102 ideal for battery-operated portable equipment. Typical shutdown current consumption is 40 μA at room temperature.
Optimized for use with small 1 μF ceramic capacitors, the ADP7102 provides excellent transient performance.
SHUTDOWN
VIN
GND
EN/UVLO
VOUT
R1
R2
1.22VREFERENCE
VREGPGOOD PG
SENSE
SHORT-CIRCUIT,THERMALPROTECT
10µA
095
06-0
55
Figure 60. Fixed Output Voltage Internal Block Diagram
SHUTDOWN
VIN
GND
EN/UVLO
VOUT
1.22VREFERENCE
VREGPGOOD PG
SENSE
SHORT-CIRCUIT,THERMALPROTECT
10µA
0950
6-0
56
Figure 61. Adjustable Output Voltage Internal Block Diagram
Internally, the ADP7102 consists of a reference, an error amplifier, a feedback voltage divider, and a PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback voltage from the output and amplifies the difference. If the feedback voltage is lower than the reference voltage, the gate of the PMOS device is pulled lower, allowing more current to pass and increasing the output voltage. If the feedback voltage
is higher than the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage.
The ADP7102 is available in 7 fixed output voltage options, ranging from 1.8 V to 9 V and in an adjustable version with an output voltage that can be set to between 1.22 V and 19 V by an external voltage divider. The output voltage can be set according to the following equation:
VOUT = 1.22 V(1 + R1/R2)
VOUT = 5VVIN = 8V
PG
VOUTVIN
PGGND
ADJ
EN/UVLO
RPG100kΩ
R4100kΩ
R3100kΩ
COUT1µF
CIN1µF
ONOFF R2
13kΩ
++ R140.2kΩ
09
506
-057
Figure 62. Typical Adjustable Output Voltage Application Schematic
The value of R2 should be less than 200 kΩ to minimize errors in the output voltage caused by the ADJ pin input current. For example, when R1 and R2 each equal 200 kΩ, the output voltage is 2.44 V. The output voltage error introduced by the ADJ pin input current is 2 mV or 0.08%, assuming a typical ADJ pin input current of 10 nA at 25°C.
The ADP7102 uses the EN/UVLO pin to enable and disable the VOUT pin under normal operating conditions. When EN/UVLO is high, VOUT turns on, when EN is low, VOUT turns off. For automatic startup, EN/UVLO can be tied to VIN.
The ADP7102 incorporates reverse current protections circuitry that prevents current flow backwards through the pass element when the output voltage is greater than the input voltage. A comparator senses the difference between the input and output voltages. When the difference between the input voltage and output voltage exceeds 55 mV, the body of the PFET is switched to VOUT and turned off or opened. In other words, the gate is connected to VOUT.
CH2 50mVCH1 200mA M 20µs A CH1 76mA
1
2
T 10.4%
Ω BW
BW
09
50
6-0
58
LOAD CURRENT
OUTPUT VOLTAGE
1.2
1.0
0.8
0.6
0.4
0.2
00 2 4 6 8 10
CA
PA
CIT
AN
CE
(µ
F)
VOLTAGE (V) 09
50
6-0
59
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.001.000
VOUT, EN RISE
VOUT, EN FALL0
95
06
-06
0
VOUT = 5VVIN = 8V
PG
VOUTVIN
PG
GND
SENSE
EN/UVLO
RPG100kΩ
R2100kΩ
R1100kΩ
COUT1µF
CIN1µF
ON
OFF
++
09
50
6-0
61
TIME (µs)
0 500 1000 1500 2000
6
4
5
3
2
1
0
VO
UT (
V)
5V
3.3V
ENABLE
09
50
6-0
62
0
1
2
3
4
5
6
4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0
PG
(V
)
VOUT (V)
PG –40°CPG –5°CPG +25°CPG +85°CPG +125°C
09
50
6-0
63
0
1
2
3
4
5
6
4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0
PG
(V
)
VOUT (V)
PG –40°CPG –5°CPG +25°CPG +85°CPG +125°C
09
50
6-0
64
VOUT = 5VVIN = 8V
PG
VOUTVIN
PGGND
ADJ
EN/UVLO
100kΩ
100kΩ
100kΩ
COUT1µF
CIN1µF
ON
OFF
RNR13kΩRFB2
13kΩ
++ RFB140.2kΩ CNR
100nF
+
09
50
6-0
65
25
35
45
55
65
75
85
95
105
115
125
135
145
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
JU
NC
TIO
N T
EM
PE
RA
TU
RE
(°C
)
TOTAL POWER DISSIPATION (W)
6400mm2
500mm2
25mm2
TJ MAX
09
50
6-0
66
JU
NC
TIO
N T
EM
PE
RA
TU
RE
(°C
)
50
60
70
80
90
100
110
120
130
140
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
TOTAL POWER DISSIPATION (W)
6400mm2
500mm2
25mm2
TJ MAX
09
50
6-0
67
JU
NC
TIO
N T
EM
PE
RA
TU
RE
(°C
)
65
75
85
95
105
115
125
135
145
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
TOTAL POWER DISSIPATION (W)
6400mm2
500mm2
25mm2
TJ MAX
09
50
6-0
68
25
35
45
55
65
75
85
95
105
115
125
135
145
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
TOTAL POWER DISSIPATION (W)
JU
NC
TIO
N T
EM
PE
RA
TU
RE
(°C
)
6400mm2
500mm2
25mm2
TJ MAX
09
50
6-0
69
50
60
70
80
90
100
110
120
130
140
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
TOTAL POWER DISSIPATION (W)
JU
NC
TIO
N T
EM
PE
RA
TU
RE
(°C
)
6400mm2
500mm2
25mm2
TJ MAX
09
50
6-0
70
65
75
85
95
105
115
125
135
145
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
TOTAL POWER DISSIPATION (W)
JU
NC
TIO
N T
EM
PE
RA
TU
RE
(°C
)
6400mm2
500mm2
25mm2
TJ MAX
09
50
6-0
71
TOTAL POWER DISSIPATION (W)
JU
NC
TIO
N T
EM
PE
RA
TU
RE
(T
J)
0
20
40
60
80
100
120
140
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
TB = 25°CTB = 50°CTB = 65°CTB = 85°CTJ MAX
09
50
6-0
72
TOTAL POWER DISSIPATION (W)
JU
NC
TIO
N T
EM
PE
RA
TU
RE
(T
J)
0
20
40
60
80
100
120
140
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
TB = 25°CTB = 50°CTB = 65°CTB = 85°CTJ MAX
09
50
6-0
73
Data Sheet ADP7102
Rev. D | Page 25 of 28
OUTLINE DIMENSIONS
PIN 1INDICATOR(R 0.2)
BOTTOM VIEWTOP VIEW14
85
INDEXAREA
SEATINGPLANE
0.800.750.70
0.300.250.18
0.05 MAX0.02 NOM
0.80 MAX0.55 NOM
0.20 REF0.50 BSC
COPLANARITY0.08
2.482.382.23
1.741.641.490.50
0.400.30
COMPLIANT TOJEDEC STANDARDS MO-229-WEED-4
FOR PROPER CONNECTION OFTHE EXPOSED PAD, REFER TOTHE PIN CONFIGURATION ANDFUNCTION DESCRIPTIONSSECTION OF THIS DATA SHEET.
02-
05-
201
3-B
0.20 MIN
EXPOSEDPAD
3.103.00 SQ2.90
Figure 81. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 3 mm Body, Very Very Thin, Dual Lead (CP-8-5)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MS-012-AA 06-
03-
20
11-B
1.270.40
1.751.35
2.41
0.356
0.457
4.003.903.80
6.206.005.80
5.004.904.80
0.10 MAX0.05 NOM
3.81 REF
0.250.17
8°0°
0.500.25
45°
COPLANARITY0.10
1.04 REF
8
1 4
5
1.27 BSC
SEATINGPLANE
FOR PROPER CONNECTION OFTHE EXPOSED PAD, REFER TOTHE PIN CONFIGURATION ANDFUNCTION DESCRIPTIONSSECTION OF THIS DATA SHEET.
BOTTOM VIEW
TOP VIEW
0.510.31
1.651.25
3.098
Figure 82. 8-Lead Standard Small Outline Package, with Exposed Pad [SOIC_N_EP]
Narrow Body (RD-8-2)
Dimensions shown in millimeters
