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CONTROL OF IRRIGATION PUMP THROUGH GSM TECHNOLOGY

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CONTROL OF IRRIGATION PUMP THROUGH GSM TECHNOLOGY

CONTENTS

S.No. Contents Page

1. Abbreviations

2. Figures locations

3. Introduction

4. . Block diagram

5. Block diagram Explanation

6. Schematic

7. Schematic Explanation (pin to pin connectivity)

8. Hardware components

a. Microcontroller (max 50 pages)b. MAX 232c. Power Supplyd. GSMe. soilf. dc motorg. LCD

9. Circuit Description

10. Software components

a. About Keilb. Embedded ‘C’

11. Source Code OUTSIDE

12. Conclusion or Synopsis

13. Bibliography

ABBREVIATIONS

Symbol Name

ACC Accumulator

B B register

PSW Program status word

SP Stack pointer

DPTR Data pointer 2 bytes

DPL Low byte

DPH High byte

P0 Port0

P1 Port1

P2 Port2

P3 Port3

IP Interrupt priority control

IE Interrupt enable control

TMOD Timer/counter mode control

TCON Timer/counter control

T2CON Timer/counter 2 control

T2MOD Timer/counter mode2 control

TH0 Timer/counter 0high byte

TL0 Timer/counter 0 low byte

TH1 Timer/counter 1 high byte

TL1 Timer/counter 1 low byte

TH2 Timer/counter 2 high byte

TL2 Timer/counter 2 low byte

SCON Serial control

SBUF Serial data buffer

PCON Power control

FIGURES LOCATIONS

S.no Title Page no

1. Block diagram

2 Schematic diagram

3 Block diagram of controller

4 Memory types

5 Pin diagram of AT89c51

6 Serial communication

7 Keypad

8 Block diagram of LCD

9 Pin diagram of LCD

10 Power supply diagram

INTRODUCTION

Microchip has positioned itself to target the motor control market, where our advanced designs, progressive process technology and industry leading product performance enables us to deliver decidedly superior performance over our competitors, which includes the best of the industry. These products are positioned to provide a complete product solution for embedded control applications found throughout the consumer, automotive and industrial control markets. Microchip products are meeting the unique design requirements of the motion control embedded applications.

EMBEDDED SYSTEM:

An embedded system is a special-purpose system in which the computer is completely encapsulated by or dedicated to the device or system it controls. Unlike a general-purpose computer, such as a personal computer, an embedded system performs one or a few predefined tasks, usually with very specific requirements. Since the system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product. Embedded systems are often mass-produced, benefiting from economies of scale.

Personal digital assistants (PDAs) or handheld computers are generally considered embedded devices because of the nature of their hardware design, even though they are more expandable in software terms. This line of definition continues to blur as devices expand. With the introduction of the OQO Model 2 with the Windows XP operating system and ports such as a USB port — both features usually belong to "general purpose computers", — the line of nomenclature blurs even more.

Physically, embedded systems ranges from portable devices such as digital watches and MP3 players, to large stationary installations like traffic lights, factory controllers, or the systems controlling nuclear power plants.

In terms of complexity embedded systems can range from very simple with a single microcontroller chip, to very complex with multiple units, peripherals and networks mounted inside a large chassis or enclosure.

Examples of Embedded Systems: Avionics, such as inertial guidance systems, flight control

hardware/software and other integrated systems in aircraft and missiles Cellular telephones and telephone switches Engine controllers and antilock brake controllers for automobiles Home automation products, such as thermostats, air conditioners,

sprinklers, and security monitoring systems Handheld calculators Handheld computers Household appliances, including microwave ovens, washing

machines, television sets, DVD players and recorders Medical equipment Personal digital assistant Videogame consoles Computer peripherals such as routers and printers. Industrial controllers for remote machine operation.

CROP FIELD SECTION:

BLOCK DIAGRAM EXPLANATION:

This Project mainly consists of Power Supply section, Microcontroller

section, GSM, MAX 232, motor, LCD, soil.

Power Supply Section:

This section is meant for supplying Power to all the sections mentioned above. It

basically consists of a Transformer to step down the 230V ac to 9V ac followed by diodes. Here

diodes are used to rectify the ac to dc. After rectification the obtained rippled dc is filtered using a

MICRO

CONTROLLER

AT89S52

POWER SUPPLY

LCD DISPLAY

(16 X 2 LINES)

MAX 232

DC motor

SOIL MOISTURE

GSM

capacitor Filter. A positive voltage regulator is used to regulate the obtained dc voltage. But here

in this project two power supplies are used one is meant to supply operating voltage for

Microcontroller and the other is to supply control voltage for Motors.

Microcontroller (8052):

In this project work the micro-controller is playing a major role. Micro-controllers were

originally used as components in complicated process-control systems. However, because of

their small size and low price, Micro-controllers are now also being used in regulators for

individual control loops. In several areas Micro-controllers are now outperforming their analog

counterparts and are cheaper as well.

The purpose of this project work is to present control theory that is relevant to the

analysis and design of Micro-controller system with an emphasis on basic concept and ideas. It is

assumed that a Microcontroller with reasonable software is available for computations and

simulations so that many tedious details can be left to the Microcontroller. The control system

design is also carried out up to the stage of implementation in the form of controller programs in

assembly language OR in C-Language

MAX 232 Sections:

The microcontroller can communicate with the serial devices using its single Serial Port.

The logic levels at which this serial port operates is TTL logics. But some of the serial devices

operate at RS 232 Logic levels. For example PC and GSM etc. So in order to communicate the

Microcontroller with either GSM modem or PC, a mismatch between the Logic levels occurs. In

order to avoid this mismatch, in other words to match the Logic levels, a Serial driver is used.

And MAX 232 is a Serial Line Driver used to establish communication between microcontroller

and PC (or GSM)

LCD Display Section:

This section is basically meant to show up the status of the project. This

project makes use of Liquid Crystal Display to display / prompt for necessary

information.

GSM modem Section:

This section consists of a GSM modem. The modem will communicate with

microcontroller using serial communication. The modem is interfaced to microcontroller

using MAX 232, a serial driver.

DC Motor:

DC motor is an output for this project. And DC motor is connected to

microcontroller. And this motor controlled by the microcontroller with the respective

inputs given by us. Its speed will be varied according to the speed set by the switches.

SCHEMATIC:

SCHEMATIC DESCRIPTION:

Firstly, the required operating voltage for Microcontroller 89S52 is 5V. Hence the

5V D.C. power supply is needed by the same. This regulated 5V is generated by first

stepping down the 230V to 18V by the step down transformer.

In the both the Power supplies the step downed a.c. voltage is being rectified by

the Bridge Rectifier. The diodes used are 1N4007. The rectified a.c voltage is now

filtered using a ‘C’ filter. Now the rectified, filtered D.C. voltage is fed to the Voltage

Regulator. This voltage regulator allows us to have a Regulated Voltage. In Power supply

given to Microcontroller 5V is generated using 7805 and in other two power supply 12V

is generated using 7812. The rectified; filtered and regulated voltage is again filtered for

ripples using an electrolytic capacitor 100μF. Now the output from the first section is fed

to 40th pin of 89S52 microcontroller to supply operating voltage and from other power

supply to circuitry.

The microcontroller 89S52 with Pull up resistors at Port0 and crystal oscillator of

11.0592 MHz crystal in conjunction with couple of capacitors of is placed at 18 th & 19th

pins of 89S52 to make it work (execute) properly.

Port 0:

P0 is connected to the data pins of the LCD.

P2.5, P2.6, P2.7 are connected to control pins of the LCD.

PORT 2:

DC motor is connected to the port P2.1.

Soil is connected to the port P2.0.

Port 3:

GSm is connected to the port P3.0 & P3.1.

20th is connected to GROUND

40th is connected to Vcc

HARDWARE COMPONENTS:

The Hardware components used in this project are

Regulated Power Supplies

Microcontroller

MAX 232

GSM

LCD

Motor

soil

REGULATED POWER SUPPLY

7.0 Description

A variable regulated power supply, also called a variable bench power supply, is one

where you can continuously adjust the output voltage to your requirements. Varying the output of

the power supply is the recommended way to test a project after having double checked parts

placement against circuit drawings and the parts placement guide.

This type of regulation is ideal for having a simple variable bench power supply. Actually this is

quite important because one of the first projects a hobbyist should undertake is the construction of

a variable regulated power supply. While a dedicated supply is quite handy e.g. 5V or 12V, it's

much handier to have a variable supply on hand, especially for testing.

Most digital logic circuits and processors need a 5-volt power supply. To use these parts we need

to build a regulated 5-volt source. Usually you start with an unregulated power supply ranging

from 9 volts to 24 volts DC (A 12 volt power supply is included with the beginner kit and the

Microcontroller. To make a 5 volt power supply, we use a LM7805 voltage regulator IC

(Integrated Circuit). The IC is shown below.

FIG 7.1

The LM7805 is simple to use. You simply connect the positive lead of your unregulated DC

power supply (anything from 9VDC to 24VDC) to the Input pin, connect the negative lead to the

Common pin and then when you turn on the power, you get a 5 volt supply from the Output pin.

7.1 Circuit features

Brief description of operation: Gives out well regulated +5V output, output current

capability of 100 mA

Circuit protection: Built-in overheating protection shuts down output when regulator IC gets too

hot

Circuit complexity: Very simple and easy to build

Circuit performance: Very stable +5V output voltage, reliable operation

Availability of components: Easy to get, uses only very common basic components

Design testing: Based on datasheet example circuit, I have used this circuit successfully as part

of many electronics projects

Applications: Part of electronics devices, small laboratory power supply

Power supply voltage: Unregulated DC 8-18V power supply

Power supply current: Needed output current + 5 mA

Component costs: Few dollars for the electronics components + the input transformer cost.

FIG 7.2 Full-wave Rectifier:

Full wave rectifier circuit is shown below. the transformer secondary has a centre-tap and each

half give voltage of Vm. In each half there is one diode i.e. D1 and D2.the load resistance Rl is

common to both halves.

This can be seen to comprise of two half-wave circuits. on the positive half cycle, when the

point is +ve w.r.tB,theDiode D1 conducts and current i1 flows through Rl. During this half

cycle, the point C is -ve w.r.t.point B and hence the diode D2 does not conduct. Therefore i2=0.

On the negative half cycle the point C is +ve w.r.t. point B. hence the diode D2 conducts

and current i2 flows through RL. During this half cycle. The point A is –ve w.r.t.point B and

hence the diode D1 does not conduct. Therefore i1=0

Fig.(b) and (c) shows the waveforms of currents i1 and i2 .since both i1 and i2 flow

through the load RL, the current i through RL is i= i1+i2, which is obtained by adding the two

waveform and is shown in fig(d)

A

B

C

Vm

Vm

Ac supply

D1

D2

RLE

i1

i2Fig2 (a) Full wave rectifier circuit

Fig 7.3: the current waveforms of full wave rectifier

Advantages and disadvantages of full wave Rectifier:

(a) amount of ripple is much lower(r=0.482)as compared to half wave (r=1.21).

(b) Rectification efficiency is high (n=0.812)

(c) T.U.F is better (= 0.693) then that of half wave (=0.287).

(d) No problem of core saturation.

Wt

Wt

Wt

im

im

i1

i2

iim

idc

0

0

0

(b)

(c)

(d)

(e) Requires centre-tapped secondary of the transformer

Comparison of rectifier circuits:

Parameter

Type of Rectifier

Half wave full wave bridge

Number of diodes

1

2

3

PIV of diodes

Vm

2Vm

Vm

Secondary voltage

(rms)

V

V-0-V

V

Secondary voltage

Vm

V-0-V

Vm

D.C output voltage

Vm/

2Vm/

2Vm/

Vdc,at

no-load

0.318Vm

0.636Vm 0.636Vm

Ripple factor

1.21

0.482

0.482

Ripple

frequency

f

2f

2f

Rectification

efficiency

0.406

0.812

0.812

Transformer

Utilization

Factor(TUF)

0.287 0.693 0.812

Capacitor Filter:

We have seen that the ripple content in the rectified output of half wave rectifier is 121% or

that of full-wave or bridge rectifier or bridge rectifier is 48% such high percentages of ripples is

not acceptable for most of the applications. Ripples can be removed by one of the following

methods of filtering:

(a) A capacitor, in parallel to the load, provides a easier by –pass for the ripples voltage though it

due to low impedance

At ripple frequency and leave the d.c.to appears the load.

(b) An inductor, in series with the load, prevents the passage of the ripple current (due to high

impedance at ripple frequency) while allowing the d.c (due to low resistance to d.c)

(c) various combinations of capacitor and inductor,such as L-section filter section filter,

multiple section filter etc. which make use of both the properties mentioned in (a) and

(b) Above.

Two cases of capacitor filter, one applied on half wave rectifier and another with full wave rectifier.

Full-wave Rectifier with capacitor filter:

Fig 4(a) shows the circuit diagram, with a full wave rectifier comprising of a center-tapped

secondary winding and two diodes. All the analysis given in this section are also valid for a

bridge rectifier, which also gives full-wave rectification. The filter capacitor C is connected in

parallel with load resistance RL.

In a manner similar to half-wave circuit with capacitor filter, in this circuit also the capacitor

C will get charged during short periods and thereafter, discharge through the load resistance RL.

One notable difference here is that the discharge duration is shorter, whereas in half-wave case

the duration was longer due to the missing half –waves in between. As a result, the average value

of output voltage is higher.

Fig7.4 (a): full wave Rectifier with capacitor filter

D1

D2

RL C Vo

POWER SUPPLY

There are many types of power supply. Most are designed to convert high

voltage AC mains electricity to a suitable low voltage supply for electronics circuits and

other devices. A power supply can by broken down into a series of blocks, each of which

performs a particular function.

For example a 5V regulated supply:

Typical Power Supply Diagram

Each of the blocks is described in more detail below:

Vdc

wt0

Vr

Vm

Vo

Fig 7.5 : output voltage waveform and average voltage

Transformer: A transformer is an electrical device which is used to convert electrical power from

one Electrical circuit to another without change in frequency.

Transformers convert AC electricity from one voltage to another with

little loss of power. Transformers work only with AC and this is one of the reasons why

mains electricity is AC. Step-up transformers increase in output voltage, step-down

transformers decrease in output voltage. Most power supplies use a step-down

transformer to reduce the dangerously high mains voltage to a safer low voltage. The

input coil is called the primary and the output coil is called the secondary. There is no

electrical connection between the two coils; instead they are linked by an alternating

magnetic field created in the soft-iron core of the transformer. The two lines in the middle

of the circuit symbol represent the core. Transformers waste very little power so the

power out is (almost) equal to the power in. Note that as voltage is stepped down current

is stepped up. The ratio of the number of turns on each coil, called the turn’s ratio,

determines the ratio of the voltages. A step-down transformer has a large number of turns

on its primary (input) coil which is connected to the high voltage mains supply, and a

small number of turns on its secondary (output) coil to give a low output voltage.

An Electrical Transformer

Turns ratio = Vp/ VS = Np/NS

Power Out= Power In

VS X IS=VP X IP

Vp = primary (input) voltage

Np = number of turns on primary coil

Ip  = primary (input) current    

RECTIFIER:

A circuit which is used to convert a.c to dc is known as RECTIFIER. The process of conversion a.c to d.c is called “rectification”

TYPES OF RECTIFIERS:

Half wave Rectifier Full wave rectifier

1. Centre tap full wave rectifier.

2. Bridge type full bridge rectifier.

Comparison of rectifier circuits:

Parameter

Type of Rectifier

Half wave Full wave Bridge

Number of diodes

1

2

4

PIV of diodes

Vm

2Vm

Vm

D.C output voltage

Vm/

2Vm/

2Vm/

Vdc,at

no-load

0.318Vm

0.636Vm 0.636Vm

Ripple factor

1.21

0.482

0.482

Ripple

frequency

f

2f

2f

Rectification

efficiency 0.406 0.812 0.812

Transformer

Utilization

Factor(TUF)

0.287 0.693 0.812

RMS voltage Vrms Vm/2 Vm/√2 Vm/√2

Full-wave Rectifier:

From the above comparison we came to know that full wave bridge rectifier as more advantages

than the other two rectifiers. So, in our project we are using full wave bridge rectifier circuit.

Bridge Rectifier: A bridge rectifier makes use of four diodes in a bridge arrangement to

achieve full-wave rectification. This is a widely used configuration, both with individual

diodes wired as shown and with single component bridges where the diode bridge is

wired internally.

A bridge rectifier makes use of four diodes in a bridge arrangement as shown in fig (a) to

achieve full-wave rectification. This is a widely used configuration, both with individual diodes

wired as shown and with single component bridges where the diode bridge is wired internally.

Fig (A)

Operation:

During positive half cycle of secondary, the diodes D2 and D3 are in forward biased while D1

and D4 are in reverse biased as shown in the fig(b). The current flow direction is shown in the fig

(b) with dotted arrows.

Fig (B)During negative half cycle of secondary voltage, the diodes D1 and D4 are in forward biased

while D2 and D3 are in reverse biased as shown in the fig(c). The current flow direction is shown

in the fig (c) with dotted arrows.

Fig(C)

Filter:

A Filter is a device which removes the a.c component of rectifier output but

allows the d.c component to reach the load

Capacitor Filter:

We have seen that the ripple content in the rectified output of half wave rectifier is 121% or

that of full-wave or bridge rectifier or bridge rectifier is 48% such high percentages of ripples is

not acceptable for most of the applications. Ripples can be removed by one of the following

methods of filtering.

(a) A capacitor, in parallel to the load, provides an easier by –pass for the ripples voltage though

it due to low impedance. At ripple frequency and leave the D.C. to appear at the load.

(b) An inductor, in series with the load, prevents the passage of the ripple current (due to high

impedance at ripple frequency) while allowing the d.c (due to low resistance to d.c)

(c) Various combinations of capacitor and inductor, such as L-section filter section filter,

multiple section filter etc. which make use of both the properties mentioned in (a) and (b) above.

Two cases of capacitor filter, one applied on half wave rectifier and another with full wave

rectifier.

Filtering is performed by a large value electrolytic capacitor connected across the DC supply to act as a reservoir, supplying current to the output when the varying DC voltage from the rectifier is falling. The capacitor charges quickly near the peak of the varying DC, and then discharges as it supplies current to the output. Filtering significantly increases the average DC voltage to almost the peak value (1.4 × RMS value).

To calculate the value of capacitor(C),

C = ¼*√3*f*r*Rl

Where,

f = supply frequency,

r = ripple factor,

Rl = load resistance

Note: In our circuit we are using 1000µF hence large value of capacitor is placed to reduce ripples and to improve the DC component.

Regulator:

Voltage regulator ICs is available with fixed (typically 5, 12 and 15V) or variable output

voltages. The maximum current they can pass also rates them. Negative voltage regulators are

available, mainly for use in dual supplies. Most regulators include some automatic protection

from excessive current ('overload protection') and overheating ('thermal protection'). Many of the

fixed voltage regulators ICs have 3 leads and look like power transistors, such as the 7805 +5V

1A regulator shown on the right. The LM7805 is simple to use. You simply connect the positive

lead of your unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin,

connect the negative lead to the Common pin and then when you turn on the power, you get a 5

volt supply from the output pin.

Fig 6.1.6 A Three Terminal Voltage Regulator

78XX:

The Bay Linear LM78XX is integrated linear positive regulator with three terminals. The

LM78XX offer several fixed output voltages making them useful in wide range of applications.

When used as a zener diode/resistor combination replacement, the LM78XX usually results in an

effective output impedance improvement of two orders of magnitude, lower quiescent current.

The LM78XX is available in the TO-252, TO-220 & TO-263packages,

Features:

• Output Current of 1.5A

• Output Voltage Tolerance of 5%

• Internal thermal overload protection

• Internal Short-Circuit Limited

• Output Voltage 5.0V, 6V, 8V, 9V, 10V, 12V, 15V, 18V, 24V.

AT89S52

8-bit Microcontroller with 8K Bytes

In-System Programmable Flash

Features

• Compatible with MCS-51® Products

• 8K Bytes of In-System Programmable (ISP) Flash Memory

– Endurance: 1000 Write/Erase Cycles

• 4.0V to 5.5V Operating Range

• Fully Static Operation: 0 Hz to 33 MHz

• Three-level Program Memory Lock

• 256 x 8-bit Internal RAM

• 32 Programmable I/O Lines

• Three 16-bit Timer/Counters

• Eight Interrupt Sources

• Full Duplex UART Serial Channel

• Low-power Idle and Power-down Modes

• Interrupt Recovery from Power-down Mode

• Watchdog Timer

• Dual Data Pointer

• Power-off Flag

Description

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K bytes of in-

system programmable Flash memory. The device is manufactured using Atmel’s high-density

nonvolatile memory technology and is compatible with the industry- standard 80C51 instruction

set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or

by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-

system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful

microcontroller which provides a highly-flexible and cost-effective solution to many embedded

control applications. The AT89S52 provides the following standard features: 8K bytes of Flash,

256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit

timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip

oscillator,

and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to

zero frequency and supports two software selectable power saving modes. The Idle Mode stops

the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue

functioning. The Power-down mode saves the RAM contents but freezes the oscillator, disabling

all other chip functions until the next interrupt or hardware reset.

Pin Description

VCC

Supply voltage.

GND

Ground.

Port 0

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL

inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port

0 can also be configured to be the multiplexed low order address/data bus during accesses to

external program and data memory. In this mode, P0 has internal pullups. Port 0 also receives

the code bytes during Flash programming and outputs the code bytes during program

verification. External pullups are required during program verification.

Port 1

Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can

sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the

internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled

low will source current (IIL) because of the internal pullups. In addition, P1.0 and P1.1 can be

configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2

trigger input (P1.1/T2EX), respectively, as shown in the following table.

Port 1 also receives the low-order address bytes during Flash programming and verification.

Port 2

Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can

sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the

internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled

low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address

byte during fetches from external program memory and during accesses to external data

memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong

internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit

addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2

also receives the high-order address bits and some control signals during Flash programming

and verification.

Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can

sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the

internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled

low will source current (IIL) because of the pullups. Port 3 also serves the functions of various

special features of the AT89S52, as shown in the following table. Port 3 also receives some

control signals for Flash programming and verification.

RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the

device. This pin drives High for 96 oscillator periods after the Watchdog times out. The DISRTO

bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit

DISRTO, the RESET HIGH out feature is enabled.

ALE/PROG

Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during Flash

programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator

frequency and may be used for external

timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to

external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location

8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin

is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external

execution mode.

PSEN

Program Store Enable (PSEN) is the read strobe to external program memory. When the

AT89S52 is executing code from external program memory, PSEN is activated twice each

machine cycle, except that two PSEN activations are skipped during each access to external data

memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to fetch code

from external program memory locations starting at 0000H up to FFFFH. Note, however, that if

lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC

for internal program executions. This pin also receives the 12-volt programming enable voltage

(VPP) during Flash programming.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

Table 1. AT89S52 SFR Map and Reset Values

Special Function Registers

A map of the on-chip memory area called the Special Function Register (SFR) space is shown in

Table 1.

Note that not all of the addresses are occupied, and unoccupied addresses may not be

implemented on the chip. Read accesses to these addresses will in general return random data,

and write accesses will have an indeterminate effect. User software should not write 1s to these

unlisted locations, since they may be used in future products to invoke new features. In that

case, the reset or inactive values of the new bits will always be 0.

Timer 2 Registers: Control and status bits are contained in registers T2CON (shown in Table 2)

and T2MOD (shown in Table 3) for Timer 2. The register pair (RCAP2H, RCAP2L) are the

Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.

Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can

be set for each of the six interrupt sources in the IP register.

Dual Data Pointer Registers: To facilitate accessing both internal and external data memory, two

banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-83H and

DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1. The user should

always initialize the DPS bit to the appropriate value before accessing the respective Data

Pointer Register.

Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF is set

to “1” during power up. It can be set and rest under software control and is not affected by

reset.

Memory Organization

MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes

each of external Program and Data Memory can be addressed.

Program Memory

If the EA pin is connected to GND, all program fetches are directed to external memory. On the

AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are

directed to internal memory and fetches to addresses 2000H through FFFFH are to external

memory.

Data Memory

The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel

address space to the Special Function Registers. This means that the upper 128 bytes have the

same addresses as the SFR space but are physically separate from SFR space. When an

instruction accesses an internal location above

address 7FH, the address mode used in the instruction specifies whether the CPU accesses the

upper 128 bytes of RAM or the SFR space. Instructions which use direct addressing access of the

SFR space. For example, the following direct addressing instruction accesses the SFR at location

0A0H (which is P2).

MOV 0A0H, #data

Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the

following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at

address 0A0H, rather than P2 (whose address is 0A0H).

MOV @R0, #data

Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data

RAM are available as stack space.

Watchdog Timer

(One-time Enabled with Reset-out)

The WDT is intended as a recovery method in situations where the CPU may be subjected to

software upsets. The WDT consists of a 13-bit counter and the Watchdog Timer Reset (WDTRST)

SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write

01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is

enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout

period is dependent on the external

clock frequency. There is no way to disable the WDT except through reset (either hardware

reset or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH pulse at

the RST pin.

Using the WDT

To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR

location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EH and 0E1H

to WDTRST to avoid a WDT overflow. The 13-bit counter overflows when it reaches 8191

(1FFFH), and this will reset the device. When the WDT is enabled, it will increment every

machine cycle while the oscillator is running. This means the user must reset the WDT at least

every 8191 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST.

WDTRST is a write-only register. The WDT counter cannot

be read or written. When WDT overflows, it will generate an output RESET pulse at the RST pin.

The RESET pulse duration is 96xTOSC, where TOSC=1/FOSC. To make the best use of the WDT, it

should be serviced in those sections of code that will periodically be executed within the time

required to prevent a WDT reset.

WDT During Power-down and Idle

In Power-down mode the oscillator stops, which means the WDT also stops. While in Power-

down mode, the user does not need to service the WDT. There are two methods of exiting

Power-down mode: by a hardware reset or via a level-activated external interrupt which is

enabled prior to entering Power-down mode. When Power-down is exited with hardware reset,

servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting

Power-down with an interrupt is significantly different. The

interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought

high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt

pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the

WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To

ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to

reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the

WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if enabled.

The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT

from resetting the AT89S52 while in IDLE mode, the user

should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE

mode.

With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon

exit from IDLE.

UART

The UART in the AT89S52 operates the same way as the UART in the AT89C51 and AT89C52..

Timer 0 and 1

Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the

AT89C51 and AT89C52

Timer 2

Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The

type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three

operating modes: capture, auto-reload (up or down counting), and baud rate generator. The

modes are selected by bits in T2CON, as shown in Table 3. Timer 2 consists of two 8-bit registers,

TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a

machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.

In the Counter function, the register is incremented in response to a 1-to-0 transition at its

corresponding external input pin, T2. In this function, the external input is sampled during S5P2

of every machine cycle. When the samples show a high in one cycle and a low in the next cycle,

the count is incremented. The new count value appears in the register during S3P1 of the cycle

following the one in which the transition was detected. Since two machine cycles (24 oscillator

periods) are required to recognize a 1-to-0 transition,

the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is

sampled at least

once before it changes, the level should be held for at least one full machine cycle.

Capture Mode

In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a

16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be used to

generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1- to-0

transition at external input T2EX also causes the current value in TH2 and TL2 to be captured

into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in

T2CON to be set. The EXF2 bit,

like TF2, can generate an interrupt. The capture mode is illustrated in Figure 5.

Auto-reload (Up or Down Counter)

Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload

mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD

(see Table 4). Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When

DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.

Figure 6 shows Timer 2 automatically counting up when DCEN=0. In this mode, two options are

selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2

bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit

value in RCAP2H and RCAP2L. The values in Timer in Capture ModeRCAP2H and RCAP2L are

preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-

to-0 transition at external input T2EX. This transition also sets the EXF2 bit. Both the TF2 and

EXF2 bits can generate an interrupt if enabled.

Setting the DCEN bit enables Timer 2 to count up or down, as shown in Figure 6. In this mode,

the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count up. The

timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit value in

RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. A logic 0

at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values

stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded

into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can

be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt.

Baud Rate Generator

Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON (Table 2).

Note that the baud rates for transmit and receive can be different if Timer 2 is used for the

receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts

Timer 2 into its baud rate generator mode, as shown in Figure 8. The baud rate generator mode

is similar to the auto-reload

mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value

in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and 3

are determined by Timer 2’s overflow rate according to the following equation.

The Timer can be configured for either timer or counter operation. In most applications, it is

configured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2 when it is

used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12

the oscillator frequency). As a baud rate generator, however, it increments every state time (at

1/2 the oscillator frequency). The baud rate formula is given below.

where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned

integer.

Timer 2 as a baud rate generator is shown in Figure 8. This figure is valid only if RCLK or TCLK = 1

in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an interrupt. Note

too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not cause a reload from

(RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can

be used as

an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud

rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions,

the Timer is

incremented every state time, and the results of a read or write may not be accurate. The

RCAP2 registers may be read but should not be written to, because a write might overlap a

reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before

accessing the Timer 2 or RCAP2 registers.

Programmable Clock Out

A 50% duty cycle clock can be programmed to come out on P1.0, as shown in Figure 9. This pin,

besides being a regular I/O pin, has two alternate functions. It can be programmed to input the

external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4

MHz at a 16 MHz operating frequency. To configure the Timer/Counter 2 as a clock generator,

bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2)

starts and stops the timer. The clock-out frequency depends on the oscillator frequency and the

reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following equation.

In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar

to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate

generator and a clock generator simultaneously. Note, however, that the baud-rate and clock-

out frequencies cannot be determined independently from one another since they both use

RCAP2H and RCAP2L.

Interrupts

The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three

timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown

in Figure 10.

Each of these interrupt sources can be individually enabled or disabled by setting or clearing a

bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all

interrupts at once.

Note that Table 5 shows that bit position IE.6 is unimplemented. In the AT89S52, bit position

IE.5 is also unimplemented. User software should not write 1s to these bit positions, since they

may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2

and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the service

routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or

EXF2 that generated the interrupt, and that bit will have to be cleared in software. The Timer 0

and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The

values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at

S2P2 and is polled in the same cycle in which the timer overflows.

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be

configured for use as an on-chip oscillator, as shown in Figure 11. Either a quartz crystal or

ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should

be left unconnected while XTAL1 is driven, as shown in Figure 12. There are no requirements on

the duty cycle of the external clock signal, since the input to the internal clocking circuitry is

through a divide-by-two flip-flop, but minimum and maximum voltage high and low time

specifications must be observed.

Idle Mode

In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The

mode is invoked by software. The content of the on-chip RAM and all the special functions

registers remain unchanged during this mode. The idle mode can be terminated by any enabled

interrupt or by a hardware reset. Note that when idle mode is terminated by a hardware reset,

the device normally resumes program execution from where it left off, up to two machine cycles

before the internal reset algorithm takes control. On-chip hardware inhibits access to internal

RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an

unexpected write to a port pin when idle mode is terminated by a reset, the instruction

following the one that invokes idle mode should not write to a port pin or to external memory.

Power-down Mode

In the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-

down is the last instruction executed. The on-chip RAM and Special Function Registers retain

their values until the Power-down mode is terminated. Exit from Power-down mode can be

initiated either by a hardware reset or by an enabled external interrupt. Reset redefines the

SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is

restored to its normal operating level and must be held active long enough to allow the

oscillator to restart and stabilize.

Figure 11. Oscillator Connections

Program Memory Lock Bits

The AT89S52 has three lock bits that can be left unprogrammed (U) or can be programmed (P)

to obtain the additional features listed in the following table.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset.

If the device is powered up without a reset, the latch initializes to a random value and holds that

value until reset is activated. The latched value of EA must agree with the current logic level at

that pin in order for the device to function properly.

Programming the Flash – Parallel Mode

The AT89S52 is shipped with the on-chip Flash memory array ready to be programmed. The

programming interface needs a high-voltage (12-volt) program enable signal and is compatible

with conventional third-party Flash or EPROM programmers. The AT89S52 code memory array is

programmed byte-bybyte.

Programming Algorithm: Before programming the AT89S52, the address, data, and control

signals should be set up according to the Flash programming mode table and Figures 13 and 14.

To program the AT89S52, take the following

steps:

1. Input the desired memory location on the address lines.

2. Input the appropriate data byte on the data lines.

3. Activate the correct combination of control signals.

4. Raise EA/VPP to 12V.

5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write

cycle is

self-timed and typically takes no more than 50 μs. Repeat steps 1 through 5, changing the

address

and data for the entire array or until the end of the object file is reached.

Data Polling: The AT89S52 features Data Polling to indicate the end of a byte write cycle. During

a write cycle, an attempted read of the last byte written will result in the complement of the

written data on P0.7. Once the write cycle has been completed, true data is valid on all outputs,

and the next cycle may begin. Data Polling may begin any time after a write cycle has been

initiated.

Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output

signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY. P3.0 is pulled

high again when programming is done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data

can be read back via the address and data lines for verification. The status of the individual lock

bits can be verified directly by reading them back.

Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal

verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to a

logic low. The values returned are as follows.

(000H) = 1EH indicates manufactured by Atmel

(100H) = 52H indicates 89S52

(200H) = 06H

Chip Erase: In the parallel programming mode, a chip erase operation is initiated by using the

proper combination of control signals and by pulsing ALE/PROG low for a duration of 200 ns -

500 ns.

In the serial programming mode, a chip erase operation is initiated by issuing the Chip Erase

instruction. In this mode, chip erase is self-timed and takes about 500 ms. During chip erase, a

serial read from any address location will return 00H at the data output.

Programming the Flash – Serial Mode

The Code memory array can be programmed using the serial ISP interface while RST is pulled to

VCC. The serial interface consists of pins SCK, MOSI (input) and MISO (output). After RST is set

high, the Programming Enable instruction needs to be executed first before other operations

can be executed. Before a reprogramming sequence can occur, a Chip Erase operation is

required. The Chip Erase operation turns the content of every memory location in the Code

array into FFH. Either an external system clock can be supplied at pin XTAL1 or a crystal needs to

be connected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should

be less than 1/16 of the crystal frequency. With a 33 MHz oscillator clock, the maximum SCK

frequency is 2 MHz.

Serial Programming Algorithm

To program and verify the AT89S52 in the serial programming mode, the following sequence is

recommended:

1. Power-up sequence: Apply power between VCC and GND pins. Set RST pin to “H”.If a crystal is

not connected across pins XTAL1 and XTAL2, apply a 3 MHz to 33 MHz clock to XTAL1 pin and

wait for at least 10 milliseconds.

2. Enable serial programming by sending the Programming Enable serial instruction to pin

MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the

CPU clock at XTAL1 divided by 16.

3. The Code array is programmed one byte at a time by supplying the address and data together

with the

appropriate Write instruction. The write cycle is selftimed and typically takes less than 1 ms at

5V.

4. Any memory location can be verified by using the Read instruction which returns the content

at the

selected address at serial output MISO/P1.6.

5. At the end of a programming session, RST can be set low to commence normal device

operation.

Power-off sequence (if needed):

Set XTAL1 to “L” (if a crystal is not used).

Set RST to “L”.

Turn VCC power off.

Data Polling: The Data Polling feature is also available in the serial mode. In this mode, during a

write cycle an attempted read of the last byte written will result in the complement of the MSB

of the serial output byte on MISO.

Serial Programming Instruction Set

The Instruction Set for Serial Programming follows a 4-byte protocol and is shown in Table 10.

Programming Interface – Parallel Mode

Every code byte in the Flash array can be programmed by using the appropriate combination of

control signals. The write operation cycle is self-timed and once initiated, will automatically time

itself to completion. All major programming vendors offer worldwide support for the Atmel

microcontroller series. Please contact your local programming vendor for the appropriate

software revision.

After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to

clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster

than 1/16 of the system clock at XTAL1. For Page Read/Write, the data always starts from byte 0

to 255. After the command byte and upper address byte are latched, each byte thereafter is

treated as data until all 256

bytes are shifted in/out. Then the next instruction will be ready to be decoded.

MAX 232

Introduction:

Serial RS-232 (V.24) communication works with voltages (-15V ... -3V for high

[sic]) and +3V ... +15V for low [sic]) which are not compatible with normal computer

logic voltages. On the other hand, classic TTL computer logic operates between 0V ...

+5V (roughly 0V ... +0.8V for low, +2V ... +5V for high). Modern low-power logic

operates in the range of 0V ... +3.3V or even lower.

o, the maximum RS-232 signal levels are far too high for computer logic

electronics, and the negative RS-232 voltage for high . Therefore, to receive serial data

from an RS-232 interface the voltage has to be reduced, and the low and high voltage

level inverted. In the other direction (sending data from some logic over RS-232) the low

logic voltage has to be "bumped up", and a negative voltage has to be generated, too.

Logic Voltages

ll this can be done with conventional analog electronics, e.g. a particular power

supply and a couple of transistors or the once popular 1488 (transmitter) and 1489

(receiver) ICs. However, since more than a decade it has become standard in amateur

electronics to do the necessary signal level conversion with an integrated circuit (IC)

from the MAX232 family (typically a MAX232A or some clone). In fact, it is hard to

find some

The MAX232 & MAX232A

The MAX 232 translates RS232 voltages to TTL voltages. RS232 represent a binary 1

or HI anywhere between –3V to –12V, a zero logic or LOW, between 3V and 12V. TTL in the

other hand responds to 0 to 2.1V as logic zero and 2.8V to 5V as a HI. The MAX 232 provides

voltage translation so the TTL PIC 16F84 can understand the messages sent to it from the

computer. A serial cable is also provided to connect the MAX232 to the PC and jumper cables to

connect the MAX232 to the micro controller.

The MAX232 from Maxim was the first IC which in one package contains the

necessary drivers (two) and receivers (also two), to adapt the RS-232 signal voltage

levels to TTL logic. It became popular, because it just needs one voltage (+5V) and

generates the necessary RS-232 voltage levels (approx. -10V and +10V) internally. This

greatly simplified the design of circuitry. Circuitry designers no longer need to design

and build a power supply with three voltages (e.g. -12V, +5V, and +12V), but could just

provide one +5V power supply, e.g. with the help of a simple 78x05 voltage converter.

MAX232 (A) DIP Package

DIP Package of MAX 232A

A Typical Application

The MAX232(A) has two receivers (converts from RS-232 to TTL voltage levels) and

two drivers (converts from TTL logic to RS-232 voltage levels). This means only two of

the RS-232 signals can be converted in each direction. The old MC1488/1498 combo

provided four drivers and receivers.

Typically a pair of a driver/receiver of the MAX232 is used for

TX and RX and the second one for

CTS and RTS.

There are not enough drivers/receivers in the MAX232 to also connect the DTR, DSR,

and DCD signals. Usually these signals can be omitted when e.g. communicating with a

PC's serial interface. If the DTE really requires these signals either a second MAX232 is

needed, or some other IC from the MAX232 family can be used (if it can be found in

consumer electronic shops at all). An alternative for DTR/DSR is also given below.

Maxim's data sheet explains the MAX232 family in great detail, including the pin

configuration and how to connect such an IC to external circuitry. This information can

be used as-is in own design to get a working RS-232 interface. Maxim's data just misses

one critical piece of information: How exactly to connect the RS-232 signals to the IC. So

here is one possible example:

MAX232 to RS232 DB9 Connection as a DCE

MAX232 Pin Nbr. MAX232 Pin Name Signal Voltage DB9 Pin

7 T2out CTS RS-232 7

8 R2in RTS RS-232 8

9 R2out RTS TTL n/a

10 T2in CTS TTL n/a

11 T1in TX TTL n/a

12 R1out RX TTL n/a

13 R1in RX RS-232 2

14 T1out TX RS-232 3

15 GND GND 0 5

Connections between MAX 232 & RS 232

In addition one can directly wire DTR (DB9 pin 4) to DSR (DB9 pin 6) without going

through any circuitry. This gives automatic (brain dead) DSR acknowledgement of an

incoming DTR signal.

Sometimes pin 6 of the MAX232 is hard wired to DCD (DB9 pin 1). This is not

recommended. Pin 6 is the raw output of the voltage pump and inverter for the -10V

voltage. Drawing currents from the pin leads to a rapid breakdown of the voltage, and as

a consequence to a breakdown of the output voltage of the two RS-232 drivers. It is better

to use software which doesn't care about DCD, but does hardware-handshaking via

CTS/RTS only. The circuitry is completed by connecting five capacitors to the IC as it

follows. The MAX232 needs 1.0µF capacitors, the MAX232A needs 0.1µF capacitors.

MAX232 clones show similar differences. It is recommended to consult the

corresponding data sheet. At least 16V capacitor types should be used. If electrolytic or

tantalic capacitors are used, the polarity has to be observed. The first pin as listed in the

following table is always where the plus pole of the capacitor should be connected to.

External Capacitors The 5V power supply is connected to+5V: Pin 16 GND: Pin 15

MAX232(A) external Capacitors

Capacitor + Pin - Pin Remark

C1 1 3

C2 4 5

C3 2 16

C4 GND 6

This looks non-intuitive, but because pin 6 is

on -10V, GND gets the + connector, and not the

-

C5 16 GND

Drawbacks of MAX232:

The MAX-232 chip receives data from the receiver, and converts it to the standard RS-

232 data format that can be read in by a serial port on a personal computer or

workstation.

For the RS-232 interface, a standard MAX232 chip is used for level conversion. Both use

the on chip USART and thus the same firmware.

CONNECTIONS IN MAX 232:

If you wanted to do a general RS-232 connection, you could take a bunch

of long wires and solder them directly to the electronic circuits of the equipment you are

using, but this tends to make a big mess and often those solder connections tend to break

and other problems can develop. To deal with these issues, and to make it easier to setup

or take down equipment, some standard connectors have been developed that is

commonly found on most equipment using the RS-232 standards.

These connectors come in two forms: A male and a female connector. The female

connector has holes that allow the pins on the male end to be inserted into the connector.

This is a female "DB-9" connector (properly known as DE9F):

Fig.6.5.1 Female Connector

The female DB-9 connector is typically used as the "plug" that goes into a typical PC. If

you see one of these on the back of your computer, it is likely not to be used for serial

communication, but rather for things like early VGA or CGA monitors (not SVGA) or

for some special control/joystick equipment.

And this is a male "DB-9" connector (properly known as DE9M):

Fig 6.5.2 Male Connector

This is the connector that you are more likely to see for serial communications on a

"generic" PC. Often you will see two of them side by side (for COM1 and COM2).

Special equipment that you might communicate with would have either connector, or

even one of the DB-25 connectors listed below.

The wiring of RS-232 devices involves first identifying the actual pins that are being

used. Here is how a female DB-9 connector is numbered:

If the numbers are hard to read, it starts at the top-right corner as "1", and goes left until

the end of the row and then starts again as pin 6 on the next row until you get to pin 9 on

the bottom-left pin. "Top" is defined as the row with 5 pins.

The male connector (like what you have on your PC) is simply this same order, but

reversed from right to left.

Here each pin is usually defined as:

9-pin 25-pin pin definition

1 8 DCD (Data Carrier Detect)

2 3 RX (Receive Data)

3 2 TX (Transmit Data)

4 20 DTR (Data Terminal Ready)

5 7 GND (Signal Ground)

6 6 DSR (Data Set Ready)

7 4 RTS (Request To Send)

8 5 CTS (Clear To Send))

9 22 RI (Ring Indicator)

Tab 6.5.4 Pin Definition of Connectors

One thing to keep in mind when discussing these pins and their meaning is that they are

very closely tied together with modems and modem protocols. Often you don't have a

modem attached in the loop, but you still treat the equipment as if it were a modem on a

theoretical level.

BAUD RATES:

I'm going to go on a bit of a rant here. Baud and BPS (Bits Per Second) are usually not

the same thing, although they are often used interchangeable, particular in marketing

literature. Only originally they were the same. There are several ways to determine what

the actual data rate of a particular piece of equipment is, but in popular marketing

literature, or even general reference texts, they will almost always refer to "Baud Rate",

even if they are referring to bits per second.

Language purists and engineers who know what they are talking about will go into a

more literal definition of Baud meaning the number of changes to the transmission media

per second in a modulated signal. If each transmission event contains more than one bit

of information, than Baud and BPS are not the same. E.g. if each event contains two bits

(two bits modulated in an event), then the BPS of such a transmission would be twice as

large as the Baud rate. This is not a theoretical case. Typical "high speed" modems use

sophisticated modulation on the telephone line, were the bit rate and Baud rate differ

significantly on the line. It is important to know this when you build measurement

equipment, decoders (demodulators), encoders (modulators), and all sorts of transmission

equipment for a particular protocol.

However, software developers typically like to ignore the difference of bit rate and baud

rate, because in their small world, a bit can either have the value true or false - an "event"

(a bit) always only has two possible states. They have no basic unit which can e.g. hold

four different states. In other words, on the software site the modulation has already been

flattened by the demodulator. If a modulation was used which can e.g. transmit 8 bits in

an event, the software developer sees them already as a series of 8 consecutive bits, each

either true or false. The demodulator took care of that. When it got an event it turned the

single 8-bit event into eight single-bit events. Software developers don't see the original

single entity with 256 different states (voltages, phases). Since the modulation has been

flattened they don't experience the difference between Baud rate and bit rate any more.

This is not the fault of the people who defined a Baud or a BPS. It is just a (welcome)

limitation of digital computer hardware.

Baud is actually a shortened term named in honor of Émile Baudot, a French inventor of

early teleprinter machines that replaced the telegraph key using Morse Code. Basically

two typewriters that could be connected to each other with some wires. He came up with

some of the first digital character encoding schemes, and the character codes were

transmitted with a serial data connection. Keep in mind this was being done largely

before computers were invented. Indeed, some of these early tele-printer devices were

connected to the very first computers like the ENIAC or UNIVAC, simply because they

were relatively cheap and mass produced at that point.

In order for serial data communication to happen, you need to agree on a clock signal, or

baud rate, in order to get everything to be both transmitted and received properly. This is

where the language purists get into it, because it is this clock signal that actually drives

the "baud rate". Let's start more at

Tele printers evolved, and eventually you have Western Union sending tele-

printer "cablegrams" all around the world. If you hear of a TELEX number, this is the

relic of this system, which is still in use at the present time, even with the internet. By

rapidly glossing over a whole bunch of interesting history, you end up with the United

States Department of Justice (DOJ) in a lawsuit with AT&T. Mind you this was an earlier

anti-trust lawsuit prior to the famous/infamous 1982 settlement. The reason this is

important is because the DOJ insisted that Western Union got all of the digital business

(cable grams... and unfortunately this got to be read as computer equipment as well), and

AT&T got modulated frequencies, or in other words, you could talk to your mother on

Mother's Day on their equipment. When computers were being built in the 1950s, people

wanted some way to connect different pieces of computer equipment together to "talk" to

each other. This finally resulted in the RS-232 standard that we are discussing on this

page.

While Western Union was permitted to carry digital traffic, often the connections weren't

in or near computer centers. At this time AT&T found a loophole in the anti-trust

settlement that could help get them into the business of being a "carrier" of computer

data. They were also offering to transmit computer data at rates considerably cheaper

than Western Union was going to charge. Hence, the modem was born.

Interrupts:

As the name implies, an interrupt is some event which interrupts normal program

execution. As stated earlier, program flow is always sequential, being altered only by those

instructions which expressly cause program flow to deviate in some way. However, interrupts

give us a mechanism to "put on hold" the normal program flow, execute a subroutine, and then

resume normal program flow as if we had never left it. This subroutine, called an interrupt

handler, is only executed when a certain event (interrupt) occurs. The event may be one of the

timers "overflowing," receiving a character via the serial port, transmitting a character via the

serial port, or one of two "external events." The 8051 may be configured so that when any of

these events occur the main program is temporarily suspended and control passed to a special

section of code which presumably would execute some function related to the event that

occurred. Once complete, control would be returned to the original program. The main program

never even knows it was interrupted.

The ability to interrupt normal program execution when certain events occur makes it

much easier and much more efficient to handle certain conditions. If it were not for interrupts we

would have to manually check in our main program whether the timers had overflows, whether

we had received another character via the serial port, or if some external event had occurred.

Besides making the main program ugly and hard to read, such a situation would make our

program inefficient since we’d be burning precious "instruction cycles" checking for events that

usually don’t happen.

We can configure the 8051 so that any of the following events will cause an interrupt:

• Timer 0 Overflow.

• Timer 1 Overflow.

• Reception/Transmission of Serial Character.

• External Event 0.

• External Event 1.

Obviously we need to be able to distinguish between various interrupts and executing

different code depending on what interrupt was triggered. This is accomplished by jumping to a

fixed address when a given interrupt occurs as shown below.

By consulting the above chart we see that whenever Timer 0 overflows (i.e., the TF0 bit is set),

the main program will be temporarily suspended and control will jump to 000BH. It is assumed

that we have code at address 000BH that handles the situation of Timer 0 overflowing.

Setting up Interrupts:

By default at power up, all interrupts are disabled. This means that even if, for example,

the TF0 bit is set, the 8051 will not execute the interrupt. Your program must specifically tell the

8051 that it wishes to enable interrupts and specifically which interrupts it wishes to enable.

Your program may enable and disable interrupts by modifying the IE SFR (A8h):

As you can see, each of the 8051’s interrupts has its own bit in the IE SFR. You enable a given

interrupt by setting the corresponding bit.

However, before enabling any interrupt, you must set bit 7 of IE. Bit 7, the Global

Interrupt Enable/Disable, enables or disables all interrupts simultaneously. That is to say, if bit 7

is cleared then no interrupts will occur, even if all the other bits of IE are set. Setting bit 7 will

enable all the interrupts that have been selected by setting other bits in IE. This is useful in

program execution if you have time-critical code that needs to execute. In this case, you may need

the code to execute from start to finish without any interrupt getting in the way. To accomplish

this you can simply clear bit 7 of IE (CLR EA) and then set it after your time-critical code is

done.

Interrupt priorities:

The 8051 automatically evaluates whether an interrupt should occur after every

instruction. When checking for interrupt conditions, it checks them in the following order:

• External 0 Interrupt

• Timer 0 Interrupt

• External 1 Interrupt

• Timer 1 Interrupt

• Serial Interrupt

This means that if a Serial Interrupt occurs at the exact same instant that an External 0 Interrupt

occurs, the External 0 Interrupt will be executed first and the Serial Interrupt will be executed

once the External 0 Interrupt has completed.

The 8051 offers two levels of interrupt priority: high and low. By using interrupt

priorities you may assign higher priority to certain interrupt conditions. Interrupt priorities are

controlled by the IP SFR (B8h). The IP SFR has the following format:

When considering interrupt priorities, the following rules apply:

Nothing can interrupt a high-priority interrupt--not even another high priority interrupt.

A high-priority interrupt may interrupt a low-priority interrupt.

A low-priority interrupt may only occur if no other interrupt is l ready executing.

If two interrupts occur at the same time, the interrupt with higher priority will execute

first. If both interrupts are of the same priority the interrupt which is serviced first by

polling sequence will be executed first.

When an interrupt is triggered, the following actions are taken automatically by the

microcontroller:

The current Program Counter is saved on the stack, low-byte first.

Interrupts of the same and lower priority are blocked.

In the case of Timer and External interrupts, the corresponding interrupt flag is cleared.

Program execution transfers to the corresponding interrupt handler vector

address.

The Interrupt Handler Routine executes.

Take special note of the third step: If the interrupt being handled is a Timer or External

interrupt, the microcontroller automatically clears the interrupt flag before passing control to your

interrupt handler routine. This means it is not necessary that you clear the bit in your code.

Liquid crystal display

Liquid crystal displays (LCDs) have materials, which combine the properties of

both liquids and crystals. Rather than having a melting point, they have a temperature

range within which the molecules are almost as mobile as they would be in a liquid, but

are grouped together in an ordered form similar to a crystal.

An LCD consists of two glass panels, with the liquid crystal material sand witched in

between them. The inner surface of the glass plates are coated with transparent electrodes

which define the character, symbols or patterns to be displayed polymeric layers are present in

between the electrodes and the liquid crystal, which makes the liquid crystal molecules to

maintain a defined orientation angle.

One each polarisers are pasted outside the two glass panels. These polarisers would

rotate the light rays passing through them to a definite angle, in a particular direction.

When the LCD is in the off state, light rays are rotated by the two polarisers and the

liquid crystal, such that the light rays come out of the LCD without any orientation, and hence

the LCD appears transparent.

When sufficient voltage is applied to the electrodes, the liquid crystal molecules would

be aligned in a specific direction. The light rays passing through the LCD would be rotated by the

polarisers, which would result in activating/ highlighting the desired characters.

The LCD’s are lightweight with only a few millimeters thickness. Since the LCD’s

consume less power, they are compatible with low power electronic circuits, and can be

powered for long durations.

The LCD’s don’t generate light and so light is needed to read the display. By using

backlighting, reading is possible in the dark. The LCD’s have long life and a wide operating

temperature range.

Changing the display size or the layout size is relatively simple which makes the LCD’s

more customers friendly.

The LCDs used exclusively in watches, calculators and measuring instruments are the

simple seven-segment displays, having a limited amount of numeric data. The recent advances

in technology have resulted in better legibility, more information displaying capability and a

wider temperature range. These have resulted in the LCDs being extensively used in

telecommunications and entertainment electronics. The LCDs have even started replacing the

cathode ray tubes (CRTs) used for the display of text and graphics, and also in small TV

applications.

This section describes the operation modes of LCD’s then describe how to program and

interface an LCD to 8051 using Assembly and C.

LCD operationIn recent years the LCD is finding widespread use replacing LEDs(seven-segment LEDs or

other multisegment LEDs).This is due to the following reasons:

1. The declining prices of LCDs.

2. The ability to display numbers, characters and graphics. This is in

contract to LEDs, which are limited to numbers and a few characters.

3. Incorporation of a refreshing controller into the LCD, there by

relieving the CPU of the task of refreshing the LCD. In the contrast,

the LED must be refreshed by the CPU to keep displaying the data.

4. Ease of programming for characters and graphics.

LCD pin description The LCD discussed in this section has 14 pins. The function of each pins is given in table.

TABLE 1:Pin description for LCD:

Pin symbol I/O Description

1 Vss -- Ground

2 Vcc -- +5V power supply

3 VEE -- Power supply to

control contrast

4 RS I RS=0 to select

command register

RS=1 to select

data register

5 R/W I R/W=0 for write

R/W=1 for read

6 E I/O Enable

7 DB0 I/O The 8-bit data bus

8 DB1 I/O The 8-bit data bus

9 DB2 I/O The 8-bit data bus

10 DB3 I/O The 8-bit data bus

11 DB4 I/O The 8-bit data bus

12 DB5 I/O The 8-bit data bus

13 DB6 I/O The 8-bit data bus

14 DB7 I/O The 8-bit data bus

TABLE 2: LCD Command Codes Code

(hex)

Command to LCD Instruction

Register

1 Clear display screen

2 Return home

4 Decrement cursor

6 Increment cursor

5 Shift display right

7 Shift display left

8 Display off, cursor off

A Display off, cursor on

C Display on, cursor off

E Display on, cursor on

F Display on, cursor blinking

10 Shift cursor position to left

14 Shift cursor position to right

18 Shift the entire display to the left

1C Shift the entire display to the right

80 Force cursor to beginning of 1st line

C0 Force cursor to beginning of 2nd line

38 2 lines and 5x7 matrix

Uses:

The LCDs used exclusively in watches, calculators and measuring instruments are

the simple seven-segment displays, having a limited amount of numeric data. The recent

advances in technology have resulted in better legibility, more information displaying capability

and a wider temperature range. These have resulted in the LCDs being extensively used in

telecommunications and entertainment electronics. The LCDs have even started replacing the

cathode ray tubes (CRTs) used for the display of text and graphics, and also in small TV

applications.

LCD INTERFACING

Sending commands and data to LCDs with a time delay:

Fig 21: Interfacing of LCD to a micro controller

To send any command from table 2 to the LCD, make pin RS=0.

for data, make RS=1.Then send a high –to-low pulse to the E pin to enable the internal latch of the LCD.

DIFFERENT TYPES OF MOTORS:

Figure 1

In figure1 different types of motors is there in this we are using EG-530AD-2B motor i.e. mentioned in the below.

DC MOTOR(EG-530AD-2B):

Vendor NMB Technologies Corporation

Category Fans, Thermal Management

Voltage - Rated 12VDC

Power (Watts) 1.08W

Bearing Type Ball

Size / Dimension Square - 70mm L x 70mm H x 25mm W

Air Flow 19.0 CFM (0.538m³/min)

Features -

Termination 2 Wire Leads

Fan Type Tubeaxial

Noise 21.5 dB

RPM 2400 RPM

Static Pressure 0.072 in H2O (17.9 Pa)

Weight 0.159 lb (72.12g)

Current Rating 90mA

Voltage Range 6 ~ 13.8VDC

Operating Temperature 14 ~ 158°F (-10 ~ 70°C)

Life Expectancy 70000 hrs @ 25°C

Lead Free Status Lead Free

RoHS Status RoHS Compliant

Other Names 2810KL 04W B10 P002810KL04WB10P00

Applications: Cassette, CD Player, CD-ROM, VCD, DVD, DV-ROM .

Working procedure for dc motor :

DC motors are configured in many types and sizes, including brush less, servo, and

gear motor types. A motor consists of a rotor and a permanent magnetic field stator. The

magnetic field is maintained using either permanent magnets or electromagnetic windings. DC

motors are most commonlyusedinvariablespeedandtorque.

Motion and controls cover a wide range of components that in some way are used

to generate and/or control motion. Areas within this category include bearings and bushings,

clutches and brakes, controls and drives, drive components, encoders and resolves, Integrated

motion control, limit switches, linear actuators, linear and rotary motion components, linear

position sensing, motors (both AC and DC motors), orientation position sensing, pneumatics and

pneumatic components, positioning stages, slides and guides, power transmission (mechanical),

seals, slip rings, solenoids, springs.

Motors are the devices that provide the actual speed and torque in a drive

system. This family includes AC motor types (single and multiphase motors, universal, servo

motors, induction, synchronous, and gear motor) and DC motors (brush less, servo motor, and

gear motor) as well as linear, stepper and air motors, and motor contactors and starters.

In any electric motor, operation is based on simple electromagnetism. A current-

carrying conductor generates a magnetic field; when this is then placed in an external magnetic

field, it will experience a force proportional to the current in the conductor, and to the strength

of the external magnetic field. As you are well aware of from playing with magnets as a kid,

opposite (North and South) polarities attract, while like polarities (North and North, South and

South) repel. The internal configuration of a DC motor is designed to harness the magnetic

interaction between a current-carrying conductor and an external magnetic field to generate

rotational motion.

Let's start by looking at a simple 2-pole DC electric motor (here red represents a magnet

or winding with a "North" polarization, while green represents a magnet or winding with a

"South" polarization).

Fig 25: Block Diagram of the DC motor

Every DC motor has six basic parts -- axle, rotor (a.k.a., armature), stator, commutator,

field magnet(s), and brushes. In most common DC motors (and all that Beamers will see), the

external magnetic field is produced by high-strength permanent magnets1. The stator is the

stationary part of the motor -- this includes the motor casing, as well as two or more permanent

magnet pole pieces. The rotor (together with the axle and attached commutator) rotates with

respect to the stator. The rotor consists of windings (generally on a core), the windings being

electrically connected to the commutator. The above diagram shows a common motor layout --

with the rotor inside the stator (field) magnets.

The geometry of the brushes, commutator contacts, and rotor windings are such

that when power is applied, the polarities of the energized winding and the stator

magnet(s) are misaligned, and the rotor will rotate until it is almost aligned with the

stator's field magnets. As the rotor reaches alignment, the brushes move to the next

commutator contacts, and energize the next winding. Given our example two-pole motor,

the rotation reverses the direction of current through the rotor winding, leading to a "flip"

of the rotor's magnetic field, and driving it to continue rotating.

In real life, though, DC motors will always have more than two poles (three is a very

common number). In particular, this avoids "dead spots" in the commutator. You can imagine

how with our example two-pole motor, if the rotor is exactly at the middle of its rotation

(perfectly aligned with the field magnets), it will get "stuck" there. Meanwhile, with a two-pole

motor, there is a moment where the commutator shorts out the power supply (i.e., both

brushes touch both commutator contacts simultaneously). This would be bad for the power

supply, waste energy, and damage motor components as well. Yet another disadvantage of such

a simple motor is that it would exhibit a high amount of torque” ripple" (the amount of torque it

could produce is cyclic with the position of the rotor).

Fig 26: Block Diagram of the DC motor having two poles only

So since most small DC motors are of a three-pole design, let's tinker with the

workings of one via an interactive animation (JavaScript required):

Fig 27: Block Diagram of the DC motor having Three poles

You'll notice a few things from this -- namely, one pole is fully energized at a time (but

two others are "partially" energized). As each brush transitions from one commutator contact to

the next, one coil's field will rapidly collapse, as the next coil's field will rapidly charge up (this

occurs within a few microsecond). We'll see more about the effects of this later, but in the

meantime you can see that this is a direct result of the coil windings' series wiring:

Fig 28: Internal Block Diagram of the Three pole DC motor

There's probably no better way to see how an average dc motor is put together, than by

just opening one up. Unfortunately this is tedious work, as well as requiring the destruction of a

perfectly good motor. This is a basic 3-pole dc motor, with 2 brushes and three commutator

contacts.

GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS

Definition:

Global system for mobile communication (GSM) is a globally accepted standard for

digital cellular communication. GSM is the name of a standardization group established

in 1982 to create a common European mobile telephone standard that would formulate

specifications for a pan-European mobile cellular radio system operating at 900 MHz. It

is estimated that many countries outside of Europe will join the GSM partnership.

Description:

GSM, the Global System for Mobile communications, is a digital cellular

communications system, which has rapidly gained acceptance and market share

worldwide, although it was initially developed in a European context. In addition to

digital transmission, GSM incorporates many advanced services and features, including

ISDN compatibility and worldwide roaming in other GSM networks. The advanced

services and architecture of GSM have made it a model for future third-generation

cellular systems, such as UMTS. This paper will give an overview of the services offered

by GSM, the system architecture, the radio transmission

Fig 15: structure of a GSM network

GSM Modems

A GSM modem can be an external modem device, such as the Wavecom FASTRACK

Modem. Insert a GSM SIM card into this modem, and connect the modem to an

available serial port on your computer.

A GSM modem can be a PC Card installed in a notebook computer, such as the Nokia

Card Phone.

A GSM modem could also be a standard GSM mobile phone with the appropriate cable

and software driver to connect to a serial port on your computer. Phones such as the

Nokia 7110 with a DLR-3 cable, or various Ericsson phones, are often used for this

purpose.

A dedicated GSM modem (external or PC Card) is usually preferable to a GSM mobile

phone. This is because of some compatibility issues that can exist with mobile phones.

For example, if you wish to be able to receive inbound MMS messages with your

gateway, and you are using a mobile phone as your modem, you must utilize a mobile

phone that does not support WAP push or MMS. This is because the mobile phone

automatically processes these messages, without forwarding them via the modem

interface. Similarly some mobile phones will not allow you to correctly receive SMS text

messages longer than 160 bytes (known as “concatenated SMS” or “long SMS”). This is

because these long messages are actually sent as separate SMS messages, and the phone

attempts to reassemble the message before forwarding via the modem interface. (We’ve

observed this latter problem utilizing the Ericsson R380, while it does not appear to be a

problem with many other Ericsson models.)

When you install your GSM modem, or connect your GSM mobile phone to the

computer, be sure to install the appropriate Windows modem driver from the device

manufacturer. To simplify configuration, the Now SMS/MMS Gateway will

communicate with the device via this driver. An additional benefit of utilizing this driver

is that you can use Windows diagnostics to ensure that the modem is communicating

properly with the computer.

The Now SMS/MMS gateway can simultaneously support multiple modems, provided

that your computer hardware has the available communications port resources.

Fig:16 GSM smart modem

SMART MODEM (GSM/GPRS)SMART MODEM (GSM/GPRS)

INTRODUCTION :

Analogic’s GSM Smart Modem is a multi-functional, ready to use, rugged and versatile

modem that can be embedded or plugged into any application. The Smart Modem can be

customized to various applications by using the standard AT commands. The modem is

fully type-approved and can directly be integrated into your projects with any or all the

features of Voice, Data, Fax, SMS, and Internet etc.

Smart Modem kit contain the following items:

Analogic’s GSM/GPRS Smart Modem

SMPS based power supply adapter.

3 dBi antenna with cable (optional: other types)

Data cable (RS232)

User Manual

PRODUCT DESCRIPTION:

The connectors integrated to the body, guarantee the reliable output and input

connections. An extractible holder is used to insert the SIM card (Micro-SIM type).

Status LED indicates the operating mode.

Fig 17: Block diagram of modem with key connections

Physical Characteristics

Dimensions 100 x 78 x 32 mm (excluding connectors)

Weight 125 grams

Housing Aluminum Profiled

Temperature Range:

Operating temperature: from -200C to +550C

Storage temperature: from -250C to +700C

Fig 18: Internal diagram of GSM modem

Installing the modem:

To install the modem, plug the device on to the supplied SMPS Adapter. For Automotive

applications fix the modem permanently using the mounting slots (optional as per your

requirement dimensions).

Inserting/ Removing the SIM Card:

To insert or Remove the SIM Card, it is necessary to press the SIM holder ejector button

with Sharp edged object like a pen or a needle. With this, the SIM holder comes out a

little, then pulls it out and insert or remove the SIM Card

Fig 19: Inserting/Removing the sim card into the modem

Make sure that the ejector is pushed out completely before accessing the SIM Card holder

do not remove the SIM card holder by force or tamper it (it may permanently damage).

Place the SIM Card Properly as per the direction of the installation. It is very important

that the SIM is placed in the right direction for its proper working condition

Connecting External Antenna:

Connect GSM Smart Modem to the external antenna with cable end with SMA male. The

Frequency of the antenna may be GSM 900/1800 MHz. The antenna may be ( 0 dbi, 3

dbi or short length L-type antenna) as per the field conditions and signal conditions.

DC Supply Connection

The Modem will automatically turn ON when connection is given to it. The following is

the Power Supply Requirement:

Parameters MIN Avg Max

Supply Voltage 5 V 9 V 12 V

Peak Current at 5 V supply 1.8 A (during

transmission)

Average Current at 5 V supply in idle

Mode

35 mA

Average Current at 5 V supply in idle

Mode and RS232 Power Saving

Activated

13 mA

Connecting Modem to external devices:

RS232 can be used to connect to the external device through the D-SUB/ USB (for USB

model only) device that is provided in the modem.

Connectors:

Connector Function

SMA RF Antenna connector

15 pin or 9 pin D-SUB USB (optional) RS232 link Audio link (only for 15 D-

SUB) Reset (only for 15 D-SUB) USB

communication port (optional)

2 pin Phoenix tm Power Supply Connector

SIM Connector SIM Card Connection

RJ11 (For 9 D-SUB and USB only) Audio link Simple hand set connection

(4 wire) 2 wire desktop phone

connection

Description of the interfaces:

The modem comprises several interfaces:

LED Function including operating Status

External antenna (via SMA)

Serial and control link

Power Supply (Via 2 pin Phoenix tm contact)

SIM card holder

LED Status Indicator:

The LED will indicate different status of the modem:

OFF Modem Switched off

ON Modem is connecting to the network

Flashing Slowly Modem is in idle mode

Flashing rapidly Modem is in transmission/communication (GSM only)

9 - PIN D-SUB Female Connector

PIN NAME Designation Type

1 X None NC NC

2 TX Transmit Data Input

3 Rx Receive Data Output

4 DSR Data Set Ready Output

5 GND Ground Ground

6 DTR Data Terminal Ready Input

7 CTS Clear to send Output

8 RTS Request to send Input

9 X None NC NC

Protecting Modem:

Do not expose to the modem to extreme conditions such as High temperatures, direct sunlight,

High Humidity, Rain, Chemicals, Water, Dust etc. For these details see the specifications given.

Do not drop, Shake or hit the Modem. (Warranty may void)

The Modem should not be used in extreme vibrating conditions

Handle the Antenna and cable with care.

AT commands features:

Line settings:

A serial link handler is set with the following default values Autobaud, 8 bits data, 1 stop bit, no

parity, flow control.

Command line

Commands always start with AT (which means attention) and finish with a <CR> character.

Information responses and result codes

Responses start and end with <CR><LF>,.

If command syntax is incorrect, an ERROR string is returned.

If command syntax is correct but with some incorrect parameters, the +CME ERROR: <Err> or

+CMS ERROR: <SmsErr> strings are returned with different error codes.

If the command line has been performed successfully, an OK string is returned.

In some cases, such as “AT+CPIN?” or (unsolicited) incoming events, the product does not return

the OK string as a response.

Services provided by GSM

GSM was designed having interoperability with ISDN in mind, and the services provided by

GSM are a subset of the standard ISDN services. Speech is the most basic, and most important,

teleservice provided by GSM.

In addition, various data services are supported, with user bit rates up to 9600 bps. Specially

equipped GSM terminals can connect with PSTN, ISDN, Packet Switched and Circuit Switched

Public Data Networks, through several possible methods, using synchronous or asynchronous

transmission. Also supported are Group 3 facsimile service, videotex, and teletex. Other GSM

services include a cell broadcast service, where messages such as traffic reports, are broadcast to

users in particular cells.

A service unique to GSM, the Short Message Service, allows users to send and receive point-to-

point alphanumeric messages up to a few tens of bytes. It is similar to paging services, but much

more comprehensive, allowing bi-directional messages, store-and-forward delivery, and

acknowledgement of successful delivery.

Supplementary services enhance the set of basic teleservices. In the Phase I specifications,

supplementary services include variations of call forwarding and call barring, such as Call

Forward on Busy or Barring of Outgoing International Calls. Many more supplementary services,

including multiparty calls, advice of charge, call waiting, and calling line identification

presentation will be offered in the Phase 2 specifications.

Architecture of the GSM network

A GSM network is composed of several functional entities, whose functions and interfaces are

specified. Figure 1 shows the layout of a generic GSM network. The GSM network can be

divided into three broad parts. The Mobile Station is carried by the subscriber. The Base Station

Subsystem controls the radio link with the Mobile Station. The Network Subsystem, the main

part of which is the Mobile services Switching Center (MSC), performs the switching of calls

between the mobile users, and between mobile and fixed network users. The MSC also handles

the mobility management operations. Not shown are the Operations

A GSM network is composed of several functional entities, whose functions and interfaces are

specified. Figure 1 shows the layout of a generic GSM network. The GSM network can be

divided into three broad parts. Subscriber carries the Mobile Station. The Base Station

Subsystem controls the radio link with the Mobile Station. The Network Subsystem, the main

part of which is the Mobile services Switching Center (MSC), performs the switching of calls

between the mobile users, and between mobile and fixed network users. The MSC also handles

the mobility management operations. Not shown is the Operations intendance Center, which

oversees the proper operation and setup of the network. The Mobile Station and the Base Station

Subsystem communicate across the Um interface, also known as the air interface or radio link.

The Base Station Subsystem communicates with the Mobile services Switching Center across the

A interface.

Fig 20: General architecture of a GSM network

Mobile Station:

The mobile station (MS) consists of the mobile equipment (the terminal) and a smart card called

the Subscriber Identity Module (SIM). The SIM provides personal mobility, so that the user can

have access to subscribed services irrespective of a specific terminal. By inserting the SIM card

into another GSM terminal, the user is able to receive calls at that terminal, make calls from that

terminal, and receive other subscribed services.

The mobile equipment is uniquely identified by the International Mobile Equipment Identity

(IMEI). The SIM card contains the International Mobile Subscriber Identity (IMSI) used to

identify the subscriber to the system, a secret key for authentication, and other information. The

IMEI and the IMSI are independent, thereby allowing personal mobility. The SIM card may be

protected against unauthorized use by a password or personal identity number.

Base Station Subsystem:

The Base Station Subsystem is composed of two parts, the Base Transceiver Station (BTS) and

the Base Station Controller (BSC). These communicate across the standardized Abis interface,

allowing (as in the rest of the system) operation between components made by different suppliers.

The Base Transceiver Station houses the radio transceivers that define a cell and handles the

radio-link protocols with the Mobile Station. In a large urban area, there will potentially be a

large number of BTSs deployed, thus the requirements for a BTS are ruggedness, reliability,

portability, and minimum cost.

The Base Station Controller manages the radio resources for one or more BTSs. It handles radio-

channel setup, frequency hopping, and handovers, as described below. The BSC is the connection

between the mobile station and the Mobile service Switching Center (MSC).

Network Subsystem

The central component of the Network Subsystem is the Mobile services Switching Center

(MSC). It acts like a normal switching node of the PSTN or ISDN, and additionally provides all

the functionality needed to handle a mobile subscriber, such as registration, authentication,

location updating, handovers, and call routing to a roaming subscriber. These services are

provided in conjunction with several functional entities, which together form the Network

Subsystem. The MSC provides the connection to the fixed networks (such as the PSTN or ISDN).

Signalling between functional entities in the Network Subsystem uses Signalling System Number

7 (SS7), used for trunk signalling in ISDN and widely used in current public networks.

The Home Location Register (HLR) and Visitor Location Register (VLR), together with the

MSC, provide the call-routing and roaming capabilities of GSM. The HLR contains all the

administrative information of each subscriber registered in the corresponding GSM network,

along with the current location of the mobile. The location of the mobile is typically in the form

of the signalling address of the VLR associated with the mobile as a distributed database. station.

The actual routing procedure will be described later. There is logically one HLR per GSM

network, although it may be implemented

The Visitor Location Register (VLR) contains selected administrative information from the HLR,

necessary for call control and provision of the subscribed services, for each mobile currently

located in the geographical area controlled by the VLR. Although each functional entity can be

implemented as an independent unit, all manufacturers of switching equipment to date implement

the VLR together with the MSC, so that the geographical area controlled by the MSC

corresponds to that controlled by the VLR, thus simplifying the signalling required. Note that the

MSC contains no information about particular mobile stations --- this information is stored in the

location registers.

The other two registers are used for authentication and security purposes. The Equipment Identity

Register (EIR) is a database that contains a list of all valid mobile equipment on the network,

where each mobile station is identified by its International Mobile Equipment Identity (IMEI). An

IMEI is marked as invalid if it has been reported stolen or is not type approved. The

Authentication Center (AuC) is a protected database that stores a copy of the secret key stored in

each subscriber's SIM card, which is used for authentication and encryption over the radio

channel.

CIRCUIT DESCRIPTION

In this project we required operating voltage for Microcontroller 89S52 is 5V. Hence the

5V D.C. power supply is needed for the IC’s. This regulated 5V is generated by stepping

down the voltage from 230V to 18V now the step downed a.c voltage is being rectified

by the Bridge Rectifier using 1N4007 diodes. The rectified a.c voltage is now filtered

using a ‘C’ filter. Now the rectified, filtered D.C. voltage is fed to the Voltage Regulator.

This voltage regulator provides/allows us to have a Regulated constant Voltage which is

of +5V. The rectified; filtered and regulated voltage is again filtered for ripples using an

electrolytic capacitor 100μF. Now the output from this section is fed to 40 th pin of 89S52

microcontroller to supply operating voltage. The microcontroller 89S52 with Pull up

resistors at Port0 and crystal oscillator of 11.0592 MHz crystal in conjunction with

couple of 30-33pf capacitors is placed at 18th & 19th pins of 89S52 to make it work

(execute) properly. In this project is to develop irrigation system by continuously

monitoring the soil moisture level on the field. Whenever the soil condition is dry then

the controller automatically sends a message to the authorized person by using GSM

module. After the person receives a message the he can ON/OFF the motor according to

his requirement by passing a simple message.

SOFTWARE DESCRIPTION

ABOUT SOFTWARE

Software used:*Keil software for c programming

ABOUT KEIL SOFTWARE:

It is possible to create the source files in a text editor such as Notepad, run the Compiler on each C source file, specifying a list of controls, run the Assembler on each Assembler source file, specifying another list of controls, run either the Library Manager or Linker (again specifying a list of controls) and finally running the Object-HEX Converter to convert the Linker output file to an Intel Hex File. Once that has been completed the Hex File can be downloaded to the target hardware and debugged. Alternatively KEIL can be used to create source files; automatically compile, link and covert using options set with an easy to use user interface and finally simulate or perform debugging on the hardware with access to C variables and memory. Unless you have to use the tolls on the command line, the choice is clear. KEIL Greatly simplifies the process of creating and testing an embedded application.

Projects:

The user of KEIL centers on “projects”. A project is a list of all the source files required to build a single application, all the tool options which specify exactly how to build the application, and – if required – how the application should be simulated. A project contains enough information to take a set of source files and generate exactly the binary code required for the application. Because of the high degree of flexibility required from the tools, there are many options that can be set to configure the tools to operate in a specific manner. It would be tedious to have to set these options up every time the application is being built; therefore they are stored in a project file. Loading the project file into KEIL informs KEIL which source files are required, where they are, and how to configure the tools in the correct way. KEIL can then execute each tool with the correct options. It is also possible to create new projects in KEIL. Source files are added to the project and the tool options are set as required. The project can then be saved to preserve the settings. The project is reloaded and the simulator or debugger started, all the desired windows are opened. KEIL project files have the extension

Simulator/Debugger:

The simulator/ debugger in KEIL can perform a very detailed simulation of a micro controller along with external signals. It is possible to view the precise execution time of a single assembly instruction, or a single line of C code, all the way up to the entire application, simply by entering the crystal frequency. A window can be opened for each peripheral on the device, showing the state of the peripheral. This enables quick trouble shooting of mis-configured peripherals. Breakpoints may be set on either assembly instructions or lines of C code, and execution may be stepped through one instruction or C line at a time. The contents of all the memory areas may be viewed along with ability to find specific variables. In addition the registers may be viewed allowing a detailed view of what the microcontroller is doing at any point in time.

The Keil Software 8051 development tools listed below are the programs you use to compile your C code, assemble your assembler source files, link your program together, create HEX files, and debug your target program. µVision2 for Windows™ Integrated Development Environment: combines Project Management, Source Code Editing, and Program Debugging in one powerful environment.

C51 ANSI Optimizing C Cross Compiler: creates relocatable object modules from your C source code,

A51 Macro Assembler: creates relocatable object modules from your 8051 assembler source code,

BL51 Linker/Locator: combines relocatable object modules created by the compiler and assembler into the final absolute object module,

LIB51 Library Manager: combines object modules into a library, which may be used by the linker,

OH51 Object-HEX Converter: creates Intel HEX files from absolute object modules.

What's New in µVision3?µVision3 adds many new features to the Editor like Text Templates, Quick Function Navigation, and Syntax Coloring with brace high lighting Configuration Wizard for dialog based startup and debugger setup. µVision3 is fully compatible to µVision2 and can be used in parallel with µVision2.

What is µVision3?µVision3 is an IDE (Integrated Development Environment) that helps you write, compile, and debug embedded programs. It encapsulates the following components:

A project manager. A make facility. Tool configuration. Editor. A powerful debugger.

To help you get started, several example programs (located in the \C52\Examples, \C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided.

HELLO is a simple program that prints the string "Hello World" using the Serial Interface. MEASURE is a data acquisition system for analog and digital systems. TRAFFIC is a traffic light controller with the RTX Tiny operating system. SIEVE is the SIEVE Benchmark. DHRY is the Dhrystone Benchmark. WHETS is the Single-Precision Whetstone Benchmark.

Additional example programs not listed here are provided for each device architecture.

Building an Application in µVision2To build (compile, assemble, and link) an application in µVision2, you must:

1. Select Project -(forexample,166\EXAMPLES\HELLO\HELLO.UV2).2. Select Project - Rebuild all target files or Build target.

µVision2 compiles, assembles, and links the files in your project

Creating Your Own Application in µVision2 To create a new project in µVision2, you must:

1. Select Project - New Project.2. Select a directory and enter the name of the project file.3. Select Project - Select Device and select an 8052, 251, or C16x/ST10 device from the

Device Database™.4. Create source files to add to the project.5. Select Project - Targets, Groups, Files. Add/Files, select Source Group1, and add the

source files to the project.6. Select Project - Options and set the tool options. Note when you select the target device

from the Device Database™ all special options are set automatically. You typically only need to configure the memory map of your target hardware. Default memory model settings are optimal for most applications.

7. Select Project - Rebuild all target files or Build target.

Debugging an Application in µVision2To debug an application created using µVision2, you must:

1. Select Debug - Start/Stop Debug Session.2. Use the Step toolbar buttons to single-step through your program. You may enter G,

main in the Output Window to execute to the main C function.3. Open the Serial Window using the Serial #1 button on the toolbar.

Debug your program using standard options like Step, Go, Break, and so on.

Starting µVision2 and Creating a Project

µVision2 is a standard Windows application and started by clicking on the program icon. To create a new project file select from the µVision2 menu

Project – New Project…. This opens a standard Windows dialog that asks you

for the new project file name.

We suggest that you use a separate folder for each project. You can simply use

the icon Create New Folder in this dialog to get a new empty folder. Then

select this folder and enter the file name for the new project, i.e. Project1.

µVision2 creates a new project file with the name PROJECT1.UV2 which contains

a default target and file group name. You can see these names in the Project

Window – Files.

Now use from the menu Project – Select Device for Target and select a CPU

for your project. The Select Device dialog box shows the µVision2 device

database. Just select the micro controller you use. We are using for our examples the Philips 89S52RD+ CPU. This selection sets necessary tool

options for the 89S52RD+ device and simplifies in this way the tool Configuration

Building Projects and Creating a HEX Files

Typical, the tool settings under Options – Target are all you need to start a new

application. You may translate all source files and line the application with a

click on the Build Target toolbar icon. When you build an application with

syntax errors, µVision2 will display errors and warning messages in the Output

Window – Build page. A double click on a message line opens the source file

on the correct location in a µVision2 editor window.

Once you have successfully generated your application you can start debugging.

After you have tested your application, it is required to create an Intel HEX file to download the software into an EPROM programmer or simulator. µVision2 creates HEX files with each build process when Create HEX files under Options for Target – Output is enabled. You may start your PROM programming utility after the make process when you specify the program under the option Run User Program #1.

CPU Simulation:

µVision2 simulates up to 16 Mbytes of memory from which areas can be

Mapped for read, write, or code execution access. The µVision2 simulator traps

And reports illegal memory accesses.

In addition to memory mapping, the simulator also provides support for the

Integrated peripherals of the various 89S52 derivatives. The on-chip peripherals

of the CPU you have selected are configured from the Device.

Database selection:

you have made when you create your project target. Refer to page 58 for more

Information about selecting a device. You may select and display the on-chip peripheral components using the Debug menu. You can also change the aspects of each peripheral using the controls in the dialog boxes.

Start Debugging:

You start the debug mode of µVision2 with the Debug – Start/Stop Debug

Session command. Depending on the Options for Target – Debug

Configuration, µVision2 will load the application program and run the startup

code µVision2 saves the editor screen layout and restores the screen layout of the last debug session. If the program execution stops, µVision2 opens an

editor window with the source text or shows CPU instructions in the disassembly window. The next executable statement is marked with a yellow arrow. During debugging, most editor features are still available.

For example, you can use the find command or correct program errors. Program source text of your application is shown in the same windows. The µVision2 debug mode differs from the edit mode in the following aspects:

_ The “Debug Menu and Debug Commands” described on page 28 are

Available. The additional debug windows are discussed in the following.

_ The project structure or tool parameters cannot be modified. All build

Commands are disabled.

Disassembly Window

The Disassembly window shows your target program as mixed source and assembly program or just assembly code. A trace history of previously executed instructions may be displayed with Debug – View Trace Records. To enable the trace history, set Debug – Enable/Disable Trace Recording.

If you select the Disassembly Window as the active window all program step commands work on CPU instruction level rather than program source lines. You can select a text line and set or modify code breakpoints using toolbar buttons or the context menu commands.

You may use the dialog Debug – Inline Assembly… to modify the CPU instructions. That allows you to correct mistakes or to make temporary changes to the target program you are debugging.

SOFTWARE COMPONENTS

About Keil

1. Click on the Keil u Vision Icon on Desktop

2. The following fig will appear

3. Click on the Project menu from the title bar

4. Then Click on New Project

5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\

6. Then Click on Save button above.

7. Select the component for u r project. i.e. Atmel……

8. Click on the + Symbol beside of Atmel

9. Select AT89S52 as shown below

10. Then Click on “OK”

11. The Following fig will appear

12. Then Click either YES or NO………mostly “NO”

13. Now your project is ready to USE

14. Now double click on the Target1, you would get another option “Source group 1” as

shown in next page.

15. Click on the file option from menu bar and select “new”

16. The next screen will be as shown in next page, and just maximize it by double

clicking on its blue boarder.

17. Now start writing program in either in “C” or “ASM”

18. For a program written in Assembly, then save it with extension “. asm” and for “C”

based program save it with extension “ .C”

19. Now right click on Source group 1 and click on “Add files to Group Source”

20. Now you will get another window, on which by default “C” files will appear.

21. Now select as per your file extension given while saving the file

22. Click only one time on option “ADD”

23. Now Press function key F7 to compile. Any error will appear if so happen.

24. If the file contains no error, then press Control+F5 simultaneously.

25. The new window is as follows

26. Then Click “OK”

27. Now Click on the Peripherals from menu bar, and check your required port as

shown in fig below

28. Drag the port a side and click in the program file.

29. Now keep Pressing function key “F11” slowly and observe.

30. You are running your program successfully

CONCLUSION : The project “CONTROL OF IRRIGATION PUMP THROUGH GSM

TECHNOLOGY.” has been successfully designed and tested. Integrating features of all

the hardware components used have developed it. Presence of every module has been

reasoned out and placed carefully thus contributing to the best working of the unit.

Secondly, using highly advanced IC’s and with the help of growing technology the

project has been successfully implemented.

BIBLIOGRAPHY

The 8051 Micro controller and Embedded Systems

-Muhammad Ali Mazidi

Janice Gillispie Mazidi

The 8051 Micro controller Architecture, Programming & Applications

-Kenneth J. Ayala

Fundamentals Of Micro processors and Micro computers

-B. Ram

Micro processor Architecture, Programming & Applications

- Ramesh S. Gaonkar

Electronic Components

-D.V. Prasad

Wireless Communications

- Theodore S. Rappaport

Mobile Tele Communications

- William C.Y. Lee