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7/17/12 VHDL coding tips and tricks: VHDL code for BCD to 7-segment display converter
1/4vhdlguru.blogspot.in/2010/03/vhdl-code-for-bcd-to-7-segment-display.html
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SATURDAY, MARCH 6, 2010
VHDL code for BCD to 7-segment display converter
0tweets
tw eet Here is a program for BCD to 7-segment display decoder. The module takes 4 bit BCD as input and outputs 7 bit decoded output
for driving the display unit.A seven segment display can be used to display decimal digits.They have LED or LCD elements which becomes
active when the input is zero.The figure shows how different digits are displayed:
library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity test isport ( clk : in std_logic; bcd : in std_logic_vector(3 downto 0); --BCD input segment7 : out std_logic_vector(6 downto 0) -- 7 bit decoded output. );end test;--'a' corresponds to MSB of segment7 and g corresponds to LSB of segment7.architecture Behavioral of test is
beginprocess (clk,bcd)BEGINif (clk'event and clk='1') thencase bcd iswhen "0000"=> segment7 <="0000001"; -- '0'when "0001"=> segment7 <="1001111"; -- '1'when "0010"=> segment7 <="0010010"; -- '2'when "0011"=> segment7 <="0000110"; -- '3'when "0100"=> segment7 <="1001100"; -- '4' when "0101"=> segment7 <="0100100"; -- '5'when "0110"=> segment7 <="0100000"; -- '6'when "0111"=> segment7 <="0001111"; -- '7'when "1000"=> segment7 <="0000000"; -- '8'when "1001"=> segment7 <="0000100"; -- '9' --nothing is displayed when a number more than 9 is given as input. when others=> segment7 <="1111111"; end case;
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7/17/12 VHDL coding tips and tricks: VHDL code for BCD to 7-segment display converter
2/4vhdlguru.blogspot.in/2010/03/vhdl-code-for-bcd-to-7-segment-display.html
Posted by vipin at 7:50 PM
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end if;
end process;
end Behavioral;
If you want a decimal number to be displayed using this code then convert the corresponding code into BCD and then instantiate this
module for each digit of the BCD code.
Here is a sample test bench code for this module:
LIBRARY ieee;USE ieee.std_logic_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;
ENTITY test_tb ISEND test_tb;
ARCHITECTURE behavior OF test_tb IS signal clk : std_logic := '0'; signal bcd : std_logic_vector(3 downto 0) := (others => '0'); signal segment7 : std_logic_vector(6 downto 0); constant clk_period : time := 1 ns;BEGIN uut: entity work.test PORT MAP (clk,bcd,segment7); clk_process :process begin clk <= '0'; wait for clk_period/2; clk <= '1'; wait for clk_period/2; end process; stim_proc: process begin for i in 0 to 9 loop bcd <= conv_std_logic_vector(i,4); wait for 2 ns; end loop; end process;
END;
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10 comments:
Alfred March 25, 2010 9:20 AM
hello.. can you pls post a test bench for this code.. tnx...
Reply
vipin March 25, 2010 10:25 AM
@Alfred : I have modified the post including the test bench.Hope that helps..
Reply
Alfred March 25, 2010 12:57 PM
tnx a lot..
Reply
Yanuar May 30, 2010 7:27 PM
thank you, it is so useful for me.
Can you show me, how to control a animation on vga using keyboard in vhdl
Reply
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7/17/12 VHDL coding tips and tricks: VHDL code for BCD to 7-segment display converter
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Raphael Andreoni October 26, 2010 1:25 AM
Hi, I'm trying to implement the sum of two numbers with 5 bits and show in two digits SSD, but with no success, do you have any idea how to
do this?
I had success with decimal counter until 99, but how make this work whit the sum, I don't know.
Thanks
Reply
Jtesla July 21, 2011 2:02 AM
Can some one help me with the code for Four bit BCD decimal COUNTER using VHDL and the 74LS90. I'm using Xilinx 12.1 and I'm really
struggling with the logic gate code.
my email is [email protected]
Reply
sumdt October 19, 2011 10:25 PM
Please help me!
Write a VHDL code to perform the function of multiplier
which the inputs are from Dip Switch and outputs
display to 7-segment LED with BCD.
X : dip 1~4represents value 0~15
Y : dip 5~8represents value 0~15
Thanks you so much
Reply
sandeep October 21, 2011 6:43 PM
write a VHDL prog to display number on BCD-7 segment display , input given from ps/2 keyboard
Reply
mar'd December 21, 2011 7:55 PM
can you help me to get a VHBL program for 64 bit CSA
Reply
blogzworld May 8, 2012 10:50 PM
Can you post the synthesis report.
Reply
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