VERILOG TUTORIAL 3

Da Nang University of Technology

Prepaired by: Kien T.Nguyen, Lab AssistantMinh Vu, Lab Assistant

Materials Tools:

Specification: Word, AbiWord, Open Office RTL coding: HDL TurboWriter, Notepad++, Vim,

Emacs, conTEXT Simulation: iVerilog, ModelSim, Quartus

Simulator, ISE Simulator Synthesis: Quartus, Xilinx ISE

Website: www.asic-world.com www.dut.udn.vn/ece

Reference documents link

DE1_UserManual_v1018.pdf QUARTUS II INTRODUCTION USING VERILOG

DESIGN.ppt Lab 3 of course EE215 in University of Washington

Lectures Outline

1. DE1’s pin which are connecting our resources.

2. Lab 2: Full design Led 7 segment decode circuit

1.DE1’s pin which are connecting our resources

Push buttons are active in low level

Up position is in high levelDow position is in low level

Leds are active in high level. Theywill turn on if have high level input

1.DE1’s pin which are connecting our resources (cont’d)

7 segments Leds are active in low level. It mean the segment will light onwhen we give it logic 0.

2. Lab 2: Executing a Design from a Set of Requirements.

1. Finish the verilog coding myphoto module follow the specification (structural code)

2. Write test bench to check circuit function using Icarus.

3. Synthesis your design, assign pins and program to DE1 kit.

4. Make the hard report submit to LA or your teacher.

2. Lab 2: Executing a Design from a Set of Requirements.

myPhoto system: Today, image you are a senior system designer, design and develop the prototype of myphoto system.

First of all, all system are build from it’s specification. Specification describes the operation of a system.

Specification is also used in testing phase, when you finish your design and ask your self whether system works correct or not. Let test it with specifications.

In the future, you have to design you own specification for your own system. So study this specification in this Lab as carefully as you can.

Myphoto’s Specification Inputs

SYSON: the photographic system is turned on. TAKE: capture the currently selected image. SELFLASH: enable the advanced built-in light system. NOFLASH: sensor that detects that the use of artificial

lighting is prohibited. ~INFOCUS: sensor that detects if the image is in focus. ~LOWLIGHT: sensor that detects a low ambient light

condition. The inputs SYSON, TAKE, SELFLASH, and NOFLASH, are active

high (logic 1). The inputs, ~INFOCUS and ~LOWLIGHT are active low (logic 0).

Myphoto’s Specification (cont’d) Outputs

~CAPTURE: start save the picture to memory ~OUTOFFOCUS: indicate picture is out of focus now ~FLASH: Make a flash to take a picture Note: All outputs are low true – asserted low (logic 0)

myphoto

SYSONTAKE

SELFLASHNOFLASH~INFOCUS

~LOWLIGHT

~CAPTURE

~OUTOFFOCUS

~FLASH

This symbol says: this signal is active with low level or

logic 0

Myphoto’s Specification (cont’d)

Operation: The operation of the myPhoto system is as followsCapture - the CAPTURE output is to be asserted under the following

conditions: The system is on, it is in focus, the ambient light is sufficient, flash has

not been selected (Why? Flash select is still ok), and the user chooses to take a picture.

The system is on, it is in focus, the ambient light is low, flash has been selected, the use of flash is permitted, and the user chooses to take a picture.

What is the function of Capture? ~CAPTURE =f(SYSON,TAKE,SELFLASH,NOFLASH,~INFOCUS,~LOWLIGHT) = ??? Write it before going to the Lab.

Myphoto’s Specification (cont’d)

Operation: (cont’d)Out of Focus - the OUTOFFOCUS output is to be asserted under the

following conditions: The system is on, the in focus sensor indicates that the potential image is out

of focus, and the user chooses to take a picture.

What is the function of OUTOFFOCUS? ~OUTOFFOCUS =f(SYSON,TAKE,SELFLASH,NOFLASH,~INFOCUS,~LOWLIGHT) = ??? Write it before going to the Lab.

Myphoto’s Specification (cont’d)

Operation: (cont’d) Flash - the FLASH output is to be asserted under the following conditions:

The user has elected to capture an image, flash has been selected, flash is permitted, the system is in focus and ON.

The user has elected to capture an image, the ambient light sensor indicates a low light condition, flash is permitted, the system is in focus and ON.

What is the function of FLASH? ~FLASH=f(SYSON,TAKE,SELFLASH,NOFLASH,~INFOCUS,~LOWLIGHT) = ??? Write it before going to the Lab.

Design, Test, Implement Myphoto1. Model verilog structural module.2. Simulate, and test your design using the

Icarus Verilog Tools. Test all appropriate inputs. Verify your design by

using the output truth table and timing. 3. To implement the system, we are going

to use the Altera Cyclone II FPGA on the DE 1 Board.

Use document link in slide 3 and pin information in slide 5,6 to implement system to DE1 board

Questions1. If you had implemented your myPhoto image

capture system using SSI parts (IC), how many chips would you have used?

2. Discuss the advantages and disadvantages of implementing the design in SSI (IC) vs. array logic parts (FPGA).

Consider the following: The amount of work (e.g. wiring, etc) that goes into making each

circuit. The number of extra components needed for the circuit. The amount that is to be produced. Other items that may be considered when determining "cost". Debugging

Laboratory Final Report

There is one hard report per team. The report contain all the lab your team have

done, code, test result in Icarus, test result in DE1 , answer questions.

Structure of report: Member: Names and class Introduction about this Lab Lab report Analysis Errors Summary