Veljko Radeka, Sergio Rescia, Gianluigi De GeronimoInstrumentation Division, Brookhaven National Laboratory, Upton, NY

Induced Gate Noise in Charge Detection

;

, .

dn do eqdo ms

i kTg Rg g

2 4

1 22 123

gsgn g g

do

Ci kTg g

g

2

2

4

45

3

1

3

Drain current noise:

Induced gate noise:

det develops on a noise voltage:gn in gs strayi C C C C 2

gs

gndo inin

Ci kT

g CC

22

21 14

5

; .5

gseq

indo

CR

g C

2

51 0 4

With a capacitive signal source induced noise voltage spectrum is white → both drain and gate noise can be referenced to the gate as an equivalent series noise resistance. Neglecting correlation :

For power optimized CMOS: Cgs≤(1⁄4)Cin , and the increase in Req is < 2.5%.The effect of correlation is less than ~10%.

Charge detection - capacitive signal source:

(Ref. 3)

( )gsg i g gs gs i

ggs gs i

j CZ R Y j C C R

j C Z j C R

21 11

( )

(foRe( ) ( r ))g ggs

g do e do Tdo

iT

sC fg g g f fg

Rf

Y C

22

2 21 1 15 5

Real Term in the Gate Admittance

unity gain frequency electron transit time

For: ,

T do ms

g ms

f f g g

g g

1 4180

Real (“Damping”) Term in the Control Electrode Admittance of all Charge Controlled Devices

Charge in transport:

Transconductance:

Unity gain frequency:

d eq i

m d g g e g eg di dv dq dv C 1

T T m g ef g C 2 1

Control electrode admittance: g g e mY j C j g At high frequencies:

exp a am m e m eg j g j g j 1

a mg g egY j C 2

=a a a g m e m T g mg g g f f C g 22 2

1 5 in CMOS

Damping of tuned circuits by control electrodes with zero dc current observed in 1930’s (Ref. 1)

transit time

phase shift

phase shift

a«1 ;

( ) ( )gn m gsT m

fi kT g kT Cf g

2 2 21 1 14 45 5

fT(GHz) gm(mS) Cgs(fF)

4 10 330

8 14 220

16 18 140

26 23 90

45 28 68

Long L Short L

≈ 4/3 (<3?)≈ 2/3 <1.2

Data from: C.-H. Chen,et al., IEEE Trans. Electron devices,48, 2884(Dec. 2001)

Gate Induced Noise vs f and fT

NF=1dB 0.25dB

Drain current thermal noise vs VDS Gate current noise vs VDS

From: A. J. Scholten et al., IEEE Trans.Electron Devices, 50, 618 (March 2003)

Noise Enhancement with VDS in DSM MOSFETS?

No significant enhancement at L=0.18 m !

“White noise gamma factor” vs VDS and L

Gradual channel Velocity saturation region region

2/3≤ < 1.1

From: C.-H. Chen and M. J. Deen, IEEE Trans. Electron Devices, 49, 1484(Aug. 2002)

Noise model: Channel Length Modulation (CLM)

eq gbmbms

gs

inmb ms

ms ms ing b b

R Cgg gR RC

R gg g CC

22

51 11

Equivalent Series Noise Resistance for Charge Detection (Capacitive Source)

Intrinsic channel noise

Gate inducedGate resistance Substrate

resistance

Induced into gate (shielded by the inversion layer!?)

Transconductance=

ms dog g

Ref.: 9

«1

9

Acknowledgements

Numerous discussions with Anand Kandasamy, Paul O’Connor and Pavel Rehak are gratefully acknowledged.

References

1. Ferris, W. R., Proc. IRE, 24, No. 1 (1936) 822. Van der Ziel, A., Proc. IEEE, 51 (1963) 4613. Radeka, V., IEEE Trans. Nucl. Sci., NS-11 (1964) 3584. Manku, T., IEEE Journal of Solid-State Circuits, 34, No. 3 (1999) 2775 Signoracci, L., et al., Solid-State Electronics, 45 (2001) 2056. C.-H. Chen, et al., IEEE Trans. Electron Devices, 48, (Dec. 2001) 28847. C.-H. Chen and M.J. Deen, IEEE Trans. Electron Devices, 49, (Aug. 2002) 14848. A. J. Scholten, et al., IEEE Trans. Electron Devices, 50, (March 2003) 6189. S. V. Kishore, et al., IEEE 1999 Custom Integrated Circuits Conference, p.365