T 2004

ECHNICALRAINING

Projection TelevisionTechnical Training &Troubleshooting Manual

WS-55615 WS-55815WS-65615 WS-65815WS-73615WS-65515

V25 V25+ V25++

WS-48515WS-55515

MITSUBISHI DIGITAL ELECTRONICS AMERICA, INC.

V25V25

I

IntroductionModels ............................................................................................................... 1Features ............................................................................................................... 2CableCARD™ ...................................................................................................... 3HDMI™ ............................................................................................................... 7

Chapter 1... Disassembly and ServiceDisassembly Procedures .................................................................................. 1-1PCB & Main Component Locations ................................................................... 1-3DM3 PCB Replacement .................................................................................... 1-5Composite Cabinet ............................................................................................ 1-6

Chapter 2... Alignment ProceduresService Menu Access Codes ............................................................................. 2-1Initial Setup ........................................................................................................ 2-1Circuit Adjustment Mode .................................................................................... 2-3Convergence Adjustment Mode ......................................................................... 2-5Alignment Data Storage Locations ..................................................................... 2-6

Chapter 3... Power SupplyPower Supplies ................................................................................................. 3-1Standby Power Supply ....................................................................................... 3-2Switched Power Supply ..................................................................................... 3-3

Chapter 4... Control CircuitryBasic uPC Requirements .................................................................................. 4-1Reset Circuitry ................................................................................................... 4-2Input Command Circuitry .................................................................................. 4-3Control Block Diagram ....................................................................................... 4-4Parallel Inputs & Outputs .................................................................................... 4-8

V25 CHASSIS TECHNICAL TRAINING AND TROUBLESHOOTING MANUAL

TABLE of CONTENTS

II

Chapter 5 ... Video/Color CircuitryOverall Block Diagram ....................................................................................... 5-1RGB CRT Drive & Protect Circuitry .................................................................... 5-2

Chapter 6 ... Sync, Deflection and High VoltageOverall Block Diagram ...................................................................................... 6-1Sync Signal Path ............................................................................................... 6-2Vertical Deflection .............................................................................................. 6-3Horizontal Deflection .......................................................................................... 6-4Deflection Loss Detection .................................................................................. 6-5High Voltage & HV Regulation............................................................................ 6-6X-Ray Protect .................................................................................................... 6-7

Chapter 7... Convergence CircuitryOverall Block Diagram ...................................................................................... 7-1Waveform Generator and D/A Converter .......................................................... 7-2LPF and Summing Amplifiers ............................................................................ 7-3Convergence Output Circuitry ........................................................................... 7-4

Chapter 8 ... Sound CircuitryOverall Block Diagram ...................................................................................... 8-1Digital Audio Out ................................................................................................ 8-2

Chapter 9 ...Troubleshooting TipsUsing the Front Panel LED................................................................................. 9-1Disabling the CRT Protection Circuits ................................................................ 9-2

1

Introduction

The V25 Chassis is carried in 4 screen sizes with 3 fea-ture levels for 2004 and 2005. This CRT based pro-jection television is a full featured, integrated HDTV usingall the latest technologies. A breakdown of V25 mod-els is shown in Table 1. Weights and Dimensions areshown in Table 2.

FeaturesTable 3 shows some of the major features by modelcategory. Some of the features are carried over fromprevious years and some are totally new. In addition toall the user features, the V25 chassis includes the manyserviceability features technicians are used to whenworking on Mitsubishi PTV’s.

Significant Carry Over Features• IEEE1394, FireWire™ (Digital Interface)• NetCommand® 4.0 with IR Learning (A/V

System Control)• PerfectColor™ (Advanced Color Control)• AMVP™ 2nd Generation (Line Doubler,

Raster Formatter, Color Control, Digital VideoProcessor).

• 9" CRTs available in 65" & 73” Models• MediaCommand™ with 5 Format Memory

Card Reader (JPG/MP3/WMA Player)• Quad Field Focus™ (CRT Beam Forming)

New Features• CableCARD™• HDMI™• Combined Digital/Analog Tuner• CableCommand™ (Digital Cable Control)• ChannelView™ (On Screen Channel List)• Full Screen Freeze Frame• ColorPure™ (Lens color filtering)

Serviceability Features• Modular design with "Light Box"• Self Diagnostics• Serviceable to Component or PCB level.• Reduction in number of stand-up PCBs.• Service Adjustment Data Reset.

This section will provide further explanation of:1) CableCARD2) HDMI

Chassis V25 V25+ V25++48" W WS-4851555" W WS-55515 WS-55615 WS-5581565" W WS-65515 WS-65615 WS-6581573" W WS-73615

Screen Size

Table 1: V25 Models

2

Model Weight Height Width Depth SpkrsWS-48515 172 lbs 49 in 44.5 in. 24 in. 5" 10WWS-55515 213 lbs 53 in 56 in 34 in 6" 10WWS-55615 213 lbs 50.5 in 51 in 28 in 6" 10WWS-55815 195 lbs 50.5 in 51 in 27 in 5x7" 10WWS-65515 327 lbs 62 in 59 in 28 in 6" 10WWS-65615 327 lbs 62 in 59 in 28 in 6" 10WWS-65815 276 lbs 62 in 58 in 28 in 5x7" 10WWS-73615 313 lbs 66 in 66 in 30 in 6" 10W

Table 2: V25 Weight & Dimensions

Chassis Models Inte

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II

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fect

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ure

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mon

dShi

eld

Ant

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re D

iam

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hiel

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9" C

RT

s

Med

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omm

and

V25 WS-48515 X X X X X X X XV25 WS-55515 X X X X X X X XV25 WS-65515 X X X X X X X X

V25+ WS-55615 X X X X X X X X X XV25+ WS-65615 X X X X X X X X X XV25+ WS-73615 X X X X X X X X X X X

V25++ WS-55815 X X X X X X X X X X X XV25++ WS-65815 X X X X X X X X X X X X X

Table 3: Features

3

CableCARD™September 2003 the FCC released the regulations forthe Plug and Play Cable Standard. This provides a na-tional standard for cable systems effective July 1, 2004.The goal of the standard is to promote “digital cable-ready” devices that can plug into each other and anydigital cable system in the United States.

Two important aspects of the standard are:1) Any consumer with a HD digital cable box can

have it replaced at no charge with a box thatincludes an IEEE1394 interface.

2) A national standard for de-scrambling cablesystems using a Point Of Deployment (POD)module, now commonly referred to as aCableCARD™.

These aspects impact Mitsubishi Bigscreen customersin the following ways.

• All Mitsubishi digital TV’s with a IEEE1394interface are readily equipped to have a singlewire digital interface for a HD cable box.

• The provision standardizing “Digital Cable-Ready” products will allow the consumer topurchase a TV with an integrated cable boxwith the assurance it will be compatible withtheir local cable provider’s equipment, even ifthey relocate. This eliminates the need for aseparate cable box.

TV’s that are designated “Digital Cable-Ready” will in-clude the POD feature consisting of a removable mod-ule, provided by the cable operator for de-scrambling.

In addition to enabling the reception of both scrambledand unscrambled digital cable broadcasts, the standardwill support more options such as:

• Emergency Alert Messages• Interactive Program Guide Services• Impulse Pay Per View Services• Video On Demand• Other messaging and interactive services

All V25 and V26 Chassis models are Digital Cable-Ready.

Hardware RequirementsDigital Cable Ready hardware requirements include:

• The host device (TV or Set Top Box), ownedby the consumer, should provide generic cabletuning for unscrambled digital and analogbroadcasts. In addition to the cable tuner, thehost must include an “Out-Of-Band” (OOB)tuner to receive data for decoding scrambledbroadcasts and receiving program guide andother feature specific information.

• A removable POD security module, owned bythe cable operator, that is programmable forconditional access to specialized broadcasts.

• An interface connector between the host deviceand the module that allows the host to acceptPOD’s provided by different cable operators.Simply stated, a CableCARD slot.

The interface uses the PCMCIA, Type II protocol. So,the POD module is similar in appearance to many of themodules used with lap top computers. See Figure 1.

ANT-1MAIN

4

The PCMCIA (Personal Computer Memory Card In-ternational Association) interface has 68 pins. Type IIcards measure (L)85.6mm (W)54.0mm (D)5.0mm. Pinassignments are shown in Table 4. A full explanation ofeach pin will not be discussed here.

POD modules can be either Single-Stream (S-Card) orMulti-Stream (M-Card). When power is applied, thehost examines the configuration of the VS2# and MDETpins to determine which of the two type cards has beeninserted.

An S-Card can only operate with a single tuner device.With today’s demand for multi-tuner receivers with fea-tures like PIP and Digital Video Recorders, a secondgeneration M-CARD is required.

Figure 1: PCMCIA CableCARD

Pin PC Card Memory S ignals

PC Card Memory

I/O

S -CARD S ignals

S -CARD I/O

M-CARD S ignals

M-CARD I/O

Pin PC Card Memory S ignals

PC Card Memory

I/O1

S -CARD S ignals

S -CARD I/O

M-CARD S ignals

M-CARD I/O

1 GND DC GND DC GND DC 35 GND DC GND DC GND DC 2 D3 I/O D3 I/O Unus ed 36 CD1# O CD1# O CD1# O 3 D4 I/O D4 I/O Unus ed 37 D11 I/O M DO3 O M DO3 O 4 D5 I/O D5 I/O Unus ed 38 D12 I/O M DO4 O M DO4 O 5 D6 I/O D6 I/O Unus ed 39 D13 I/O M DO5 O M DO5 O 6 D7 I/O D7 I/O Unus ed 40 D14 I/O M DO6 O M DO6 O 7 CE1# I CE1# I Unus ed 41 D15 I/O M DO7 O M DO7 O 8 A 10 I Unus ed Unus ed 42 CE2# I CE2# I Unus ed 9 OE# I OE# I Unus ed 43 VS1# O VS1# O VS1# O

10 A 11 I Unus ed Unus ed 44 RFU IORD# I Unus ed 11 A 9 I DRX I DRX I 45 RFU IOW R# I Unus ed 12 A 8 I CRX I CRX I 46 A 17 I M ISTRT I M ISTRT I 13 A 13 I Unus ed M OCLK O 47 A 18 I M DI0 I M DI0 I 14 A 14 I M CLKO O Unus ed 48 A 19 I M DI1 I M DI1 I 15 W E# I W E# I Unus ed 49 A 20 I M DI2 I M DI2 I 16 REA DY O IREQ# O Unus ed 50 A 21 I M DI3 I M DI3 I 17 VCC DC in VCC DC in VCC DC in 51 VCC DC in VCC DC in VCC DC in 18 VPP1 DC in VPP1 DC in VPP1 I 52 VPP2 DC in VPP2 DC in VPP2 DC in 19 A 16 I M IVA L I Unus ed 53 A 22 I M DI4 I M DI4 I 20 A 15 I M CLKI I Unus ed 54 A 23 I M DI5 I M DI5 I 21 A 12 I Unus ed M ICLK I 55 A 24 I M DI6 I M DI6 I 22 A 7 I QTX O QTX O 56 A 25 I M DI7 I M DI7 I 23 A 6 I ETX O ETX O 57 VS2# O VS2# O VS2# I/O 24 A 5 I ITX O ITX O 58 RESET I RESET I RESET I 25 A 4 I CTX I CTX I 59 W A IT# O W A IT# O Unus ed

26 A 3 I Unus ed Unus ed 60 RFU INPA CK#

O SDO O

27 A 2 I Unus ed SCTL I 61 REG# I REG# I Unus ed 28 A 1 I A 1 SCLK I 62 BVD2 O M OVA L O Unus ed

29 A 0 I A 0 SDI I 63 BVD1 O M OSTRT

O M OSTRT O

30 D0 I/O D0 I/O Unus ed 64 D8 I/O M DO0 O M DO0 O 31 D1 I/O D1 I/O Unus ed 65 D9 I/O M DO1 O M DO1 O 32 D2 I/O D2 I/O Unus ed 66 D10 I/O M DO2 O M DO2 O 33 W P O IOIS16# O M DET O 67 CD2# O CD2# O CD2# O 34 GND DC GND DC GND DC 68 GND DC GND DC GND DC

Table 4: CableCARD PCMCIA Pin Assignm ents

5

Figure 2: Multi-Stream Receiver

A block diagram of a multi-tuner receiver with PIP ca-pabilities is shown in Figure 2.

When two different digital cable channels are selectedto be viewed together within a PIP, the two MPEG digitalbitstreams output from the QAM tuner/demodulatorsare directed to a multiplexor where they are temporarilycombined together. The multiplexed bitstream is thensent, one complete MPEG transport packet at a time,across the interface to the CableCARD for decryption.

Decryption is accomplished using data received by wayof the Out-Of-Band (OOB) tuning circuitry. Afterdecryption, the bitstream is then de-multiplexed and theseparate MPEG signals are decoded. The two videosignals are then combined by conventional PIP circuitry.A single M-CARD is capable of supporting up to 5QAM-256 tuner/demodulators.

M-CARDs are also backward compatible with single-stream systems. Of course, single stream receivers arefar simpler since they don’t require the additional tun-ing, multiplex or MPEG decoder circuitry.

The POD interface also provides a communication linkbetween the cable service provider and the host device’smicroprocessor circuitry. This enables the download ofdata such as channel maps and program guides.

This communication link also uses the Out-Of-Bandtuner, (named because the carrier frequency is out ofthe TV RF band). The frequency used can be between70 and 130 MHZ. The actual tuning frequency is de-termined by the POD module.

OperationWhen a CableCARD is first used, it must go through anauthentication process that “binds” the card and host.This is accomplished by automatically displaying an on-screen message similar to that shown in Figure 3.

Please call XYZ Cableat 555-555-1234 toactivate cable service.

They will need these numbers:Host ID: XXX-XXX-XXX-XXX-XCableCARD™ ID: XXX-XXX-XXX-XXX-X

See owner’s manual forfurther information.

Note: To re-access the ID Menu in the V25 &V26 Chassis, press <TV MENU> <9-9-9>.(CableCARD required for menu to appear)

Figure 3: Card-Host ID Menu

6

After the customer calls the cable company and sup-plies the necessary information, the cable company canactivate the card by sending a specifically addresseddata packet.

After authentication, an on-screen message similar tothat shown in Figure 4 will be displayed. Actual mes-sages may vary because they are determined by thecable provider. Messages are displayed for a maxi-mum of 2 minutes.

CableCARD™ is active

Host ID: XXX-XXX-XXX-XXX-XCableCARD™ ID: XXX-XXX-XXX-XXX-X

Contact your cable operator forfurther information.

Press HOME key to exit.

Figure 4: Card-Host Activation Screen

This assumes a system with one-way (receive only) com-munication. Future generations may have two-way ca-pabilities. These systems will not require the user toperform these functions.

Copy Control Information (CCI)Under the standard, Copy Control Information (CCI)is used to indicate the copying rules that may be includedwith “high value” programming. CCI can indicate:

• Copy Freely - Any number of copies can bemade.

• Copy Once - Only one copy is permitted.• Copy No More - A copy has been made and

no more are permitted.• Copy Never - Copying is not allowed.

Content encoded with CCI that has been decrypted bya CableCARD must be protected by re-encryptionwhen placed back on any digital interface such asIEEE1394. In addition, any analog outputs will includecopy protection.

Figure 5: V25 Chassis - Signal Block Diagram

7

Signal Block DiagramA block diagram of the V25 signal flow, shown in Fig-ure 5, shows the major components associated with theCableCARD.

The Main Tuner, TU8701, receives the digital cable sig-nal. The OOB Tuner, TU8702, receives the OOB data.After decoding takes place in IC8806, the MPEG trans-port bitstream and OOB data is relayed to PCB-DM3.The POD Interface then exchanges the data with theCableCARD plugged into the PCMCIA slot.

After de-scrambling, the data is passed along for MPEGDecoding. PIP/POP insertion and raster scaling canalso occur in the same IC.

After passing through the Doubler circuit for D/A con-version, the signal is directed to the VCJ and then to theCRT’s.

HDMI™High-Definition Multimedia Interface™ was developedto transmit uncompressed digital television and audiosignals from DVD players, set-top boxes and other au-diovisual sources to television sets, projectors and otherdisplays.

HDMI can carry all ATSC digital high definition videoformats and more. In addition, it supports up to 8 chan-nel digital audio and optionally, bi-directional control andstatus information.

As long as video formats and resolutions are compat-ible, devices meeting the specification for HDMI will becapable of inter-operating with one another regardlessof the manufacturer of the product.

Because of its additional capabilities, HDMI is used in-stead of MonitorLink™ (DVI) in much of Mitsubishi’s2004/2005 product line. However, with the use of asimple adaptor, HDMI is backwards compatible withDVI. So, models with DVI connections can be con-nected to those with HDMI. Of course, the connectionwill have the limitations of the DVI device, making it adigital video connection only. Audio would need a sepa-rate connection.

CEC Consumer Electronics ControlDDC Display Data ChannelDVI Digital Visual InterfaceEDID Extended Display Identification DataHDCP High-bandwidth Digital Content ProtectionHPD Hot Plug DetectTMDS Transition Minimized Differential Signaling

Acronyms/Abbreviations

Table 5

8

Shared TechnologiesHDMI shares many of the same technologies used byDVI. These shared technologies include:

• Transition Minimized Differential Signaling(TMDS)

• Display Data Channel (DDC)• Extended Display Identification Data (EDID)• High-bandwidth Digital Content Protection

(HDCP)• Hot Plug Detect (HPD)

An explanation of DVI and the shared technologies canbe found in the June/July 2003 edition of the Expanderand in the V23 Chassis Training Manual. The vari-ous abbreviations and acronyms used in this text aredetailed in Table 5.

HDMI Block DiagramFigure 6 shows a HDMI block diagram. Those famil-iar with DVI will notice both similarities and differencesbetween the two.

The HDMI cable has 4 differential pairs. Channels 0,1, 2 and a Clock make a up a single link TMDS. TheTMDS link carries both video and audio data.

The 24 bit video data is divided into 3 channels, 8 bitsper channel. The TMDS encoder converts the data intoa 10 bit, DC balanced, differential output.

Like DVI, HDMI can be configured in a single or duallink mode. However, since single link HDMI can sup-port video resolutions up to 1080p, consumer electronicproducts will use it exclusively.

Figure 6: HDMI Block Diagram

9

The audio data is included with the video in a data packetusing an additional 10 bit word transmitted during peri-ods when the video signal is inactive (blanking).

The Clock signal is used as a timing reference for datarecovery.

The Display Data Channel is a bi-directional I2C databus. This bus is used for the following:

1) Allows the host to read the EDID EEPROM tolearn the display’s configuration and capabilities.

2) Provides a data bus for HDCP operation.

Optionally, an additional serial data bus can be providedso data can be exchanged for device status and con-trol.. HDMI uses the Consumer Electronics Control,CEC, data protocol.

ReceptaclePlug

Figure 7: HDMI - Type A Connectors

Pin 1

Pin 2 Pin 18 Pin 2

Pin 1

Pin 18

Pin 19Pin 19

PIN SIGNAL PIN SIGNAL1 TMDS Data 2+ 2 TMDS 2 Shield3 TMDS Data 2- 4 TMDS Data1+5 TMDS 1 Shield 6 TMDS Data 1-7 TMDS Data 0+ 8 TMDS 0 Shield9 TMDS Data 0- 10 TMDS Clock+

11 TMDS Clock Shield 12 TMDS Clock-13 CEC (Optional) 14 No Connection15 SCL (DDC Clock) 16 SDA (DDC Data)17 DDC/CEC Ground 18 +5.0 VDC19 Hot Plug Detect

Table 6

HDMI ConnectorsThere are two types of connectors used by HDMI. TypeA connectors, for single link use, have 19 pins. Type B,dual link connectors, have 29 pins. The Type A con-nectors used by consumer electronic products are shownin Figure 7. Pin assignments are shown in Table 6.

Physically, HDMI connectors resemble the USB typesused in computer products. They are less than half thesize of DVI connectors. While no specification is set formaximum cable length, cables will be available up to 15meters (about 50 feet) in length.

10

HDMI Input Block DiagramFigure 8 depicts a block diagram of the HDMI inputcircuitry used on the V25 Chassis. The circuitry is simi-lar in other models.

TMDS Data and Clock signals are applied directly toIC2000. Vcc for the EEPROM, IC2020, is suppliedby the host device via the HDMI connector, pin 18. Atthe same time, this potential is fed back to pin 19 forHot Plug Detection. The host device communicates overthe DDC bus directly with the EEPROM to retrieve theEDID. IC2010 is used to convert the 5V I2C to 3.3Vlogic for compatibility with IC2000 when HDCP data isexchanged.

IC2000 decodes and outputs analog Y, Pr, Pb alongwith Horizontal and Vertical sync signals for selectionby the TV video input select circuitry. IC2000 also de-codes and outputs digital audio onto a I2S bus where itis sent to the digital to analog converter, IC2300, toobtain stereo audio for the TV’s audio output.

Note: Because NetCommand™ is used for devicecommunication and control in the V25 chassis, CEC isnot used. So, pin 19 of the HDMI Input has no connec-tion.

CableCARD is a trademark of Cable Television Laboratories, Inc.High-Definition Multimedia Interface and HDMI are trademarks of HDMI Licensing, LLC.DDC and EDID are trademarks of the Video Electronics Standard Association.TMDS is a registered trademark of Silicone Image, Inc.HDCP is a trademark of Digital Content Protection, LLC.

Figure 8: V25 Chassis - HDMI Block Diagram

1-1

Chapter 1Disassembly and Service

Figure 1-1: Lightbox Removal - 48” Models

With 8 different models, mechanical features and disas-sembly procedures vary in the V25. Since all featuresand disassembly procedures are in the Service Manual,this chapter will only provide a general discussion.

The V25 has the following mechanical features:• Removable Lightbox• Two piece cabinet (65” & 73” models)• Customer Removable DiamondShield™• Composite Cabinet Back (V25++)

LightboxLike previous Mitsubishi projection TV chassis, the V25is based on a modular design that allows the “lightbox”to be removed for service. Even without the front con-trol panel, card reader or front inputs, it is still fully func-tional by use of the remote control. This allows easieraccess to test points, etc. And, when “shop service”becomes necessary, this design has several more ben-efits.

• No lifting of heavy, bulky cabinets• No cabinet or screen damage.• Less customer inconvenience.

1-2

The lightbox removal procedure for 48” V25 models isshown in Figure 1-1.

1. Remove the Back Board by removing 7screws (a), 2 screws (b) and 8 screws (c).

2. Remove the Back Cover by removing 8screws (d).

3 Remove 4 screws (e) to remove the BoardSlide.

4. Remove 8 screws (f) to remove the BoardShelves.

5. Remove screw (g) holding the chassis.6. Remove 4 screws (h) securing the Light Box

Assembly.7. Be certain that all cables and connectors

between the Light Box Assembly and exter-nal items are disconnected (e.g. speakerplugs, etc.), including the USB and IEE1394connectors from the Card Reader to the DM.

8. Slide the Light Box Assembly from thecabinet.

The procedure is similar for all models. The 48” ver-sions do not require the removal of the black plasticBack Cover. Refer to the Service Manual for spe-cific disassembly instructions on all models.

NOTE: When V19, V21, V23 and V25 modelsare first plugged in, the front panel LED will flashfor about 1 minute indicating the “boot time” re-quired before the Power On command will berecognized. In addition, V23 models have a “En-ergy Mode,” If set to Low, the 1 minute boottime does not start until after the Power on com-mand is given. If the lightbox is being servicedwithout the front panel, no indication of these re-quirements will be present. V25 models do nothave the “Energy Mode” feature.

Although not required, for the reasons noted, it isusually better to have the front panel connected whenservicing the lightbox.

Main Chassis RemovalRefer to Figure 1-2 to remove the Main Chassis.

1. Undo the cable wire ties to the Front Panel,Speakers, CRTs, etc.

2. Unplug the Card Reader USB and 1394cables from the DM module (If required).

2. Remove screw (a) securing the Main Chassis[and screws (b) in models WS-55815 andWS-65815] .

3. Release the Chassis Locks on each side ofthe chassis.

4. Slide the Chassis out the rear of the unit.5. Tilt upward to access the bottom of the main

chassis.

1-3

Figure 1-2: Main Chassis Removal

Chassis

Chassis

(a)

(b)

PCB & Major Component LocationsPCB and major component locations are shown in Figures 1-3 and 1-4. The major circuit functions performed oneach PCB are listed in Table 1-1.

PCB-Terminal PCB-SignalNetCommand PIP-POP A/V Inputs Control uPCIEEE1394 Picture Format A/V Selection VCJCard Viewer 3:2 Pull Down 3D-Y/C ConvergenceOSD-Menus Line Double NTSC Video Audio AmpDigital uPC Control 480i to 480p Decoders Vertical Defl.MPEG Decoder Audio D/A Conv. Sys 6 - Learning

PCB-Tuner PCB-Main PCB-DBF PCB-HDMITuners : Main, Sub & OOB Horizontal Defl. Dynamic DVI DecoderDigital Demodulator High Voltage BeamAudio D/A Converter Power Supplies FormingAudio Processor SVM (Corner Focus)

PCB-DM3

Table 1-1: PCB Functions

1-4

Figure 1-3: PCB Locations

Figure 1-4: Main Component Locations

PCB Locations

SIGNAL-PCB

T U N E R -PCB

DM3-PCB

MAIN-PCB

DBF-PCB

TERMINAL-PCB

HDMI-PCB

E2P-PCBFIF-PCB

1-5

Figure 1-5: DM Replacement

(a)

(a)

(a)(a) (a)

(b)(b)

(c)

DM3 PCB ReplacementFollow the procedure below to replace the DM3 PCB.

1. Unplug the Card Reader USB and 1394 cablesfrom the DM3 PCB and refer to the ChassisRemoval Procedure to slide the chassis towardsthe rear of the set.

2. Remove screws (a) and remove DM cover.3. Remove screws (b) and nuts (c).3. Remove the PCB-E2P from the original DM

and plug it into the replacement DM.

4. Remove the PCB-FIF from the DM and installonto the replacement DM (V25+ and V25++only).

5. If CableCARD™ is installed, remove from theoriginal DM and plug it into the replacementDM.

5. Disconnect all wiring and connectors.NOTE: After replacement, notify customerto contact cable company to reprogramCableCARD. To access the CableCARD IDMenu, press <TV MENU> <9-9-9>

1-6

V25++ Composite Cabinet BackThe WS-65815 features a unique composite cabinetback that offers several advantages.

• Rounded edges in the back have a modernappearance.

• Unit construction gives it high strength.• Low Weight - about 100 lbs lighter than

comparable 65” models!

The disassembly procedure for the cabinet front dif-fers from conventional cabinets. Note how the Cos-metic Front Panel is removed. Refer to Figure 1-6.

Figure 1-6: V25++ Cabinet Front Disassembly

1. Remove the Speaker Grille by pulling forward.2. Remove 2 screws (a) securing the Cosmetic

Front Panel.3. Slide the Cosmetic Front Panel 1 inch to the

right, then lift away from the TV.4. Remove 6 screws (b) to remove the Board

Front.5. Unplug the LF connector.6. Remove the 4 screws (c) securing the Screen

Assembly.7. Lift the Screen Assembly up and away from

the cabinet.

2-1

Chapter 2Alignment Procedures

With the exception of the Service Menu access codes,the general alignment procedures for the V25 chassisremains the same as previous HD chassis. A chart show-ing all recent Service Menu Access Codes is providedabove. This chapter will give an overview of the fol-lowing alignment procedures.

• Initial Setup - Option Menu• Circuit Adjustment Mode• Convergence Adjustment Mode• Alignment Data Storage Locations

For specific alignments, refer to the Service Manual.

Initial SetupOption Menu - Initial SetupPrior to alignment, the procedures for initial setupshould be followed so that all customer Main Menuand A/V settings are set to the factory defaults listedin Table 2-1 and Table 2-2.

Follow the steps below for the initial set-up:

1) Select the "MENU" display by pressing the"MENU" button once.

2) Press the number buttons "2", "4", "7", "0" insequence to select the "OPTION MENU"display. See Figure 2-1.

3) Press the "ADJUST" button to select "INI-TIAL."

4) Press "ENTER."NOTE: At this time, all Main Menu and A/V settings will be set to the factory defaultsettings and channel 3 will be automaticallyselected.

Chassis Option Menu Adjustment Mode Convergence Mode OSD PositionVZ5/VZ6/V15 1-3-7-0 2-3-5-7 2-3-5-9 <6><5><4> Adjust ModeVZ7/VZ8/V16 1-2-7-0 1-2-5-7 1-2-5-9 <6><5><4> Adjust Mode

V17 8-2-7-0 8-2-5-7 8-2-5-9 <6><5><4> Adjust ModeVZ9/V18/V19 0-1-7-0 0-1-5-7 0-1-5-9 <6><5><4> Adj. Mode/0-1-8-8

V20/VK20 2-2-7-0 2-2-5-7 2-2-5-9 <6><5><4> Adjust ModeV21 2-1-7-0 2-1-5-7 2-1-5-9 <6><5><4> 2-1-8-8

K20/V22/V23/V24 0-3-7-0 0-3-5-7 0-3-5-9 <6><5><4> Adj. Mode/0-3-8-8V25 2-4-7-0 2-4-5-7 2-4-5-9 <6><5><4> Adj. Mode/0-3-8-8

Service Menu Access Codes

(MENU-2-4-7-0)OPTION MENUInitialPower restore :OFFDTV Port :AutoDirect Key Mode :OFF

Figure 2-1

2-2

AudioEdit Setup Clock Setting Manual Volume 30%Review Time 12:00 AM Bass 50%

Antenna 1 (✓) Enabled Date 01/01/01 Treble 50%Antenna 2 (✓) Enabled Daylight Saving Applies Balance 50%Input 1 (✓) Enabled Surround OffInput 2 (✓) Enabled Analog Captions On if Mute Listen to StereoInput 3 (✓) Enabled Background Gray Level Sound OnComponent 1 (✓) Enabled Digital Captions On if Mute TV Speakers OnComponent 2 (✓) Enabled Digital Settings Audio 2 Out MainHDMI (✓) Enabled Appearance Default VideoCard 1 (V25++) (✓) Enabled Contrast 100%Card 2 (V25++) (✓) Enabled V-CHIP Off Brightness 50%Card 3 (V25++) (✓) Enabled TV Rating TV-PG Sharpness 50%Card 4 (V25++) (✓) Enabled FV-Fantasy Violence (✓) Enabled Color 50%

Icon Position As above D-Sexual Dialog (✓) Enabled Tint 50%Ant-1, Ant-2, ComFlash L-Adult Language (✓) Enabled Color Temp. HighInput-1, Input-2, Input-3, Comp-1, S-Sexual Situation (✓) Enabled Video Noise StandardComp-2, HDMI, Cards 1…4 V-Violence (✓) Enabled Film Mode On

Program not Rated (✓) Enabled VSM Sharpness OnTransport Menu On Movie Rating PG Video Mute OnEnergy Mode Standard V-Chip Time Black Enhancement OnLanguage English Start Time 12:00 AMDigital Record Device PVR Stop Time 12:00 AM Color Balance ManualChannel View OFF PerfectColor™

Lock by Time Off A/V Memory for Ant-A All Centered Lock Time NA

Antenna ANT 1 Unlock Time NA Source Ant 1 Ch 3Memorize Channels Air Front Button Lock Off PIP Position Lower RightChannel Ch-3 POP Position Right HalfMemory Deleted A/V Memory Reset Ant-1 PIP/POP Format Dble. WindowPrefer Digital --- Format Stretched

MAIN MENU DEFAULT SETTINGSSETUP

AUDIO/VIDEO SETTINGS

V-CHIP LOCK

Advanced

PIP/POP

Table 2-1: Main Menu Factory Defaults

TIME

CAPTIONS

Lock By Time

ANTENNA

A/V Memory Ant 1/2INPUTS

1/2/3Compon.

1/21394 (If

connected)HDMI

Card 1~4 (V25++ Only)

Contrast Max. Max. Max. Max. Max. Max.Brightness Center Center Center Center Center CenterSharpness Center Center Center Center Center CenterColor Center Center Center Center Center CenterTint Center Center Center Center Center CenterColor Temp. High High High High High HighVideo Noise Standard Standard Standard N/A Standard N/AImage Type On On On N/A On N/ADefine Edge VSM On On On On On OnBass Center Center Center Center Center CenterTreble Center Center Center Center Center CenterBalance Center Center Center Center Center CenterSurround OFF OFF OFF OFF OFF OFFListen To Stereo N/A N/A N/A N/A N/ALevel Sound On On On On On On

A/V RESET DEFAULT SETTINGS (By Input)

Table 2-2: Audio Video Factory Defaults

2-3

Circuit Adjustment ModeMost of the adjustments can only be performed usingthe remote hand unit. See Figure 2-2. Many of theadjustments must be performed in both the 480i and1080i modes. Video/Color adjustments must be per-formed in the 480i and 1080i modes, and data must bepreset in the 480p (DVD) mode.

Note: Set the Remote Operational Mode to“NetCommand”. (Hold the “Power” buttonand press “9-3-5” in sequence.) This slowsthe remote’s response and makes adjustmentseasier. When adjustments are complete, setthe Remote to its’ original OperationalMode. (Hold the “Power” button and press“0-0-0” in sequence)

Activating the Circuit Adjustment ModeThe current signal source determines if the activatedAdjustment Mode is 480i or 1080i.

1. Select the signal source (480i or 1080i).2. Press the "MENU" button on the remote

control so the Main Menu is displayed.3. Press the number buttons "2", "4", "5", "7" in

sequence. The screen will change to the CircuitAdjustment Mode. See Figure 2-3.

Note: Repeat steps 2 and 3 if the circuit ad-justment mode does not appear on screen.

Figure 2-2: Remote Control

CHASSIS V25

FUNCTION CRT-VC

ADJ ITEM 22 CBOF 16 480i SIGNAL

ABBREV. DATA

Figure 2-3: Circuit Adjustment Mode

2-4

Selection of adjustment Functions and Adjust-ment ItemsTo select an adjustment item in the circuit adjustmentmode, first select the adjustment function that includesthe specific adjustment item to be selected. Thenselect the adjustment item. Refer to the followingpages for the listing of adjustment functions and ad-justment items.

1) Press the "AUDIO" button on the remote handunit to select an adjustment function. Each timethe button is pressed, the Function changes inthe sequence shown in Figure 2-4.

2) Press the “VIDEO” button to select a specificAdjustment Item. The Item number increaseseach time the “VIDEO” button is pressed.

Changing DataAfter selecting an adjustment Item, use the “ADJUSTUP/DOWN” buttons to change data.

• Press “ADJUST DOWN” to decrease the datavalue.

• Press “ADJUST UP” to increase the datavalue.

Saving Adjustment DataPress “ENTER” to save adjustment data in memory.The character display turns red for approximately onesecond in this step.

Note: If the circuit adjustment mode is termi-nated without pressing “ENTER”, changes inadjustment data are not saved.

Terminating the Circuit Adjustment ModePress the “MENU” button on the remote hand unit twiceto terminate the adjustment mode.

Note: The circuit adjustment mode can also beterminated by turning the power OFF.

Toggle Between Reception ModesPressing “3” when in the Adjustment Mode, CRT-VC Function toggles between 480i, 480p, 1080i. How-ever, data changes are not automatically saved. Press“ENTER” to save data before pressing “3”.

Service Mode ResetTo reset items in the Service Mode to their originalfactory adjusted values:

1) Press <TV MENU><2-4-5-7> to enter theService Mode. Press <0>

2) Select “Restore Backup”.3) Press <ENTer>

On Screen Display Position Adjustment ModeActivation

1) Select 480i or 1080i source.2) Press MENU-0-3-8-8

CRT_VC MMTX

CRT-JNGL SMTX

Adjustment Functions

Figure 2-4: Adjustment Functions

2-5

Convergence Adjustment ModeThe Convergence mode is used to perform raster ge-ometry correction and convergence adjustments. Theseadjustments must be made in both the SD (NTSC480i) and HD (1080i) modes.

Note: Before activating the Convergence mode,turn “Video Mute” Off. The internal crosshatchpattern will not be displayed with “Video Mute”On, only a blue background is displayed.

Convergence Mode Activation1. Press MENU-2-4-5-92. When the Convergence Mode is activated,

this display appears on a Green Crosshatch.See Figure 2-5.

Selecting the HD or SD Mode

• Press the “DEVICE” button.• Use the “UP-DOWN-RIGHT-LEFT”

direction buttons to select ANT-DTV,then press “ENTER”.

• Press “MENU-2-4-9-5” in sequence toactivate the Coarse Green HD Conver-

gence mode.

Convergence Mode FunctionsIn the Convergence Mode there are three main Func-tions (Categories).

• Pressing “6” activates CONV MISC• Pressing “5” activates COARSE CONV• Pressing “4” activates FINE CONV

CONV MISC (Press 6)This mode is used to preset data values controllingthe Convergence Generator, and to perform the HVRegulation adjustment.

1) Use the VIDEO button to select an item.2) Use the ADJUST buttons to change data.

NOTE: When Item “1 HVOL” is selected thescreen goes black except for the data display.This occurs since a black screen is requiredwhen making the HV Regulation adjustment.

COARSE CONV (Press 5)There are four Sub Functions in the Coarse mode,COARSE GREEN, COARSE RED, COARSEBLUE and DF.

• COARSE GREEN .... used to make CoarseRaster Geometry Adjustments.

• COARSE RED ... used to make Coarse RedConvergence Adjustments.

• COARSE BLUE ... used to make CoarseBlue Convergence Adjustments.

• DF ... used to preset data values controllingthe Dynamic Beam Focus circuit drivesignal.

1. Select the Signal Source before entering theConvergence Mode, either an NTSC or HDsource.

2. Enter the Convergence Mode• If the signal source is NTSC, the SD modeis activated.• If the signal source is HD, the HD mode is

activated.3. Activating the HD mode when no HD

signal is available

MODE FUNCTION SUB-FUNCTIONSD or HD

SD COARSE GREEN

0 HSTA 00

ITEM ABREV DATANO.

Figure 2-5: Convergence Mode

2-6

1) Use AUDIO button to select a SubFunction

2) Use the VIDEO button to select anAdjustment Item.

3) Use the ADJUST buttons to changedata.

FINE CONV (Press 4)This mode is used to perform Fine Raster Cor-rection, and Fine Red and Blue ConvergenceAdjustments. There are three Sub AdjustmentFunctions, selected with the AUDIO button:

• FINE GREEN .... a Green Crosshatchis displayed, to make Fine Raster Corrections.

• FINE RED .... a White Crosshatch is dis-played, to make Fine Red ConvergenceAdjustments.

• FINE BLUE .... a White Crosshatch is dis-played, to make Fine Blue ConvergenceAdjustments.

In the Fine mode a Cursor is added to the Crosshatch.See Figure 2-6. The ENTER button toggles the Cur-sor between two modes:

• MOVE (blinking Cursor) .... use the ADJUSTbuttons to select any of 64 points on theCrosshatch.

• ADJUST (Non blinking Cursor) .... the AD-JUST buttons adjust the active color at thecurrent Cursor position, horizontally or verti-cally.

The on-screen display changes in the Fine mode, asshown in Figure 2-7. The display shows the verticaland horizontal data for the current Cursor Position, andthe horizontal and vertical coordinates for that position.

Saving Data and Exiting the Convergence ModePress MENU twice to exit the Convergence mode. Datais automatically saved at this time.

Figure 2-6: Fine Convergence Mode

V23

CONV FINE GREEN

V13 H-4 SD

VERTICALDATA

HORIZ.DATA

Figure 2-7: Fine Convergence

Alignment Data Storage LocationsData accessed in the Convergence Adjustment Modeis stored in IC8D01 located on the PCB-Signal. Re-placement PCB’s are supplied pre-aligned so thatonly fine adjustments should be necessary after re-placement. All other service alignment data is storedon the PCB-E2P located on the DM assembly. Whenreplacing the DM assembly, retaining the originalPCB-E2P will minimize the need for any realign-ment.

3-1

Chapter 3Power Supply Circuitry

The block diagram above shows the main sections ofthe Power Supply circuitry. As in previous models, twotypes of DC supplies are generated, Standby andSwitched. Standby supplies are generated as long as

the TV is connected to an AC power source. Switchedsupplies are activated when the TV is switched On.

Switch Mode Regulators are the source for both typesof supplies.

3-2

Standby Power SupplyThe Standby Regulator circuit is shown in Figure 3-1.Since its operation is similar to that in previous models,a lengthy description is not required. Key points ofoperation are:

1) D9A01 supplies DC power to the regulatortransformer's primary winding. IC9A20 regu-lates the conduction frequency through theprimary by an internal FET (Source is pin 3,Drain is pin 1).

2) Start up voltage (16 volts) is supplied byR9A20 and R9A21 to pin 4 of IC9A20.

3) Feedback for regulation is from the STBY 12Vsupply through IC9A21 and PC9A50 to pin 6of IC9A20.

4) Pin 3 PROVIDES the Source ground return byway of R9A22.

5) Initial surge current is limited when the set is firstplugged in by R9A02. When AC current isdetected, the relay K9A50 closes, shunting theresistor. Full current is then available to the set.

Figure 3-1: Standby Power Supply

3-3

Figure 3-2: Switched Power Supply

3-4

Switched Power SupplyFigure 3-2 shows the Switched Power Supply Regula-tor. Portions of the Standby Supply are also shown forclarity. The theory of operation is the same for bothcircuits.

1) D9A01 supplies DC power to the regulatortransformer, T9A50, primary winding. IC9A50regulates the conduction frequency through theprimary by an internal FET (Source is pin 2,Drain is pin 3).

2) On-Off is controlled by switching the Start upvoltage (16 volts) to pin 4 of IC9A50.

3) Feedback for regulation is from the 120Vsupply through IC5A01 and PC9A50 to pin 1of IC9A50.

4) Pin 2 PROVIDES the Source ground return byway of R9A54 and R9A55.

On-Off1) PON2 command from the TV uPC turns on

Q9A51.2) This activates a Photo Coupler in PC9A50.3) This turns on Q9A50 feeding 16V to pin 4 of

the regulator.

4-1

Chapter 4Control Circuitry

As in the three earlier integrated HDTV chassis, V19,V21 and V23, the V25 uses two Microprocessors inthe Control circuitry.

1) TV µPC … controlling the analog circuitry.2) DM3 µPC … controlling the digital circuitry.

The two µPCs constantly communicate with each other.User commands are input to the TV µPC. Digital com-mands are forwarded from the TV µPC to the DM µPC.The TV µPC generates Control commands from twosources.:

1) User commands from the front panel or remotecontrol

2) Commands from the DM3 µPC.

Even though circuitry is becoming more complex, thesame basic requirements must be met for a µPC to op-erate.

Basic µPC RequirementsFigure 4-1 illustrates the four basic requirements forthe TV µPC operation in the V25.

1) DC Supply … 3.3V-ES and 5VS.2) Ground Returns … pins 8, 9 and 14.3) Timing Signal … 15 mHz Clock Oscillator4) Reset circuitry … sets the µPC to its nominal

starting point

There is similar circuitry for the DM3 µPC. Since theDM3 is considered a replaceable component we are

4-2

not showing the details of the DM3 circuitry. Figure 4-1 shows only the DC supplies and Reset signal going tothe DM module.

Reset CircuitryFigure 4-2 illustrates the Reset circuitry in more detail.The normal and Reset logic are shown in the diagram.

IC7A02 is the Reset IC. A Low from pin 1 resets theTV µPC. IC7A02 is a Watch Dog type of Reset ICthat monitors the µPC’s operation. It has an internalcounter that is continually reset by pulses from the µPC,input at pin 4 of the IC. If the µPC locks up, no pulsesare generated. The counter reaches its maximum countand a reset pulse is output at pin 1 to reset the µPC.

4-3

Both the µPCs have the ability to reset each other ifcommunication is lost. If the TV µPC gets no responsefrom the DM, it outputs a High at pin 73 of IC7A00.The High drives the DM-RESET input at the KD con-nector.

Conversely, if the DM µPC gets no response fromIC7A00, the DM outputs a Low at the KD connector.The Low, through IC7A02 activates the TV Reset pulse.

When the front panel System Reset button is pressed,both µPCs are reset.

Input Command CircuitryFigure 4-3 illustrates the Command Input circuit. It issimilar to the input circuitry on many models so an indepth description is only necessary on those parts thatare different.

The front panel Buttons are in a conventional resistiveladder configuration. Pressing a button changes thevoltage at the KSC0 or KSC1 input of the µPC. Thecommand is identified by the change in voltage at theKSC input.

There are differences in the Remote input circuitry dueto the Remote Learning feature. As in previous modelsthere are two Remote Preamps:

1) A conventional Mitsubishi Preamp.2) A wideband Preamp amplifying the IR signals of

most manufacturers.

IR signals from a Mitsubishi Remote are directed to theRMC input of IC7A00.

Other manufacturers IR signals are amplified by the WideBand Preamp, directed through IC7P01 to the IR Emit-

4-4

ter Outputs. In addition this circuitry is used for the IRLearning feature.

Figure 4-4 shows the circuitry used for theNetCommand feature. Remote commands intended forexternal devices are relayed from the TV uPC to theDM3 PCB. From there, they are either directed to a

IEEE1394 bus or to the System 6 IR circuit on the Ter-minal PCB for broadcast on an IR emitter.

Control Block DiagramFigure 4-5 shows the overall control circuitry along withthe Serial Data lines indicating the circuits they control.

4-5

4-6

µPC Parallel InputsThe parallel inputs to the µPC are status inputs or sig-nals inputs required for control purposes. Four of theseinputs can cause the set to shut down.

AC-OFF InputInforms the µPC if AC Power is lost. The monitoringcircuit is shown in Figure 4-6. Samples of the input ACare applied to the base of Q9A55. D9A02 removesthe negative half of the sine waves. The remaining posi-tive half cycles keep Q9A55 conducting. With Q9A55conducting PC9A21 conducts, turning Q7A45 On. Theconduction of Q7A45 holds the AC-OFF input toIC7A00 Low.

If AC power is lost, Q9A55, PC9A21 and Q7A45 allquit conducting, allowing pin 45 of IC7A00 to go High.This informs the Control circuitry power has been lost.The µPC responds by rapidly storing all user program-ming and service adjustments to memory. It also out-puts a High on the Power Good line, informing the DMof the power loss.

SHORT DetectThe short Detect circuitry is shown in Figure 4-7. If ashort occurs in the + or – 25V supplies, pin 44 onIC7A00 is driven Low indicating a short and the TVwill shut Off. With -25V shorted, the 12VS supply turnsQ9A52 On, pulling the SHORT line Low. If +25V isshorted D9A52 is forward biased and the short line goesLow.

X-RAY ProtectRefer to Figure 4-8, the X-Ray input is at pin 47 ofIC7A00, and is normally High. The X-Ray Protectcircuit monitors:

• Excessive HV• Excess CRT Beam Current• Excess HV circuit Current

If any of the preceding occurs, the X-Ray line goes Low,and the TV shuts Off.

The monitoring circuits for X-ray Protect are describedin the detail in the Deflection and HV Section.

4-7

4-8

Data StorageLike previous chassis, service data is stored in 2 sepa-rate EEPROMS.

• Convergence Data: IC8D01 located on theSignal PCB.

• Service Data: PCB-E2P located on the DM3PCB

IC7A00 Additional InputsPin # Name Source

6 SD-SUB Sub Tuner Sync Detector7 SD-MAIN Main Tuner Sync Detector62 H-SYNC-IN ASIC Horizontal Sync64 V-SYNC-IN ASIC Vertical Sync92 AFT1 Main Tuner AFT voltage.93 AFT2 Sub Tuner AFT voltage94 VBLK Deflection Loss Detect circuit97 CV-IN-2 Sub Video (CCD, V-chip,etc)

100 CV-IN-1 Main Video (CCD, V-chip,etc)

Table 4-1: µPC Inputs

Additional IC7A00 OutputsPin # Name Purpose

42 BLNK-CRT Blanks CRTs during Input &Channel changes.49 PON-2 Power ON: (Defl, Conv, HV, etc. circuitry)50 PON-1 Power ON: Signal Processing circuitry)51 BWC Band Width Control for Doubler Output52 FO Sets the Free Run Horizontal Frequency56 F31K Decreases H-Defl DC supply for 31.5 kHz.57 DEFL-MUTE Decreases H-Defl DC supply during freq. change.80 MUTE SPKR Mutes the TV's Speakers82 POWERGOOD Informs the DM that the DC Power is ok86 MTRENBL Mutes Monitor Out Audio87 DM SUB PWR Activates/Deactivates the DM Standby Power

Table 4-2: µPC Outputs

Deflection Loss ProtectRefer to Figure 4-9. Loss of either horizontal or verti-cal deflection or the +25 volt source causes a High con-dition at pin 94 of the uPC. The detection circuitry isdiscussed in chapter dealing with deflection.

Parallel Inputs & OutputsMost of the parallel inputs and outputs are listed in Tables4-1 & 4-2. Most of them have been used before andneed no explanation.

When replacing the Signal PCB, replacement PCB's arepre-aligned to minimize the adjustments required.

When replacing the DM3 PCB, transfer the original E2PPCB from the old DM3 to the replacement.

5-1

Chapter 5Video/Color Circuitry

The above block diagram illustrates the Video/Colorcircuitry in the V25 chassis. The A/V Switch circuitryselects main and sub picture signals from NTSC signalsources.

Note that all picture sources are processed by the DM3circuitry.

Also the diagram indicates that the Sub Picture sourcecan only be from a NTSC source, an External Compo-nent Input or the HDMI input.

Video PathFigure 5-1 illustrates the Video Signal Path. All analogsources are selected on the Terminal PCB. Note: WhileHDMI is a digital input, it is converted to analog on theHDMI PCB before being sent to the Terminal PCB.

As discussed in the Introduction, the Main Tuner is ca-pable of digital or analog reception. When analog, thesignal is sent to the Terminal PCB. When digital, thesignal is demodulated and sent directly to the DM3 PCB.

5-2

The following functions are performed on the DM3 PCB:• Line Doubling• Display Formatting• PIP/POP• Color Management• 3:2 Pull Down• On Screen Display• CableCARD Interface• Digital Signal I/O (IEEE1394 & Card Reader)• Digital Signal Processing

CRT Drive & Protect CircuitryFigure 5-2 shows the CRT Drive circuitry. Since it isthe same as that in the V21 & V23, no explanation isnecessary. The CRT Protection circuitry is also the sameas the V21 & V23, but a review may be in order.

When Q2W03 conducts, it turn On Q2W05, Q2W08and Q2W11. The conduction of the three transistorsremoves RGB drive to the CRT's.

The conduction of Q2W03 is controlled from twosources:

5-3

1) The ENABLECRT command from the µPC,momentarily blanks the CRTs during channel orinput selection changes.

2) The VBLANK line. The logic on theVBLANK line is controlled by Deflection LossDetection circuitry.

A High on VBLANK blanks the CRTs. The DeflectionLoss Detection circuitry is discussed in detail in the Sec-tion on Deflection and HV.

5-4

6-1

Chapter 6Sync, Deflection & High Voltage

The Overall Sync, Deflection and High Voltage circuitryin the V25 is shown in the Block Diagram at the top ofthe page. The V25 can display either of two scanningformats, 480p or 1080i. The horizontal scanning fre-quency for 480p is 31.5 kHz, and 1080i is 33.75 kHz.

Conventional 480i TV signals have a scanning rateof 15.75 kHz. For these signals, line doubling cir-cuitry changes the signal format from 480i to 480p.

In NTSC and Component format signals, horizontaland vertical sync must be extracted from the Y sig-nal by the NTSC Decoder.

Sync Select circuitry selects the Main picture sync source.The selected output is used to synchronize the Horizon-

tal and Vertical Deflection Generators. If the sourcesignal is 480i, horizontal sync is doubled, before syn-chronizing the Horizontal Drive Generator.

Horizontal deflection drive is amplified by the Hori-zontal Output circuitry and directed to the horizon-tal windings in the Deflection Yokes. The signalfrom the Horizontal Output is also directed to HVDrive circuitry. HV Drive is amplified at directed tothe Flyback transformer.

Vertical sync synchronizes the Vertical DeflectionGenerator. Output from the Vertical Generator isamplified in the Vertical Output circuitry and directedto the vertical windings in the Deflection Yokes.

6-2

Sync Signal PathFigure 6-1 illustrates the Sync Signal Path. IC2K01selects the Analog Sync. Sync must be extracted fromNTSC, Composite and Component Format Y Signals.NTSC and Composite signals are 480i scanning for-mat. Component signals can be 480i, 480p or 1080i.

IC2N01 the Main NTSC Decoder, extracts horizontaland vertical sync when the source signal is composite orcomponent video.

The selected sync is directed to the PCB-Signal viaconnector JA, and then to the DM3 circuitry.

The Sub Sync Signal Path for the Sub-Picture signals ison the PCB-Terminal. It functions the same as the MainSync Signal Path using different pin sets. The sub syncsignals are used by DM3 circuitry for POP/PIP signalprocessing.

The selected sync is directed to the Doubler circuitry onthe DM3. If the selected source is 480i, the number ofhorizontal lines are doubled. When the selected sourceis 480p or 1080i, no line doubling is required. How-ever, since all sync signals, 480i, 480p and 1080i passthrough the DM3, the TV cannot be operated with theDM3 PCB unplugged.

6-3

Vertical DeflectionFigure 6-2 shows the Vertical Deflection circuitry. TheVertical Deflection Generator in the VCJ outputs push-pull type of vertical deflection drive signal, +VDR atpin 53 and –VDR at pin 52. Both signals are applied tothe Vertical Output IC, IC4B01. The amplified outputfrom IC4B01 is directed to the vertical coils in the De-flection Yokes.

D4B01 and C4B04 make up the pump-up circuitry.

Feedback from the Deflection Yokes ground return atpin 4 of DY, to pin 1 of IC4B01 provides linearity andS correction.

6-4

Horizontal DeflectionFigure 6-3 illustrates the Horizontal Deflection Driveand Output circuitry. Horizontal drive signal from theVCJ is amplified by Horizontal Drive circuitry includingtransistors Q5A35, Q5A40, Q5A33, Q5A39 andQ5A32.

The output from Q5A32 is directed to Q5A31, theHorizontal Output transistor. The output from Q5A31takes three paths:

1) To the horizontal windings in the DeflectionYokes

2) Through C5A32 to the HV Drive circuitry.3) Through T5A31, providing the source for the

CRT filament supply.

Horizontal Deflection DC Supply CircuitryThe DC supplies for Q5A32 and Q5A31 are derivedfrom the Horizontal Deflection DC Supply circuitry.IC5A04 regulates Q5A31 using pulse width modula-tion. Inputs to IC5A04 circuitry are:

• HDRV - Provides timing.• HMUTE - Reduces the Deflection DC supply

during scanning frequency changes.• EWDRV - Adds side pincushion correction,

controlled by the EWDRV signal from the VCJ(Vertical Parabola).

• F31K - Increases the supply voltage by ap-proximately 10 volts for the 33.75 kHz scanformat (1080i), over the 31.5 kHz scan (480p).

6-5

Deflection Loss DetectionTo prevent damage to the CRTs, the video must beblanked and the TV must shut Off if deflection is lost.The Deflection Loss Detection circuit is similar to previ-ous models, as shown in Figure 6-4.

Q4B01 monitors vertical deflection, and Q5A38monitors horizontal deflection. The conduction ofboth transistors holds their respective collector volt-

age below the forward bias point of the diode in theircollector circuit's (D4B04 or D5A12).

If either Q4B01 or Q5A38 stop conducting, indicatinga loss of deflection, the increase in that transistor’s col-lector voltage drives the V-Blank line High. The V-Blank line goes to the CRT Blanking and uPC circuitryimmediately removing all drive to the CRTs and shuttingdown the TV.

6-6

HV & HV RegulationFigure 6-5 illustrates the HV and HV Regulation cir-cuitry. Drive from the Horizontal Deflection Output cir-cuitry is applied the HD-IN input of IC5A00. IC5A00amplifies the signal which is output at pin 1, and throughQ5A07 and Q5A09, is applied to the gate of Q5A51.

The output of Q5A51 is the drive signal for the Fly-back transformer, T5A51. In the Flyback, the sig-nals are stepped up and rectified to generate the HVand Focus voltages for the three CRTs.

The amount of HV generated depends of the conduc-tion time of Q5A51, the longer the conduction time themore energy supplied to the Flyback, and HV increases.HV is regulated by controlling the duty cycle of the drivesignal to Q5A31.

A sample of the HV, HV-DC-FB, is derived from aninternal resistive divider in the Flyback and is output at

pin 13. The HV sample is applied to the non-invertinginput of an OP-Amp in IC5A01. The HV ADJ voltagein applied to the inverting input of a second OP-Amp inIC5A01. The outputs of both OP-Amps are combinedand directed to pin 4 of IC5A00.

DO NOT measure the HV-DC-FB voltage at pin 13of the T5A51. The meter may load down the internalresistive divider, resulting in excessive HV.

X-Ray ProtectX-Ray Protect circuitry is the basically the same as inprevious models, as shown in Figure 6-6. The X-RayProtect circuit in the V25 monitors three items:

1) Q5A51 (HV Output) current, by monitoringQ5A51 source voltage.

2) Excessive HV, by monitoring the rectifiedvoltage from D5A57.

3) Excessive CRT Beam current, by monitoringthe voltage at pin 10 of T5A51.

6-7

Each of the monitored sources is applied to an input ofan OP-Amp in IC5A02. The second input of each OP-Amp is connected to a specific reference. The outputsof all three Op-Amps are tied together at the X-Rayline.

The X-Ray line is normally High. If any of the moni-tored sources exceeds its’ specific reference the X-Rayline is pulled Low, shutting Off the TV.

The connection from the source of Q5A51 to pin 5 ofIC5A00 provides further protection. If the source volt-

age becomes excessive (excess current), IC5A00 im-mediately removes all drive to Q5A51.

Q5A20 and its associated circuitry comprise an ArcProtect circuit. If a CRT Arcs, this circuitry immedi-ately removes HV Drive.

If X-Ray Protect shuts the TV Off, pressing the Powerbutton will turn the TV back On (it may shut Off again ifthe problem still exists). If Arc Protect is activated, ACpower must be removed and re-applied before it canbe switched back On.

6-8

7-1

Chapter 7Convergence Circuitry

The Overall Block Diagram above shows the V25 Con-vergence Circuitry.. A Waveform Generator generatesthe convergence correction signals timed from horizon-tal and vertical sync pulses. The correction signals fromthe Waveform Generator are in a serial digital format.

The following Digital/Analog Converter changes thedigital signals to analog signals. The analog signalsfrom the D/A Converter are directed LPF (Low PassFilter) and Summing Amplifiers. Any remaininghigh frequency digital signals are removed and theanalog correction signals are amplified. Green correc-

tion signals are added to the red and blue signals in theAmplifiers, hence the name Summing Amplifiers.

The correction signals are amplified by Output Amplifi-ers and are directed to the sub coils in their respectiveDeflection Yokes.

This is the same basic circuitry used in the last fewchassis types. The major difference in V25 Conver-gence circuitry is that it is all located on the Signal PCB.

Convergence Circuitry - Overall Block Diagram

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Waveform Generator & D/AConverter

Figure 7-1 illustrates the Convergence Waveform Gen-erator and Digital/Analog Converter circuitry. HorizontalSync from the doubler circuitry is applied to pin 31 ofIC8D00. Vertical Sync is applied to pin 27. From thesetwo signals, IC8D00 generates six Convergence Cor-rection signals, consisting of horizontal and vertical cor-rection signals for each CRT.

Correction signals from IC8D00 are converted toanalog signals in IC8E03 and are then directed toLPF and Summing Amplifiers.

Convergence Control signals are also shown in Fig-ure 7-1. These include:

• C-SCL … Serial Clock• C-SDA … I2C Data line• CONVMUTE … disables the Convergence

circuitry when the set is first powered on, off,

and when exiting the convergence mode (whendata is stored in memory).

• CONVBUSY … Allows IC8D00 to notify theµPC if it is busy.

• CONVACK … Acknowledgment line, allowsnotification to the µPC that a command wasreceived.

• CONVRST … Convergence Reset

IC8D00 also generates the signals for the internalcrosshatch pattern. These are the C-OSDR, C-OSDGand C-OSDB signals that are directed to the VCJ.The C-BLK signal from IC8D00 times the cross-hatch pattern insertion in the picture.

Two additional signals from IC8D00 are HV-ADJand DF. HV-ADJ is set by the service HV adjust-ment and is directed to the HV Regulation circuitry.DF (Dynamic Focus) is a parabolic signal used bythe DBF (Dynamic Beam Focus Circuitry).

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LPF & Summing AmpsFigure 7-2 illustrates the LPF and Summing Amplifiers.The circuitry consists of three ICs, IC8E00, IC8E01and IC8E02. Each correction signal from IC8D00 goesthrough two stages of amplification:

1) The first stage is part of the LPF.2) The second stage is the Summing Amplifier.

Green horizontal and vertical correction signals are addedto the Red and Blue Summing Amplifier inputs.

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Convergence Output CircuitryFigure 7-3 shows the Convergence Output circuitrylocated on the PCB-Power. The correction signals areamplified and directed to the Sub Vertical and Sub Hori-zontal coils located within their respective red, greenand blue Deflection Yokes.

CONVMUTE, at pin 2, disables the ConvergenceOutput circuitry when the set is first powered on, off,and when exiting the convergence mode (when data isstored in memory).

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Chapter 8Sound Circuitry

The V25 Sound Circuitry is shown above in the BlockDiagram, Figure 8-1. All the analog signal select cir-cuitry on the Terminal PCB is conventional.

The sound signal from the DM3 PCB is initially receivedin a digital format from the ATSC/QAM Tuner, the IEEE1394 inputs, or the Media Card Player. This digital sig-

nal is sent from the DM3 to the Tuner PCB on connec-tor DB. IC3002 performs the D/A conversion. Theanalog DM audio or the analog HDMI audio (D/A con-version is performed on the HDMI PCB) is selected byIC3006 & IC3007 before being sent to the Sound Pro-cessor, IC3004.

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Three functions of the Sound Processor, IC3004 are:1) Audio Signal selection between:

• DM/HDMI• Terminal PCB• Main Tuner (NTSC)

2) A/D signal conversion for the selected signal.3) Signal selection for the Monitor Output.

After conversion, the digital audio is sent to the DM3PCB. The DM3 performs D/A conversion and sends L& R audio to the Audio Amplifier, IC3E01, on the Sig-nal PCB for the TV speakers.

Digital Audio OutputThere is one additional audio output signal in the V25chassis, External Digital Audio Output on the rear of theDM3. This is an AC-3 digital data stream (when avail-able from a digital source). It allows connection to anexternal A/V Receiver with an AC-3 Decoder. If thesignal has been fully encoded, and the AC-3 Decoder iscapable of producing 5.1 surround sound, 5 full audiochannels (20 kHz) and one low frequency enhancementchannel (120 Hz) can be reproduced. Note: This Out-put does not apply to digital audio played from the MediaCard Player.

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Chapter 9Troubleshooting Tips

Use the following tips when troubleshooting the sourceof a problem in the V25 chassis.

Using The Front Panel LEDThe Front Panel LED helps isolate the cause of thefollowing problems.

• The TV will not turn On.• The TV turns On, and then Shuts Off.

If the TV will not turn On, the LED response indi-cates the possible cause of the problem. Table 9-1 liststhe possible LED response when this problem occurs.

When the TV turns On and then shuts Off, the LEDDiagnostic Error codes help isolate the problem. Thisis the same LED Diagnostic featured on some previ-ous model TVs.

Figure 9-1 shows the LED Error Code Activation Pro-cedure, an is describe in the following:

1) With the TV Off2) Press and hold the front panel "MENU" and

"DEVICE" buttons for 5 seconds.3) The LED will flash the Error Code indicating

what caused the TV to shut Off.4) The Error Code will be repeated 5 times.5) When the LED stops flashing the mode is

automatically terminated.

Reading the Error CodesThe Error Codes are two digit numbers. The LED:

• Flashes the value of the most significant digit(MSD).

• Then there is a pause.• Flashes the value of the least significant digit

(LSD).• The Error Code is repeated 5 times.

As an example, Figure 9-2 illustrates the LED drive forError Code "23". Table 9-2 lists the Error Codes andtheir possible cause.

LED Indications Conditions Probable CauseOff After AC is applied Standy Power Supply or TV µPC not running

Fast Blink for 70 sec. After AC is applied Normal - DM µPC is booting up

Fast Blink (doesn't stop) After AC is applied TV µPC is running, but DM3 failed to boot up. DM3 Fan not operating.

Slow Blink Set is Off Normal - Timer is set for Automatic Turn ONTable 9-1: Front Panel LED Indications

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Possible checks for each condition are as follows:12 Check the Power Supply and AC Off circuits

on the Main PCB.21 Check the HV, HV Regulator, and XRAY

circuits on the Main PCB.22 Check the +25V and -25V supplies on the

Main PCB.23 Check the +25V supply first, then the Horizon-

tal Deflection circuit on the Main PCB, then theVertical Deflection circuit on the Signal PCB.

+25V & -25V SuppliesFor problems with the +25V & -25 V supplies, checkfor excessive current draw by the Convergence circuit.Unplug the Convergence Yokes at connector VU onthe Signal PCB. If the current returns to normal, sus-pect a defective Convergence Output Amplifier.

The Vertical Output Amplifier, also on the Signal PCB,is another likely suspect for excessive current draw onthe +25V source.

Deflection Troubleshooting.Troubleshooting problems in the CRT Protect, Deflec-tion Loss Detection and the Deflection circuits, some-times involves disabling the CRT Protect circuitry andthen Powering up the TV.

IMPORTANTTo prevent any possible phosphor damage,unplug all 3 CRT PCB's from the CRT's.

After disconnecting the CRT's, the protection circuitscan be disabled as follows.

1) Remove zener diode D5A13 on the Main PCBto troubleshoot the Horizontal circuit.

2) Remove D4B01 on the Signal PCB to trouble-shoot the Vertical circuit.

3) Remove R5A08 on the Main PCB to trouble-shoot the +25V source.

The set then can be switched On for troubleshootingwithout damaging CRT phosphors.

Error Code Probable Cause12 No error detected21 X-Ray Protect22 Short Protect23 Loss of DeflectionTable 9-2: Error Codes

Copyright © 2004 Mitsubishi Digital Electronics America, Inc.9351 Jeronimo Road • Irvine, CA 92618-1904

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