V2 Control

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    Modeling of V2Current-Mode Control

    Jian Li and Fred C. Lee

    Center for Power Electronics SystemsThe Bradley Department of Electrical and Computer Engineering

    Virginia Polytechnic Institute and State University

    Blacksburg, VA 24061 USA

    Abstract-Recently, the V2type of constant on-time control has

    been widely used to improve light-load efficiency. In V2

    implementation, the nonlinear PWM modulator is much morecomplicated than usual, since not only is the inductor currentinformation fed back to the modulator, but the capacitor voltageripple information is also fed back to the modulator. Generallyspeaking, there is no sub-harmonic oscillation in constant on-time control. However, the delay due to the capacitor rippleresults in sub-harmonic oscillation in V2constant on-time control.So far, there has been no accurate model to predict instabilityissue due to the capacitor ripple. This paper presents a newmodeling approach for V2 constant on-time control. The powerstage, the switches and the PWM modulator are treated as a

    single entity and modeled based the describing function method.The model for the V2 constant on-time control achieved by thenew approach can accurately predict sub-harmonic oscillation.Two solutions are discussed to solve the instability issue. Theextension of the model to other types of V2current-mode controlis also shown in the paper. Simulation and experimental resultsare used to verify the proposed model.1

    I. INTRODUCTIONCurrent-mode control architecture has been widely used for

    years [1]-[6]. For practical implementation, the equivalent

    series resistance (ESR) of the output capacitor can be used as

    the sensing resistor [7], which means that the output voltage

    ripple, which includes the current information, can be directly

    used as the ramp for the duty cycle modulation, as shown inFig. 1. Later, the control structure can be implemented with

    an additional compensation loop, which is called the V2

    current-mode control [8], [9], as shown in Fig. 2.

    Based on different modulation schemes, these two

    architectures consist of constant-frequency peak voltage

    control, constant-frequency valley voltage control, constant

    on-time control, constant off-time control and hysteretic

    control. Among all of these control structures, the constant

    on-time control is the most widely used to improve light-load

    1This work was support by Analog Devices, C&D Technologies,CRANE, Delta Electronics, HIPRO Electronics, Infineon, Intel,International Rectifier, Intersil, FSP-Group, Linear Technology,LiteOn Tech, Primarion, NXP, Renesas, National Semiconductor,

    Richtek, Texas Instruments.This work also made use of Engineer Research Center Shared

    Facilities supported by the National Science Foundation under NSFAward Number EEC-9731677.

    Any opinions, findings, and conclusions or recommendationsexpressed in this material are those of the authors and do notnecessarily reflect those of the National Science Foundation.

    efficiency, since the switching frequency can be lowered to

    reduce the switching-related loss, as shown in Fig. 3.

    Figure 1. Ripple regulator

    Figure 2. V2control architecture

    Figure 3. V2constant on-time control structure

    In the V2 implementation, the nonlinear PWM modulator

    becomes much more complicated, because not only is the

    inductor current information fed back to the modulator, but the

    capacitor voltage ripple information is fed back to the

    modulator as well. Generally speaking, there is no sub-

    harmonic oscillation in the constant on-time control. However,

    the delay due to the capacitor ripple results in sub-harmonic

    oscillation in the V2constant on-time control, as shown in Fig.

    4. The system is stable when used with the OSCON capacitor,

    because the inductor current information dominates the total

    output voltage ripple; meanwhile sub-harmonic oscillation

    occurs when the ceramic capacitor is used with the constant

    on-time control, since the capacitor voltage ripple is too large.

    This phenomenon also occurs in peak voltage control [8].

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    (a)

    (b)Figure 4. Sub-harmonic oscillation in V2constant on-time control:

    (a) OSCON capacitor (560F/6m), and (b) ceramic capacitor(100F/1.4m)

    Modeling of the V2control becomes a challenge due to the

    complexity of the PWM modulator. Previously, R. Ridleys

    model [10] was widely used to design the converter with

    current-mode control. However, its not reasonable to extendR. Ridleys model to the V2implementation, since his model

    is based on discrete-time analysis, which does not consider the

    influence of the capacitor ripple. This is why the models used

    in [11]-[13] cant accurately predict the influence from the

    capacitor ripple in the peak voltage control; all of them are

    extension of R. Ridleys model. In [14], the Krylov-

    Bogoliubov-Mitropolsky (KBM) algorithm is used to improve

    the accuracy of the model, but numerical computation is

    required. So far, there is no accurate model for V2current-

    mode control.

    Recently, a new modeling approach has been proposed to

    model current-mode control [15]. In this modeling approach,

    the describing function (DF) method [16]-[18] is used tomodel the non-linear current-mode modulator to obtain the

    transfer function from the control signal vc to the output

    voltage vo. A similar methodology can be applied here as well.

    In Section II, constant on-time control is used as an example

    to illustrate the modeling process and the prediction of the

    sub-harmonic oscillation is shown in the proposed model.

    Then, Section III describes two solutions to solve the

    instability issue. In Section IV, the extension of this model to

    other V2 types of current-mode control is presented.

    Simulation and experiment are used to verify the model in

    Section V. Finally, a summary is given in Section VI.

    II. PROPOSED MODELING APPROACH FOR V2CONSTANT ON-TIME CONTROL

    The V2 constant on-time control is used to exemplify the

    proposed modeling approach. As shown in Fig. 5, the non-

    linear constant on-time modulator consists of switches, the

    output voltage, the comparator and the on-time generator. Its

    reasonable to treat these components as a single entity to

    model instead of breaking them into parts. In the proposed

    modeling approach, the describing function (DF) method is

    used to model the non-linear current-mode modulator to

    obtain the transfer function from the control signal vc to the

    output voltage vo.

    Figure 5. Modeling Methodology

    As shown in Fig. 5, a sinusoidal perturbation with a small

    magnitude at the frequency fmis injected through the control

    signal vc; then based on the perturbed output voltage

    waveform, the describing function from the control signal vc

    to the output voltage vo can be found by mathematical

    derivation. Before applying the DF method, it is necessary to

    make several assumptions: (i) the magnitude of the inductor

    current slopes during the on-period and the off-period stay

    constant separately; (ii) the magnitude of the perturbation

    signal is very small; and (iii) the perturbation frequency fmand

    the switching frequency fsare commensurable, which meansthat Nfs = Mfm, where N and M are positive integers.

    Following the modulation law of V2constant on-time control,

    the duty cycle and the output voltage waveforms are shown in

    Fig. 6.

    Because the on-time Ton is fixed, the off-time Toff ismodulated by the perturbation signal vc(t):

    )2sin()( 0 ++= tfrrtv mc , where r0 is the steady-state DC

    value of the control signal,0r is the magnitude of the

    perturbation, and is the initial angle. Based on the

    modulation law, it is found that:

    Figure 6. Perturbed waveform

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    )()(

    )1(1

    )(

    /]/)()([)()(

    )1(1

    iofffioffic

    o

    Tt

    Tt LoLonnioffic

    TsTtv

    CdtRtvtiTsTtv ioffi

    ioffi

    ++=

    ++ +

    +

    (1)

    where, Toff(i) is the ith cycle off-time, soinCon LVVRs /)( = ,

    soCof LVRs /= , Lsis the inductance of the inductor, RCois the

    ESR of the output capacitors, Co is the capacitance of the

    output capacitors, RL is the load resistor, iL(t) is the inductor

    current, and vo(t) is the output voltage. Assuming

    )()( ioffoffioff TTT += , where Toffis the steady state off-time, and

    Toff(i)is the ithcycle off-time perturbation, tican be calculated

    as:

    =++=

    1

    1 )())(1(

    i

    k koffoffoni TTTit . Based on (1), it is found

    that:

    oLm

    m

    ioffic

    m

    ioffic

    oLm

    m

    ioffic

    m

    ioffic

    iofficioffic

    iofficioffic

    i

    Coo

    offon

    i

    Coo

    off

    f

    CRf

    fTtv

    fTtv

    CRf

    fTtv

    fTtv

    TtvTtv

    TtvTtv

    TRC

    TTT

    RC

    Ts

    ++

    ++

    +

    ++

    ++

    ++

    ++=

    +

    +

    2

    )22

    ()22

    (

    2

    )22

    ()22

    (

    )]()([

    )]()([

    ])2

    21()

    21[(

    )1(1)2(2

    )()1(1

    )1(1)2(2

    )()1(1

    1

    (2)

    The perturbed duty cycle d(t) and the perturbed inductor

    current iL(t) can be expressed by (3) and (4):

    ])()([)(1

    )()(=

    =M

    i

    onioffiioffi TTttuTttutd

    (3)

    00 ])([)( Lt

    s

    o

    s

    in

    L idtL

    V

    tdL

    V

    ti += (4)where, u(t)=1 when t>0, and iL0 is the initial value of the

    inductor current. Then, the Fourier analysis can be performed

    on the inductor current:

    ++ =

    onMoffMm

    TTttfj

    LmiLm dtetiNfjc)(

    0

    2

    )( )(/2 (5)

    where, cm(iL) is the Fourier coefficient at the perturbation

    frequency fm for the inductor current. Based on the result in

    [15], the coefficient can be calculated as (6):

    ms

    j

    in

    Tfj

    Coo

    offon

    Coo

    off

    oLm

    j

    TfjTfj

    f

    s

    iLm fjL

    eV

    eRC

    TT

    RC

    T

    CRf

    eee

    s

    f

    cswm

    swmonm

    2)

    2

    21()

    21(

    )2

    1)(1)(1(

    2

    222

    )(

    ++

    =

    (6)

    where, Tswis the steady-state switching period. Next, Fourier

    coefficient cm(vo) of the output voltage vo can be calculated

    based on (7):

    12)(

    )12()()(

    ++

    +=

    moCoL

    moCoLiLmvom

    fjCRR

    fjCRRcc

    (7)

    The Fourier coefficient at the perturbation frequency fmfor

    the control signal vc(t) isj

    er , so the describing function

    from the control signal to the output voltage in the s-domain

    can be calculated as (8):

    1)()1(

    )2

    21()

    21(

    )]/(11)[1)(1(

    )(

    )(

    +++

    +

    +

    +=

    sCRRsCRR

    sLV

    eRC

    TT

    RC

    T

    sCRee

    s

    f

    sv

    sv

    oCoL

    oCoL

    s

    in

    sT

    Coo

    offon

    Coo

    off

    oL

    sTsT

    f

    s

    c

    o

    sw

    swon

    (8)

    This transfer function is effective at frequencies even

    beyond half of the switching frequency if there is no outer

    loop compensation. A similar method in [15] is used to

    simplify the transfer function as (9):

    )1(

    )1(

    )1(

    1

    )(

    )(

    2

    2

    2

    22

    2

    1

    2

    11

    s

    Q

    s

    sCR

    s

    Q

    ssv

    sv oCo

    c

    o

    ++

    +

    ++

    (9)

    where, 1= /Ton, Q1= 2/, 2= Tsw/[( RCoCo- Ton/2) ],

    and RL>>RCo. The simplification is valid for up to half of the

    switching frequency. When the duty cycle is relatively small,

    the transfer function can be further simplified as (10):

    )1/()1()(

    )(2

    2

    2

    22

    s

    Q

    ssCR

    sv

    svoCo

    c

    o +++ (10)

    From the transfer function, it is clear that the double poles at

    half of the switching frequency may move to the right half-

    plane according to different capacitors parameters. The

    critical condition for stability is RCoCo>Ton/2, which clearly

    shows the influence of the capacitance ripple.

    The control-to-output voltage transfer function comparison

    between the peak current-mode control and the V2constant-on

    time is shown in Fig. 7. In the peak current-mode control, the

    Q factor of the double poles at half of the switching frequency

    is determined by the duty cycle: if there no external ramp,when the duty cycle is larger than 0.5, two poles will move to

    the right half-plane and the system becomes unstable. In V2

    constant on-time control, the Q factor is not only related to the

    on-time Ton, but also related to the capacitor parameters. The

    critical condition RCoCo>Ton/2 reflects the interaction between

    the ESR and the capacitance of the output capacitor, which

    means those two parameters must be considered at the same

    time. Different types of capacitors result in different system

    performance. When fs= 300 KHz and D 0.1, the parameters

    of the OSCON capacitors (560F/6m) meet the critical

    condition, so the system is stable. However, the parameters

    of the ceramic capacitors (100F/1.4m) cannot satisfy the

    critical condition, so sub-harmonic oscillation occurs, as

    shown in Fig. 4.

    The output impedance can be also derived based on similar

    methodology. As shown in Fig. 8, a sinusoidal perturbation

    with a small magnitude at the frequency fmis injected through

    the output current io, then based on the perturbed output

    voltage waveform, the describing function from the output

    current io to the output voltage vo can be found out by

    mathematical derivation.

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    In the s-domain, the output impedance is derived as (11):

    )1

    (]1

    )2

    21()

    21(

    )1

    )(1)(1(

    [)(sC

    RsL

    V

    eRC

    TT

    RC

    T

    sCRee

    s

    fsZ

    o

    Co

    s

    in

    sT

    Coo

    offon

    Coo

    off

    o

    Co

    sTsT

    f

    s

    o

    sw

    swon

    ++

    +

    +

    =

    (11)

    The simplified output impedance is expressed as (12):

    )1

    (]1

    )1(

    )1(

    )1(

    1[)(

    2

    2

    2

    22

    2

    1

    2

    11

    sCR

    s

    Q

    s

    sCR

    s

    Q

    ssZ

    o

    CooCo

    o +

    ++

    +

    ++

    (12)

    When the duty cycle is relatively small, the outputimpedance can be further simplified as (13):

    )1(

    )1(]

    )1()

    2(

    2[)(

    2

    2

    2

    22

    2

    2

    2

    s

    Q

    s

    sCRs

    C

    DR

    C

    TTsZ oCo

    o

    Co

    o

    onono

    ++

    ++ (13)

    where, D is the steady-state duty cycle.

    The Bode plot of the output impedance is shown in Fig. 9.It is found that the output impedance is very low throughout a

    wide frequency range. This is why this control can deal with

    the transient response even without the outer loop

    compensation.

    III. POSSIBLE SOLUTIONS FOR ELIMINATING THE SUB-HARMONIC OSCILLATION

    In order to eliminate sub-harmonic oscillation due to the

    capacitor ripple using the V2 constant on-time control, two

    possible solutions are proposed: the first is adding the

    inductor current ramp; the second solution is adding an

    external ramp. Detailed analysis of these two approaches is

    presented below.

    A.

    Solution I: Adding the inductor current rampAs discussed above, the capacitor voltage ripple is

    detrimental to the system stability, so an additional current

    loop can be introduced to enforce the current feedback

    information and reduce the influence of the capacitor voltage

    ripple, as shown in Fig. 10.

    Figure 10. Solution I: adding the inductor current ramp

    Following the same modeling methodology, the control-to-

    output transfer function can be derived as (14):

    )1(

    )1(

    )1(

    1

    )(

    )(

    2

    2

    2

    23

    2

    1

    2

    11

    s

    Q

    s

    sCR

    s

    Q

    ssv

    svoCo

    c

    o

    ++

    +

    ++

    (14)

    where, Ri is the sensing gain of the additional current loop,

    soiCof LVRRs /)( += , and }]2/)/{[(3 onoiCosw TCRRTQ += .

    By comparing (10) and (14), we see that adding the inductor

    current ramp equivalently increases the ESR of the output

    capacitors. The sensing gain of the inductor current Rican be

    used as a design parameter to eliminate sub-harmonicoscillation for various output capacitors.

    The output impedance can also be derived as (15):

    )1

    (]1

    )1(

    )1(

    )1(

    1[)(

    2

    2

    2

    23

    2

    1

    2

    11

    sCR

    s

    Q

    s

    sCR

    s

    Q

    ssZ

    o

    CooCo

    o +

    ++

    +

    ++

    (15)

    Figure 8. Model methodology for output impedance

    (a) (b)Figure 7. Control-to-output transfer function comparison:

    (a) peak current-mode control, and (b) V2constant on-time controlFigure 9. Output impedance

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    Moreover, when the duty cycle is relatively small, (15) can

    be further simplified as (16):

    )1(

    )1(}1)]2

    (2

    )1({[

    )(

    2

    2

    2

    23

    2

    2

    2

    s

    Q

    s

    sCRsRRC

    T

    R

    T

    CR

    D

    RsZ

    oCoCoi

    o

    on

    i

    on

    oiio

    ++

    +++

    (16)

    An example using the ceramic capacitors is shown in Fig.11 and Fig. 12. The parameters are: Vin= 12V, Vo= 1.2V, Ls

    = 300nH, Ton = 0.33s, and the output capacitor consists of

    eight ceramic capacitors (100F/1.4m). The control-to-

    output transfer function and the output impedance are plotted

    to show the influence of the inductor current ramp.

    Comparing Fig. 9 with Fig. 12, it is found that the output

    impedance stays a constant value Ri at low frequency when

    there is an additional current loop. In some applications, such

    as voltage regulators for microprocessors where constant

    output impedance is required, this control structure can be

    used to meet the design target. For other applications without

    such a requirement, the outer loop compensation can be used

    to lower the output impedance in the frequency range withinthe control bandwidth.

    B. Solution II: Adding the external rampAs we know, the external ramp is used to eliminate sub-

    harmonic oscillation in the peak current-mode control. A

    similar concept can be used in V2constant on-time control, as

    shown in Fig. 13. The external digital ramp starts to build up

    at the end of the on-time period and resets at the beginning of

    the on-time period in every switching cycle.

    Figure 13. Solution II: adding the external ramp

    The control-to-output transfer function can be derived as

    (17):

    2

    2

    2

    2

    21

    2

    2

    2

    22

    2

    2

    2

    21

    2

    1

    2

    11

    )1)(1(

    )1)(1(

    )1(

    1

    )(

    )(

    sTCRs

    ss

    Q

    ss

    Q

    s

    sCRs

    Q

    s

    s

    Q

    s

    sv

    sv

    swoCo

    f

    e

    oCo

    c

    o

    +++++

    +++

    ++

    (17)

    where, sethe magnitude of the external ramp.

    When the duty cycle and the external ramp are small, (17)

    can be further simplified as (18):

    )1(

    )1(

    )(

    )(

    2

    2

    2

    24

    s

    Q

    s

    sCR

    sv

    svoCo

    c

    o

    ++

    + (18)

    where, }]2/)1/2/{[(4 onoCofesw TCRssTQ += . The Q factor

    is damped due to the external ramp.

    The output impedance can be derived as (19):

    )1

    (]1

    )1)(1(

    )1)(1(

    )1(

    1

    [)(

    22

    2

    2

    21

    2

    2

    2

    22

    2

    2

    2

    21

    2

    1

    2

    11

    sC

    R

    sTCRsss

    Qss

    Qs

    sCRs

    Q

    s

    s

    Q

    s

    sZ

    o

    Co

    swoCo

    f

    e

    oCo

    o +

    +++++

    +++

    ++

    (19)

    Based on the parameters used in the previous section, the

    control-to-output transfer function and the output impedance

    are plotted in Fig. 14 and Fig. 15 to show the influence of the

    external ramp.

    IV. EXTENSION TO OTHER TYPES OF V2CURRENT-MODECONTROL

    The proposed model strategy can be extend to other types of

    V2 current-mode control structures, including constant off-

    time, constant-frequency peak voltage control, and constant-

    frequency valley voltage control structures. When usingconstant frequency modulation, an external ramp is added to

    help stabilize the system. Peak voltage control is used as

    example for further illustration. The parameters are: input

    voltage Vin = 12V, switching frequency fs = 300KHz, and

    external ramp se= 0. The transfer functions for peak voltage

    control are derived as (20) and (21):

    Figure 11. The control-to-outputtransfer function with different Ri

    Figure 12. The output impedancewith different Ri

    Figure 14. The control-to-outputtransfer function with different

    external ramps

    Figure 15. The output impedancewith different external ramps

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    2

    2

    2

    2

    212

    2

    2

    25

    2/)()1)(1(

    )1(

    )(

    )(

    sTss

    TsCRsss

    Q

    ss

    Q

    s

    sCR

    sv

    sv

    sw

    fn

    offfoCoef

    oCo

    c

    o

    +

    ++++

    +

    (20)

    ]1

    2)(

    )1)(1(

    )1([

    )1

    ()(

    2

    2

    2

    2

    21

    2

    2

    2

    25

    +

    ++++

    +

    +

    sTss

    TsCRsss

    Q

    ss

    Q

    s

    sCR

    sCRsZ

    sw

    fn

    offfoCoef

    oCo

    o

    Coo

    (21)

    where, ]))/(2

    1/[(15

    onfnnsw

    swoCo

    TsssT

    TCRQ

    ++

    += .

    The control-to-output transfer function is plotted based on

    different duty cycles and different capacitor parameters, as

    shown in Fig. 16 and Fig. 17. One common characteristic of

    the peak voltage control and the peak current-mode control is

    that sub-harmonic oscillation occurs when the duty cycle is

    larger than a critical value. The difference between these two

    control structures is that this critical duty cycle value is 0.5 for

    the peak current-mode control, while this value for the peak

    voltage control is less than 0.5 which is related to the capacitor

    parameters. As shown in Fig. 17, different capacitor

    parameters may result in sub-harmonic oscillation in the peak

    voltage control even when D = 0.1. It is clear that sub-

    harmonic oscillation is more likely occurs when using peak

    voltage control due to the influence of the capacitor ripple.

    Based on the duality principle, the properties of the constant

    off-time control and the valley voltage control can be easily

    found based on the previous analysis on the constant on-time

    control and the peak voltage control.

    V.

    SIMULATION AND EXPERIMENTAL VERIFICATIONThe SIMPLIS simulation tool is used to verify the proposed

    model for V2constant on-time control. The parameters of the

    buck converter are as follows: Vin = 12V, Vo = 1.2V, Ton =

    0.33s, fs300KHz, and Ls= 300nH. The control-to-output

    transfer function and the output impedance are plotted using

    the simulation results. As shown in Fig. 18 and Fig. 19, the

    proposed model can accurately predict the system response.

    The two approaches to eliminate the sub-harmonic

    oscillation in V2 constant on-time control are also verified

    through the SIMPLIS simulation. For the case of adding an

    inductor current ramp, the control-to-output transfer function

    and the output impedance are shown in Fig. 20 and Fig. 21.

    For the case of adding an external ramp, the results are shown

    in Fig. 22 and Fig. 23. All the results show the validity of the

    model achieved by the proposed modeling approach.

    Red curve: proposed model; Blue curve: Simplis simulationFigure 16. The control-to-output

    transfer function with different dutycycles: capacitor (560F/6m)

    Figure 17. The control-to-output transferfunction with different capacitor

    parameters: D = 0.1

    Figure 18. Control-to-outputtransfer function comparison:output capacitor (56F/6m)

    Figure 19. Output impedancecomparison: output capacitor

    (56F/6m)

    Red curve: proposed model; Blue curve: Simplis simulation Red curve: proposed model; Blue curve: Simplis simulation

    Figure 20. Control-to-output transferfunction for Solution I (8 output

    ca acitors: 100 F/1.4m): Ri= 1m

    Figure 21. Output Impedance for SolutionI (8 output capacitors: 100F/1.4m): Ri

    = 1m

    Figure 22. Control-to-outputtransfer function for Solution II (8out ut ca acitors: 100 F/1.4m)

    Figure 23. Output Impedance forSolution II (8 output capacitors:

    100 F/1.4m)

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    7/7

    The experimental verification is done based on the

    LM34919 evaluation board from National Semiconductor.

    The experiment setup is shown in Fig. 24, and the parameters

    are: Vin= 12V, Vo= 5V, Fs= 800kHz, Ls= 15F, Rx= Ry=

    2.49K, and RL = 10. Experimental results with different

    values for Coare shown in Fig. 25. The proposed model can

    accurately predict the double poles at half of the switching

    frequency. Experiment verification for adding the inductor

    current ramp is done based on the same evaluation board with

    some modifications as shown in Fig. 26. The inductor

    information is sensed using sensing resistor Ri, and the

    feedback information is the sum of the inductor current and

    the output voltage. Experiment results with different valuesfor Riare shown in Fig. 27. The experiment results agree with

    the model results very well.

    VI. CONCLUSIONSThis paper presents a new modeling approach for V2

    constant on-time control. The power stage, the switches and

    the PWM modulator are treated as an entity and modeled

    based the describing function method. The model achieved by

    the proposed modeling approach can accurately predict sub-

    harmonic oscillation due to the capacitor ripple using V2

    constant on-time control. Two possible solutions are modeled

    and analyzed to solve the instability issue. The extension to

    other types of V2current-mode control is also demonstrated.

    Simulation and experimental results are used to verify the

    proposed model.

    REFERENCES

    [1] L. E. Galllaher, Current Regulator with AC and DC Feedback, U.S.Patent 3,350,628, 1967.

    [2] A.D. Schoenfeld and Y. Yu, ASDTIC Control and StandardizedInterface Circuits Applied to Buck, Parallel and Buck-Boost DC-to-DCPower Converters, NASA Report NASA CR-121106, February, 1973.

    [3] C.W. Deisch, Switching Control Method Changes Power Converter intoa Current Source, inproc. IEEE PESC78, pp. 300-306.

    [4] P.L. Hunter, Converter Circuit and Method Having Fast RespondingCurrent Balance and Limiting, U.S. Patent 4,002,963, 1977.

    [5] L.H. Dixon, Average Current-Mode Control of Switching PowerSupplies, Unitrode Power Supply Design Seminar handbook, 1990, pp.5.1-5.14.

    [6] R. Redl and N. O. Sokal, Current-mode control, five different types,used with the three basic classes of power converters: small-signal ac andlarge-signal dc characterization, stability requirements, andimplementation of practical circuits, in Proc. IEEE PESC85, pp. 771-785.

    [7] B. P. Schweitzer and A. B. Rosenstein, Free running switching modepower regulator: analysis and design, IEEE Trans. Aerosp., vol. AS-2,pp. 1171-1180, Oct. 1964.

    [8] D. Goder and W. R. Pelletier, V2 architecture provides ultra-fasttransient response in switch mode power supplies," in proc. HFPC96, pp.19-23.

    [9] D. Goder, Switching regulators, U.S. Patent, 5,770,940, 1998.[10] R. B. Ridley, A new, continuous-time model for current-mode control,

    IEEE Trans. Power Electron., vol. 6, no. 2, pp. 271-280, April 1991.[11] W. Huang and J. Clarkin, Analysis and design of multiphase

    synchronous buck converter with enhanced V2 control, in Proc.HFPC00, 2000, pp. 7481.

    [12] W. Huang, A new control for multi-phase buck converter with fasttransient response, in Proc. IEEE APEC01, Anaheim, California, pp.273279.

    [13] S. Qu, Modeling and design considerations of V2 controlled buckregulator, in Proc. IEEE APEC01, Anaheim, California, pp. 507513.

    [14] J. Sun, Characterization and performance comparison of ripple-basedcontrol for voltage regulator modules, IEEE Trans. Power Electron.,vol.21, pp. 346 353, March 2006.

    [15] J. Li and F. C. Lee, New Modeling Approach for Current-ModeControl, inproc. IEEE APEC09.

    [16] D. M. Mitchell, Pulsewidth modulator phase shift. IEEE Trans.Aerosp., vol. AES-16, pp. 272-278, May 1980.

    [17] R. D. Middlebrook, Predicting modulator phase lag in PWM converterfeedback loops, inproc. Powercon81, paper H-4.

    [18] J. Sun, Small-signal modeling of variable-frequency pulsewidthmodulators, IEEE Trans. Aerosp., vol 38, pp. 1104-108, July 2002.

    (a) (b)Figure 24. Experiment setup (1)

    Figure 25. Control-to-output transfer function comparison: (a) RCo= 0.39, Co = 210F, and (b) RCo= 0.39,Co = 20.47F (Dashed line: proposed model; Solid line: measurement)

    (a) (b)Figure 26. Experiment setup (2)

    Figure 27. Control-to-output transfer function comparison: (a) Ri= 0.15, Co = 210F, and (b) Ri= 0.39, Co= 210F (Dashed line: proposed model; Solid line: measurement)

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