4

such as B10F4 etc. are used. High dose yields large doping and annealing is still needed. Pre-amorphizing the silicon avoids channeling of the B+. Transient annealing and transient-enhanced diffusion may occur due to “kick-out”. Kick-out means that B+ moves to interstitial sites and can then diffuse vefry rapidly though other interstitial sites, see Figure 5.11. c) and d). A special application of Ion Implantation: Threshold voltage adjustment for MOSFETs. The threshold voltage of a MOSFET transistor is given by the following equation (see for example R.F. Pierret, Modular Series on Solid State Devices, Volume IV: Field Effect Devices, Chapter 4 and Sec. 5.3 (on reserve in the library): [ ]}*{*)/1(' 0 ITMMFmsTT QQQCVV ++−Φ+= γ (4.16) and (5.29)

where 0

42'

C

qNV FAS

FT

Φ+Φ=

ε for n-channel devices (5.28a)

and

0

)(42'

C

qNV FDS

FT

Φ−−Φ=

ε for p-channel devices (5.28b)

Here, VT’ is the “ideal” threshold voltage, i.e. before “extra” charges are taken into account. Also, ΦMS is the difference in work function between the metal and the semiconductor = - 0.98 V for aluminum and silicon, QF is the fixed charge density, ΦF/q is the difference in energy between the Fermi energy and the middle of the bandgap (positive for n-type and negative for p-type). The equation for 2ΦF = (2*kB*T/q)*ln [N A/ni]; C0 is the capacitance between the gate and the channel per unit area, calculated as a parallel plate capacitance. QM is the mobile charge density (if any), where γM is a factor between 0 and 1 that determines how effective this charge is in changing VT (depends on where QM is located and how it is distributed). Finally, QIT is the interface trap charge density (if any). Example: The gate is Al; the oxide thickness x0 = 0.1 µm = 10-5 cm; NA = 1015 cm-3; QM = QIT = 0; QF/q = 2*1011 cm-2; ni = 1.45*1010 cm-3 at 300 K; QF/C0 = 2*1011*1.6*10-19 *10-5*/ 3.9*8.85*10-14 =0.93 V; C0 = 3.9*8.85*10-14/10-5 = 3.5*10-8 F/cm2; 2ΦF = (2*300*1.38*10-23/1.6*10-19) * ln [1015/1.45*1010] = 0.576 V; VT’= 0.576 V + (1/3.5*10-8)*sqrt [4*3.9*8.85*10-14*1.6*10-19*1015*0.288] = 0.804 V; that’s the ideal threshold voltage.

5

The actual threshold voltage becomes VT = VT’ + ΦMS – QF/C0 = 0.804 – 0.98 + 2*1011*1.6*10-19/3.5*10-8 = - 0.176 - 0.91 = -1.086 V (slightly different from my numerical value in the hand written notes). We expected a positive value of VT for an n-MOS device but got a negative one! The transistor actually becomes a depletion mode one (“normally on”), instead of enhancement mode (“normally off”). How do we get a positive threshold voltage?? SOLUTION: Ion implant in the region near the interface Si/SiO2. We need to add a negative charge and boron has negative charge when it is substitutional in silicon (it is an acceptor). Now continue on page 7 of the hand written notes! Also see the solution for problem 1 in HW# 2.