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FEH352a-1
USER’S MANUAL <HARDWARE>Additional Specifications
TYPE: UG520H- UG420H- UG320H- UG221H- UG220H-
FUJI UG 20 SERIES PROGRAMMABLE OPERATION DISPLAY
Preface
Thank you very much for purchasing the FUJI UG520/420/320/221/220 Series Programmable
Operation Display (POD) (hereinafter called “UG 20 Series” or “POD”).
This manual describes only the functions newly added to the UG00S-CW Ver. 2.50 (Ver.
2.5.0.0).
Please read this manual together with the HARD WARE Volume of the UG 20 Series
User’s Manual (FEH352).
UG Series
[ Notes ]
(1) No part of this manual may be reproduced in any form without prior permission of thepublisher.
(2) The contents of this manual, including the specifications, are subject to change forimprovement without notice.
(3) This manual was prepared with utmost care. However, if you find any ambiguity, errors, etc.,please contact any of our sales offices that are listed at the end of this manual. In so ding,please tell the manual number shown on the cover of this manual.
ContentsThe following items correspond to those in the HARD WARE Manual (document No. FEH352).
Chapter 1 Hardware Specification1.1 Setting of Dip Switches ....................................................... 1-1
1.2 Connection .......................................................................... 1-2
Chapter 2 Connection to Link Units2.1 Koyo PLC............................................................................. 2-1
2.2 Allen-Bradley PLC (SLC500 series, Micro Logix 1000) .............. 2-6
2.3 GE Fanuc PLC (90 series SNP-X)......................................... 2-10
2.4 SIEMENS PLC (S7-300/400MPI) ......................................... 2-12
2.5 KEYENCE PLC • 1 (KZ series) ............................................. 2-14
2.6 KEYENCE PLC • 2 (KV series) ............................................. 2-16
2.7 LG PLC ............................................................................. 2-18
2.8 SAIA PLC ........................................................................... 2-23
2.9 MOELLER PLC ................................................................... 2-25
2.10 Telemecanique PLC ........................................................... 2-26
2.11 Automationdirect PLC ....................................................... 2-28
1-1
Setting of Dip Switches (DIPSW)
Setting of Terminal Resistance
• Set DIPSW 8 ON in case of connecting Multi Link 2 or Temperature Controller of RS-485 and a card
recorder (UG00P-MR) and serial extension I/O (UG00P-U2) to MJ2.
This dip switch is invalid for UG220. Keep DIPSW 8 OFF.
• Set DIPSW 7 ON in case of connecting POD to PLC connection of RS-422/485.
• Set DIPSW 6 ON in case of connecting Multi Link 2 or Temperature Controller of RS-485 and a card
recorder (UG00P-MR) and serial extension I/O (UG00P-U2) to MJ 1.
Setting of Memory Extension 2 (This dip switch is invalid for UG220. Keep DIPSW 1 OFF.)
• Set DIPSW 1 ON in case of selecting “Memory Extension 2.”
(Refer to “Operation Instruction for UG00P-D4, UG221P-D4 (Extension Memory).”)
Keep DIPSW 2, 3, 4 and 5 (not used) OFF.
1.1 Setting of Dip Switches
ON
1 2 3 4 5 6 7 8
Terminal resistance of MJ2 (modular jack 2 : invalid for UG220)
RD terminal resistance of pin No. 24 and 25
Terminal resistance of MJ1(modular jack 1)Not used
Memory Extension 2(invalid for UG220)
Chapter 1 Hardware Specification
1.1 Setting of Dip Switches
1-2
1 : 1 Link Communication
One POD and one PLC are connected.
1 : n Link Communication (Multi-drop)
One POD and multiple PLCs are connected. (n = 1 to 32)
Available PLC for multi-drop communication
run
stop
run
stop
run
stop
run
stop
POD
PLC1 PLC2 PLC3 PLCn
RS-422/485 Maximum length 500m(from POD to the last PLC)
1.2 Connection
run
stop
PODPLC
RS-232C or RS-422(RS-485)
Manufacturer
FUJI
MITSUBISHI
OMRON
SHARP
HITACHI
MATSUSHITA
YOKOGAWA
YASKAWA
TOYOPUC
Koyo
Allen-Bradley
GE Fanuc
TOSHIBA
SIEMENS
SHINKO
SAMSUNG
KEYENCE
LG
FATEK
IDEC
MODICON
TAIAN
Models
MICREX-F series, FLEX-PC series
AnA/N/U series, QnA series, QnH(Q)series, Net10, FX series(A prt)
SYSMAC C, CV, CQM1, CS1 DNA
JW series, JW100/70H COM Port, JW20/30 COM Port
HIDIC-H
MEWNET
FA500, FA-M3, FA-M3R
Memobus, CP9200SH/MP900
TOYOPUC
SU/SG, SR-T
PLC-5, SLC500, Micro Logix 1000
90 series
T series
S7-200 PPI
SELMART
SPC series, N_plus, SECNET
KZ series, KV series
MASTER-K500 / K1000, MASTER-K xxxS CNET
FACON FB series
MICRO3
Modbus RTU
TP02
Universal Serial
1.2 Connection
1-3
Signal
Link unit
Signal
Link unit
Signal Pin No.
POD (CN1)
Signal
Link unit
FG
+SD
-SD
+RD
-RD
SG
1
12
13
24
25
7
FG
RDA
RDB
SDA
SDB
SG
FG
RDA
RDB
SDA
SDB
SG
FG
RDA
RDB
SDA
SDB
SG
SD/RD terminal resistance(ON)
* Use twist shielded cable.
Multi-drop Communication (RS-485)
Refer to the PLC manual of each manufacturer for connection.
<E.g.>
The following example describes how one POD is connected to three PLCs made by MITSUBISHI.
See MITSUBISHI’s manual for further details.
1.2 Connection
n : 1 Link Communication (Multi-link2)
Up to 4 units can be connected to one PLC.
* Between a PLC and the POD master station is the same as those for 1:1 communication.
Available PLCs for multi-link2.
As of December 2001, the PLCs supported are as follows. All the PLCs which are usable for 1:1 commu-
nication will be supported.
For the I/F driver, the Multi-Link 2 is supported by the version of 1.100 or later (UG Editor : Version of
2.1.4.0 or later) and as for a POD master station, make sure the hardware version of the unit is as follows.
As for UG221/UG220, any version can be used.
· Analog type : UG520H-V ➞ 4, UG420H-V ➞ 5, UG420H-T ➞ 5, UG420H-S ➞ 4, UG320H ➞ 7
· Matrix type : All version
* The Multi-Link 2 cannot be used with a communication interface unit such as UG03I-T, J, E, C, S, P,
UG02I-T, J, S.
* The Multi-Link 2 cannot be used with Temperature controll network.
PLC
terminal
Communication between the stations : RS-485 (2-wire system) Maximum length: 500 m
(a) (b) (c) (d) (e)
POD master(Local Port 1)
POD slave(Local Port 2)
POD slave(Local Port 3)
POD slave(Local Port 4)
CN1CN1CN1CN1 MJ2
1-4
<Type> <Calendar>GE Fanuc : 90 series Not providedGE Fanuc : 90 series(SNP-X) Not providedTOSHIBA : T series ProvidedSIEMENS : S5 Not providedSIEMENS : S7 Not providedSIEMENS : S5 UG400 Not providedSIEMENS : TI500/505 ProvidedSIEMENS : TI500/505(UG400) ProvidedSIEMENS : S5 PG port Not providedSIEMENS : S7-300MPI(HMI ADP) Not providedSIEMENS : S7-300MPI(PC ADP) Not providedSAMSUNG : SPC series Not providedSAMSUNG : N_plus ProvidedSAMSUNG : SECNET Depends on the modelKEYENCE : KZ series Not providedKEYENCE : KZ-A500 CPU Port ProvidedKEYENCE : KV series Not providedKEYENCE : KZ24/300 series CPU Not providedKEYENCE : KV10/24 series CPU Not providedKEYENCE : KV700 series CPU ProvidedLG : MASTER-K10/60/200 Not providedLG : MASTER-K500/1000 Not providedLG : LGMKX00S Not providedLG : MASTER-KxxxS CNET Not providedLG : GLOFACNET Not providedFANUC : Power Mate Not providedFATEK AUTOMATION: FACON FB series ProvidedIDEC : MICRO3 ProvidedMODICON : Modbus RTU Depends on the modelYAMATAKE : MX series ProvidedTAIAN : TP02 ProvidedSAIA : PCD ProvidedMOELLER : PS4 Not providedTelemecanique : TSX Micro Not providedAutomationdirect : Direct LOGIC Depends on the modelAutomationdirect : Direct LOGIC(K-Sequence) Depends on the model
<Type> <Calendar>FUJI : MICREX-F series Depends on the modelFUJI : MICREX-SX series ProvidedFUJI : MICREX-SX CPU ProvidedFUJI : FLEX-PC series Depends on the modelFUJI : FLEX-PC CPU Depends on the modelFUJI : FLEX-PC COM ProvidedFUJI : FLEX-PC(T) Depends on the modelFUJI : FLEX-PC CPU(T) Depends on the modelMITSUBISHI : AnA/N/U series Provided MITSUBISHI : QnA series ProvidedMITSUBISHI : ACPU Port ProvidedMITSUBISHI : FX series Depends on the modelMITSUBISHI : QnACPU Port ProvidedMITSUBISHI : QnHCPU Port (A) ProvidedMITSUBISHI : QnHCPU Port (Q) ProvidedMITSUBISHI : FX series(A prt) ProvidedMITSUBISHI : FX2N series Depends on the modelMITSUBISHI : FX1S series ProvidedOMRON : SYSMAC C Depends on the modelOMRON : SYSMAC CV ProvidedOMRON : SYSMAC CS1 ProvidedSHARP : JW series ProvidedSHARP : JW100/70H COM Port ProvidedSHARP : JW20 COM Port ProvidedHITACHI : HIDIC-H ProvidedHITACHI : HIDIC-S10/2 alpha Not provided HITACHI : HIDIC-S10/ABS Not providedMATSUSHITA : MEWNET Depends on the modelYOKOGAWA : FA500 ProvidedYOKOGAWA : FA-M3 ProvidedYOKOGAWA : FA-M3R ProvidedYASKAWA : Memobus Depends on the modelYASKAWA : CP9200SH/MP900 Not providedTOYOPUC ProvidedKOYO : SU/SG Depends on the modelKOYO : SR-T ProvidedKOYO : SR-T(K prt) Not providedKOYO : SU/SG(K-Sequence) Depends on the modelA.B : PLC-5 Not providedA.B : SLC500 ProvidedA.B : Micro Logix 1000 Not provided
(b) (c) (d) (e)
Signal
POD slaveCN1+UG00P-TC
POD slaveCN1+UG00P-TC
POD slaveCN1+UG00P-TC
Terminal blockprepared by user
POD masterMJ1/2
Terminal resistor(OFF)
Terminal resistor(OFF)
Signal Signal
Terminal resistor(ON)
Terminal resistor(ON)
Signal
SG
+
-
SG
+
-
FG
+SD
-SD
+RD
-RD
SG
FG
+SD
-SD
+RD
-RD
SG
FG
+SD
-SD
+RD
-RD
SG
Up to 4 units can be connected to one PLC.
Use the terminal converter (UG00P-TC), the optional equipment made by Fuji Electric Co., Ltd.
For detailes, please see the “User’s Manual <Multi-Link 2 Communications> (FEH364)”.
* Wire the shielded FG only at the one of both sides so that they are not connected.
• Set the dip switch (SW1) of UG00P-TC as 2-wire connection when the UG00P-TC terminal converter is used.
• Short-circuit between +RD and +SD, and -RD and -SD when the UG00P-TC terminal converter is not used.
1.2 Connection
1-5
n : 1 Link Communication (Multi-link)
Multiple POD and a PLC are connected. (n=1 to 32)
Available PLCs for multi-link
Manufacturer
FUJI
MITSUBISHI
MITSUBISHI
OMRON
SHARP
HITACHI
MATSUSHITA
YOKOGAWA
YASKAWA
TOYOPUC
TOSHIBA
SIEMENS
SHINKO
SAMSUNG
LG
Models
MICREX-F series
AnA/N/U series, Net10, FX series(A prt)
QnA CPU port (with UG00P-DI)
SYSMAC C, CV
JW series, JW100/70H COM Port, JW20/30 COM Port
HIDIC-H
MEWNET
FA500, FA-M3, FA-M3R
Memobus, CP9200SH/MP900
TOYOPUC
T series
S7-200 PPI
SELMART
SPC series, SECNET
MASTER-K500 / K1000
• • •• • •• • •• • •
• • •• • •• • •• • •
• • •• • •• • •• • •
• • •• • •• • •• • •
run
stop
PLC
POD 1 POD 2 POD 3 POD n
RS-485 Maximum length 500m(from PLC to the last POD)
run
stop
* The connections shown
below are not recommended.
1.2 Connection
1-6
Signal
POD+UG00P-TC
Signal
POD+UG00P-TC POD+UG00P-TC
Signal
UG00P-DI
SignalPin No.
RD terminal resistance(ON)
RD/SD terminal resistance(OFF)
RD/SD terminal resistance(OFF)
* Use twist shielded cable.
FG
+SD
-SD
+RD
-RD
SG
FG
+SD
-SD
+RD
-RD
SG
FG
+SD
-SD
+RD
-RD
SG
1
2
3
4
5
7
15
16
17
18
20
21
+RxD
+TxD
+DSR
+DTR
SG
-RxD
-TxD
-DSR
-DTR
Signal
POD+UG00P-TC
Signal
Link unit
Signal
POD+UG00P-TC
Signal
POD+UG00P-TC
RD terminal resistance(ON)
RD/SD terminal resistance(OFF)
RD/SD terminal resistance(OFF)
* Use twist shielded cable.
FG
+SD
-SD
+RD
-RD
SG
FG
+SD
-SD
+RD
-RD
SG
FG
+SD
-SD
+RD
-RD
SG
FG
+RxD
-RxD
+TxD
-TxD
SG
1.2 Connection
When multiple POD are connected to a link unit of PLC, use the terminal converter (UG00P-TC), the
optional equipment made by Fuji Electric Co., Ltd. for RS-485 connection.
• Set the dip switch (SW1) of UG00P-TC as 2-wire connection when the UG00P-TC terminal converter is used.
• Short-circuit between +RD and +SD, and -RD and -SD when the UG00P-TC terminal converter is not used.
When multiple POD are connected directly to MITSUBISHI’s QCPU port, the optional equipment, UG00P-
DI is required.
• Set the dip switch (SW1) of UG00P-TC as 2-wire connection when the UG00P-TC terminal converter is used.
• Short-circuit between +RD and +SD, and -RD and -SD when the UG00P-TC terminal converter is not used.
*An n:1 system can be also configured using optional interface units (UG03I-T, J, E, C, S, P, UG02I-T, J, S).
For the details, refer to the User’s Manual of each optional interface unit.
2-1
PLC Link Unit Wiring Diagram Select PLC Type
SR-T(K prt)
SU/SG
SR-T
SU/SG(K-Sequence)
SR-6T (TOYOTA version)
SR-1T (TOYOTA version)
SG-8
SZ-4
PZ3
SU-5/5E/6B/5M/6M
SZ-4M
SU-5E/6B
SU-5M/6M
SU-5M/6M
SZ-4M
SU-5E/6B
SZ-4
G01-DM
U01-DM
Port 1 on a CPU unit
Port on a CPU unit
G01-DM
Terminal blockson a CPU unit
Universal communication port
Port 3 on a CPU unit
Port 2 on a CPU unit
U01-DM
Port 2 on a CPU unit
Port 2 on a CPU unit
Port 1 on a CPU unit
Port 2 on a CPU unit
Port 3 on a CPU unit
Programmer port on a CPU unit
Port 2 on a CPU unit
Port 1 on a CPU unit
Port 1 on a CPU unitPort 2 on a CPU unit
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 4]
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 4]
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 7]
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 3]
RS-232C [Wiring Diagram 2]RS-422 [Wiring Diagram 6]
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 4]
RS-422 [Wiring Diagram 5]
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 7]
RS-232CProgram transfer cable made by Koyo [S-30JG-E]
+Convert connector cable made by Koyo [S-15CNJ]
RS-232CProgram transfer cable made by Koyo [S-30JG-E]
+Convert connector cable made by Koyo [S-15CNJ]
+Convert connector made by Koyo [S-15HCNP1]
RS-485 [Wiring Diagram 8]
RS-232CProgram transfer cable made by Koyo [S-30JG-E]
+Convert connector cable made by Koyo [S-15CNJ]
+Convert connector made by Koyo [S-15HCNP1]
RS-232CProgram transfer cable made by Koyo [S-30JG-E]
+Convert connector cable made by Koyo [S-15CNJ]
RS-232CProgram transfer cable made by Koyo [S-30JG-E]
RS-485 [Wiring Diagram 8]
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 3]
Chapter 2 Connection to Link Units
2.1 Koyo PLC
2.1 Koyo PLC
Available PLC
2-2
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
Available Memory
SU/SG, SU/SG(K-Sequence)
SR-1T/SR-T(K prt)
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit Write : unavailable] memory will be output
by one word. Use TYPE number to assign indirect memory for macro programs.
Port "0" for x10, "1" for x1
19200bps
Odd
8
0 (fixed)
Host link system (fixed)
None (fixed)
HEX (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1
Response Delay Time
Function
Time-out
ASCII/HEX
Item Setting of PLC
1
19200bps
Odd
8
1
Comm. Parameter of POD
Available: Unavailable:
Available: Unavailable:
Memory Bit Write TYPE Remarks
SU/SG SU/SG(K)
R (data register) 0
I (input relay) 1
Q (output relay) 2
M (internal relay) 3
S (stage) 4
GI (global inputs) 5
GQ (global outputs) 6
T (timer/contact) 7
C (counter/contact) 8
Memory Bit Write TYPE Remarks
D (data register) 0
X (input relay) 1 X/Y common use
Y (output relay) 2 X/Y common use
M (internal relay) 3
S (stage) 4
K (keep relay) 5
L (link relay) 6
T (timer/contact) 7
C (counter/contact) 8
2.1 Koyo PLC
2-3
1
No
3
4
ON
OFF
OFF
Setting Contents
5 OFF
Unit No. 01
6 OFF
1 : N8
OFF7
9
OFF
OFF Slave
2 OFF
1
No
2
3
OFF
OFF
OFF
Setting Contents
HEX mode4 OFF
Communication time-out
Slave
Master/slave control
1
No
2
3
4
5
7
6
8
ON
ON
ON
Setting
ON
OFF
OFF
OFF
OFF
Contents
Parity provided
Response delay time0msec
Self-diagnosis
Same as POD(normally 19200bps)
1
No
3
4
5
6
8
7
9
2
ON
ON
ON
Setting
OFF
OFF
OFF
OFF
OFF
ON
Contents
Parity provided
Self-diagnosis
Turn-around delay
Same as POD(normally 19200bps)
Response delay time 0msec
HEX mode
SW2 Dip Switch:
U-01DM
On-line/off-line switch: on-line
UNIT ADR switch: “0” for 10, “1” for 1
SW4 Dip Switch:
SW5 Dip Switch:
Switch Setting
G-01DM
On-line/off-line switch: on-line
Short plug 1: open
Short plug 2 RS-232C: ENABLE
RS-422: DISENABLE
SW1 Dip Switch:
2.1 Koyo PLC
2-4
Wiring Diagram 4
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
+OUT
-OUT
-IN
+IN
14
15
16
17
0V 7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
FG
SD
RD
RS
CS
1
2
3
4
5
SD
RD
RS
CS
SG
2
3
4
5
7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
2.1 Koyo PLC
RS-422
Wiring Diagram 3
Wiring Diagram 2
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
+RTS
-RTS
+CTS
-CTS
+OUT
-OUT
-IN
+IN
-IN
+IN
10
11
12
13
14
15
16
17
24
25150
0V 7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
FG
SD
RD
RS
CS
1
2
3
4
5
TXD
RXD
RTS
CTS
0V
2
3
4
5
7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 15pin(Male: )
* Use twist shielded cables.
*1 High density D-sub 15pin
*1
2-5
2.1 Koyo PLC
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
T1
T2
T3
FGSG 7
POD (CN1)D-sub 25pin(Male: )
PLC
* Use twist shielded cables.
Wiring Diagram 5
Wiring Diagram 6
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
0V
TXD+
TXD-
RTS+
RTS-
RXD+
CTS+
CTS-
7
9
10
11
12
13
14
15
RXD- 6SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 15pin(Male: )
* Use twist shielded cables.
*1 High density D-sub 15pin
*1
Wiring Diagram 7
Wiring Diagram 8
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
RXD+
RXD-
CTS1+
TXD1+
TXD1-
RTS1+
RTS1-
CTS1+
9
10
11
14
16
18
19
23
SG 7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
TXD3+
TXD3-
RXD3+
RXD3-
12
13
24
25
SG 7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
In case SU-6M, it is possible to use terminal blocks.
* Use twist shielded cables.
2-6
Port 0
9600bps
none (fixed)
8 (fixed)
CRC (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1 (fixed)
Error Check
Item Setting of PLC
0
9600bps
none
8
1
Comm. Parameter of POD
Port
TransmissionControl Mode
RS-232C
RS-422 not supported on Channel 0
0
19200bps
Even
8
Full duplex (fixed)
BCC (fixed)
NO (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1
Protocol
Error Check
Response
Item Setting of PLC
0
19200bps
Even
8
1
Comm. Parameter of POD
PLC Link Unit Wiring Diagram
SLC 5/03 or later modelsRS-232C [Wiring Diagram 2]RS-422 [Wiring Diagram 4]
1747-KE
Port on a CPU unit
CPU (Processor module)RS-232C channel RS-232C [Wiring Diagram 1]
*RS-232C program transfer cable made by A-B +RS-232C [Wiring Diagram 3]
Select PLC Type
SLC500
Micro Logix 1000Micro Logix 1000
*When using RS-232C program transfer cable made by Allen-Bradley, connect the cable of [Wiring Diagram 3] to the D-sub 9 pins side of the program transfer cable to communicate with POD.
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
SLC500 series
Available PLC
2.2 Allen-Bradley PLC
(SLC500 series, Micro Logix 1000)
2.2 Allen-Bradley PLC
Micro Logix 1000
2-7
Transmission Parameter Setting
CPU Port Channel 0
Set up the parameters for CPU port channel 0, using the software specifically designed for this purpose.
Baud Rate : 19200
Duplicate Detect : ON
ACK Timeout(x20 ms) : 20
Control Line : NO HANDSHAKING
Parity : EVEN
Error Detect : BCC
NAK Retries : 3
ENQ Retries : 3
Embedded Responses : AUTO-DETECT
Available Memory
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit Write : unavailable] memory will be output
by one word. Use TYPE number to assign indirect memory for macro programs.
Memory Bit Write TYPE Remarks
N (integer) 0
B (bit) 1
T.ACC (timer/current value) 2
T.PRE (timer/set value) 3
C.ACC (counter/current value) 4
C.PRE (counter/set value) 5
I (input) 6
O (output) 7
S (status) 8
T (timer/control) 9
C (counter/control) 10
R (control) 11
R.LEN (control/data length) 12
R.POS (control/data position) 13
D (BCD) 14
A (ASCII) 15
F (Float) 16
ST (String) 17
Available: Unavailable:
2.2 Allen-Bradley PLC
2-8
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
FG
SD
RD
RS
CS
1
2
3
4
5
DCD
RXD
TXD
DTR
1
2
3
4
5COM
DSR 6
7
8
RTS
CTS
SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 9pin(Male: )
* Use twist shielded cables.
2.2 Allen-Bradley PLC
1747-KE
Set up the parameters for 1747-KE, using the software specifically designed for this purpose.
DF1 Port Setup Menu
Baudrate : 19200
Bits Per Character : 8
Parity : Even
Stop Bits : 1
DF1 Full-Duplex Setup Parameters
Duplicate Packet Detection : Enabled
Checksum : BCC
Constant Carrier Detect : Disabled
Message Timeout : 400
Hardware Handshaking : Disabled
Embedded Response Detect : Auto Detect
ACK Timeout( 5ms) : 90
ENQuiry Retries : 3
NAK Received Retries : 3
2-9
RS-422
Wiring Diagram 4
FG
SG
+SD
-SD
+RD
1
7
12
13
24
TXD-
RXD-
COM
RXD+
1
2
5
6
9TXD+-RD 25
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 9pin(Male: )
*Use twist shielded cables.
2.2 Allen-Bradley PLC
Wiring Diagram 2
FG
SD
RD
RS
CS
1
2
3
4
5
RXD
TXD
DTR
2
3
4
5COM
SG 7 6
7
8
DSR
RTS
CTS
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 9pin(Female: )
* Use twist shielded cables.
FG
SD
RD
RS
CS
SG
1
2
3
4
5
7
RD
SD
RS
2
CD 1
3
4
GND 5
DR 6
RS 7
CS 8
POD (CN1) PLCD-sub 25pin(Male: ) D-sub 9pin(Male: )
* Use twist shielded cables.
Wiring Diagram 3
2-10
19200bps
Odd
8
SNP-X (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1
Function
Item Setting of PLC
19200bps
Odd
8
1
Comm. Parameter of POD
PLC Wiring Diagram
RS-485 [Wiring Diagram 1]
Series 90 micro (CPU port)Series 90-30 (CPU port)
Select PLC Type
90 Series(SNP-X)
Available Memory
2.3 GE Fanuc PLC
(90 series SNP-X)
Available PLC
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
2.3 GE Fanuc PLC
Available: Unavailable:
Memory Bit Write TYPE Remarks
R (data register) 0
I (input) 1
Q (output) 2
M (internal relay) 3
G (global relay) 4
AI (analog input) 5
AQ (analog output) 6
T (temporary memory relay) 7
S (system status) 8 Read only
SA (system status) 9
SB (system status) 10
SC (system status) 11
2-11
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-485
Wiring Diagram 1
FG
SG
+SD
-SD
+RD
1
7
12
13
24
RTS(A)
0V
CTS(B')
6
7
8
9RT
-RD 25 10
11
12
RD(A')
RD(B')
SD(A)
SD(B)
RTS(B)
CTS(A')
13
14
15
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 15pin(Male: )
* Use twist shielded cables.
2.3 GE Fanuc PLC
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit Write : unavailable] memory will be output
by one word. Use TYPE number to assign indirect memory for macro programs.
2-12
2.4 SIEMENS PLC
(S7-300/400MPI)
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
Set the [MPI SETTING] in the [Comm. Perameter] in UG00S-CW.
Set [Source No] as the different number from that of [Local No.], and make the value of [Node Cnt] equal
to or larger than that of [Screen No]. [Node Cnt] is equivalent for [Local No.] of a PLC. (For example, if
[Local No.] is [13], [Node Cnt] is [15].)
Available PLC
2.4 SIEMENS PLC
38400bpsBaud Rate
Parity
TransmissionCode
Data Length
Stop Bit
Item Setting of PLC
HMI ADP : 38400bps (fixed)
None (fixed)
8 (fixed)
1 (fixed)
Comm. Parameter of POD
PC ADP : 38400bps
Local No.(station no. of PLC) 2 2
CPU Wiring Diagram
S7-300/400 series(MPI port)
RS-232C [Wiring Diagram 1]
Select PLC Type
S7-300MPI(HMI ADP)
S7-300MPI(PC ADP)
SIEMENSHMI Adapter6ES7 972 0CA11-0XA0
SIEMENSPC Adapter6ES7 9720CA23-0XA0
Adapter
ITEM MPI SETTING
Node Cnt 15/31/63/126
Source No(station no.of POD) 0
2-13
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
FG
SD
RD
RS
CS
RD
SD
SG
2
3
5
SG
2
1
3
4
5
7
RTS 7
CTS 8
POD (CN1)D-sub 25pin(Male: ) HMI Adapter
PC AdapterD-sub 9pin(Female: )
* Use twist shielded cables.
Available Memory
<E.g.> DB0001: 0000
Block No.Address No.
The assigned memory is indicated while editing the screen as illustrated:
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output Memory] of a switch
whose [Output Action] is [Momentary W], the other bits will be cleared when the bit memory is output,
because the [Bit Write : unavailable] memory will be output by one word. Use TYPE number to assign
indirect memory for macro programs.
2.4 SIEMENS PLC
Available: Unavailable:
Memory Bit Write TYPE Remarks
DB (data register) 0 Use memories more than DB1.
I (input relay) 1 IW as word device
Q (output relay) 2 QW as word device
M (Merker Word) 3 MW as word device
T (timer/current value) 4
C (counter/current value) 5
2-14
Available Memory
2.5 KEYENCE PLC • 1
(KZ series)
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
For further information, refer to the communication specifications of KEYENCE link unit.
Available PLC
PLC Link Unit Wiring Diagram
KZ300KZ350 Port 2
RS-232C [Wiring Diagram 2] RS-422 [Wiring Diagram 3]
KZ-L2
Port 1 RS-232C [Wiring Diagram 1]
Select PLC Type
KZSeries
19200bps
Even
7 (ASCII)
ON for RS-422
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 2
Terminal Resistor
Item Setting of PLC
19200bps
0Port 0
Even
7
2
Comm. Parameter of POD
Set the port with the port setting switch, the terminating resistance with terminator, and
the baud rate/data bit/parity/stop bit with SET B dip switches.
2.5 KEYENCE PLC • 1
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit Write : unavailable] memory will be output
by one word. Use TYPE number to assign indirect memory for macro programs.
Available: Unavailable:
Memory Bit Write TYPE Remarks
DM (data memory) 0
CH (input/output relay) 1
2-15
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
RS-422
Wiring Diagram 3
Wiring Diagram 2
FG
SD
RD
RS
CS
SD
RD
2
3
SG
2
1
3
4
5
7
4RS
CS
SG
5
7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
FG
SD
RD
SD
RD
2
1
3
RS 4
CS 5
SG
SG 7
POD (CN1)D-sub 25pin(Male: )
PLC
* Use twist shielded cables.
FG
SG
+SD
SDB7
1
12 SDA
-SD 13
+RD
-RD
24
25
RDB
RDA
SG
POD (CN1)D-sub 25pin(Male: )
PLC
* Use twist shielded cables.
2.5 KEYENCE PLC • 1
2-16
57600bps
Even
8
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1
Terminal Resistor
Item Setting of PLC
57600bps
0Port 0
Comm. Parameter of POD
* 1
*1 The maximum baud rate is 57600bps. If 115000bps is selected, the POD communicates with a PLC forcibly at 9600bps.
Select PLC Type
KVSeries
KZ 24/300Series CPU
KV 10/24Series CPU
KV 700Series CPU
KZ-10,16,24,40,80,300,350(Program port direct connection)KV series(Program port direct connection)
RS-232C [Wiring diagram 1] orCable made by KEYENCE [OP-26487] + connecter [OP26485]
RS-422 Cable made by KEYENCE [KZ-C20]+ Cable made by Hakko [MB-CPUQ]
PLC Wiring Diagram
KZ-24,300(Program port direct connection)
KZ-V10,24(Program port direct connection)
RS-232C [Wiring diagram 1] orCable made by KEYENCE [OP-26487] + connecter [OP26485]
* When using RS-232C cable made by KEYENCE [OP-26487], attach the D-sub 25 pins connecter [OP-26485] to the modular jack on the POD side to communicate.
KV 700(Program port direct connection)
38400bps
Even
8
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1
Terminal Resistor
Item Setting of PLC
38400bps
0Port 0
Comm. Parameter of POD
* 1
*1 The maximum baud rate is 38400bps. If 57600bps or 115000bps is selected, the POD communicates with a PLC forcibly at 9600bps.
2.6 KEYENCE PLC • 2
2.6 KEYENCE PLC • 2
(KV series)
Communication Setting
KV series / KV 700 Series CPU
The communication parameter setting of POD is done automatically.
KZ24/300 Series CPU
Available PLC
KV10/24 Series CPU
2-17
Available Memory
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit Write : unavailable] memory will be output
by one word. Use TYPE number to assign indirect memory for macro programs.
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
FG
SD
RD
SD
SG
2
1
3
RS 4
CS 5
RD
3
4
5
SG 7
123456
RD
SG
SD
POD (CN1)D-sub 25pin(Male: )
Modular Connector 6pinPLC
* Use twist shielded cables.
KV700KZ series
2.6 KEYENCE PLC • 2
*1 High-speed counter/current value
*2 High-speed counter comparator/set value
*3 High-speed counter comparator/contact
Available: Unavailable:
Memory Bit Write TYPE Remarks
DM (data memory) 0
CH (input/output relay) 1
TC (timer/current value) 2
CC (counter/current value) 3
TS (timer/set value) 4
CS (counter/set value) 5
T (timer/contact) 6
C (counter/contact) 7
TM (temporary data memory) 8
CTH (*1) 9 only in KV700
CTC (*2) 10 only in KV700
CT (*3) 11 only in KV700
CR (control relay) 12 only in KV700
CM (control memory) 13 only in KV700
2-18
38400bps
None (fixed)
8 (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1 (fixed)
Item Setting of PLC
38400bps
Comm. Parameter of POD
19200bps
None (fixed)
8 (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1 (fixed)
Item Setting of PLC
19200bps
Comm. Parameter of POD
* 1
*1 In case of RS-422, the baud rate is fixed at 9600bps.
9600bps (fixed)
None (fixed)
8 (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1 (fixed)
Item Setting of PLC Comm. Parameter of POD
PLC Wiring Diagram
K10/60/200 RS-232C [Wiring Diagram 1]
K500/1000RS-232C [Wiring Diagram 2]
RS-422 [Wiring Diagram 5]
Select PLC Type
MASTER-K10/60/200
MASTER-K500/1000
LGMKX00S K200S/K300S/K1000S CPU port RS-232C [Wiring Diagram 3]
MASTER-KxxxS CNET
GLOFA CNET
RS-232C [Wiring Diagram 4]
RS-422 [Wiring Diagram 6]G4L-CUEA
K4F-CUEA
2.7 LG PLC
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
MASTER-K10/60/200
Available PLC
MASTER-K500/1000
LGMKX00S
2.7 LG PLC
2-19
38400bps
None
8
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1
Item Setting of PLC
38400bps
Comm. Parameter of POD
None
8
1
MASTER-K500/1000Available: Unavailable:
Available Memory
MASTER-K10/60/200
MASTER-KxxxS CNET / GLOFA CNET
Available: Unavailable:
2.7 LG PLC
Memory Bit Write TYPE Remarks
D (data register) 0
M (auxiliary relay) 1
P (input/output relay) 2 Input : Read only
K (keep relay) 3
TC (timer/current value) 4
CC (counter/current value) 5
TS (timer/set value) 6
CS (counter/set value) 7
Memory Bit Write TYPE Remarks
P (input/output) 0 Input : read only
M (relay) 1
L (link relay) 2
K (keep relay) 3
F (special relay) 4 Read only
T (timer/current value) 5
C (counter/set value) 6
D (data register) 7
2-20
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit Write : unavailable] memory will be output
by one word. Use TYPE number to assign indirect memory for macro programs.
GLOFA CNET
LGMKX00S
MASTER-KxxxS CNET
Available: Unavailable:
Available: Unavailable:
Available: Unavailable:
2.7 LG PLC
Memory Bit Write TYPE Remarks
P (input/output) 0 Input : read only
M (relay) 1
L (link relay) 2
K (keep relay) 3
F (special relay) 4 Read only
T (timer/current value) 5
C (counter/set value) 6
D (data register) 7
TC (timer/contact) 9
CC (counter/contact) 10
Memory Bit Write TYPE Remarks
P (input/output) 0 Input : read only
PW as word device
M (relay) 1 MW as word device
L (link relay) 2 LW as word device
K (keep relay) 3 KW as word device
F (special relay) 4 Read only
FW as word device
T (timer/current value) 5
C (counter/set value) 6
D (data register) 7
TC (timer/contact) 9
CC (counter/contact) 10
Memory Bit Write TYPE Remarks
M (internal memory) 0 MW as word device
Q (output) 1 QW as word device
I (input) 2 IW as word device
2-21
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
FG
SD
RD
RXD2
1
3 TXD
SG 7 GND
2
3
5
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 9pin(Male: )
* Use twist shielded cables.
FG
SD
RD
TXD2
1
3 RXD
SG 7 GND
2
3
7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
Wiring Diagram 2
Wiring Diagram 3
FG
SD
RD
TXD2
1
3 RXD
SG 7
GND
2
3
5
CS 5
RS 4
RTS
CTS
7
8
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
2.7 LG PLC
2-22
SD+
SD-
10
11
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
PLCD-sub 25pin(Male: )
POD (CN1)D-sub 25pin(Male: )
* Use twist shielded cables.
RS-422
Wiring Diagram 5
RDA
RDB
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
SDA
SDB
SG 7 SG
PLC
POD (CN1)D-sub 25pin(Male: )
* Use twist shielded cables.
Wiring Diagram 6
Wiring Diagram 4
FG
SD
RD
RXD2
1
3 TXD
SG 7
SG
2
3
5CS 5
RS 4
RTS
CTS
7
8
CD 1
DTR 4
DSR 6
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 9pin(Male: )
* Use twist shielded cables.
2.7 LG PLC
2-23
Available Memory
2.8 SAIA PLC
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
Available PLC
19200bps 19200bps
8
Baud Rate
Transmissioncode
Data Length
Stop Bit 1
8
1
Item Setting of PLC
Port 0 0
Comm. Parameter of POD
PCD1PCD
PLC Communication moduleSelect PLC Type Wiring Diagram
RS-232C [Wiring Diagram 1]RS-232C [Wiring Diagram 2]RS-485 [Wiring Diagram 3]
PGU portPCD7.F120PCD4.F110
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write: unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit: unavailable] memory will be output by
one word. Use TYPE number to assign indirect memory for macro programs.
S-BUS Configuration
S-BUS Mode Parity
PGU Port Number 0 (PGU port), 1 (PCD7.F120, PCD4.F110)
Available: Unavailable:
2.8 SAIA PLC
Memory Bit Write TYPE Remarks
R (Register Word) 0
Rfp (Float) 1
T (Timer-Counter Word) 2
C (Timer-Counter Coil) 3
I (Input Bit) 4 read only
O (Output Bit) 5
F (Flag Bit) 6
2-24
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
Wiring Diagram 2
FG
RD
SD
SG
1
3
2
7
TX
RX
GND
12
11
10
POD (CN1)D-sub 25pin(Male: )
PLC
* Use twist shielded cables.
PCD7.F120
RS-485
Wiring Diagram 3
FG
+SD
SG
-SD
+RD
-RD
1
12
7
13
24
25
T/R+
T/R-
GND 10
12
11
POD (CN1)D-sub 25pin(Male: )
PLC
* Use twist shielded cables.
PCD7.F110
FG
RD
SD
SG
1
3
2
7
RX
TX
GND
3
2
5
POD (CN1)D-sub 25pin(Male: )
PLC
* Use twist shielded cables.
PGU port
2.8 SAIA PLC
2-25
Available Memory
2.9 MOELLER PLC
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
Available PLC
9600bps 9600bps
None
8
Baud Rate
Parity
Transmissioncode
Data Length
Stop Bit 1
8
1
Item Setting of PLC
Port 1 1
Comm. Parameter of POD
None
PS4-201-MM1(PRG port)PS4
PLCSelect PLC Type Wiring Diagram
RS-232C [Wiring Diagram 1]+
ZB4-303-KB1 Cable made by MOELLER
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write: unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit: unavailable] memory will be output by
one word. Use TYPE number to assign indirect memory for macro programs.
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
FG
RD
SD
SG
1
3
2
7
TX
RX
SG
3
2
5
POD (CN1)D-sub 25pin(Male: ) PLC
* Use twist shielded cables.
D-sub 9pin(Male: )
Available: Unavailable:
2.9 MOELLER PLC
Memory Bit Write TYPE Remarks
M (Marker) 0 MW as word device
2-26
2.10 Telemecanique PLC
Available PLC
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
TSX Micro
PLC Wiring Diagram
RS-485 [Wiring Diagram 1]
Select PLC Type
TSX Micro
Connection
9600bps
Odd
8 (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1
Item Setting of PLC
Multi-Link (fixed)
9600bps
Odd
8
1
Comm. Parameter of POD
Available Memory
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit Write : unavailable] memory will be output
by one word. Use TYPE number to assign indirect memory for macro programs.
Available: Unavailable:
2.10 Telemecanique PLC
Memory Bit Write TYPE Remarks
MW (memory Word) 0
KW (constant word) 1
M (bit memory) 2
2-27
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-485
Wiring Diagram 1
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
D+
D-
1
2
POD (CN1)D-sub 25pin(Male: )
PLCMiniDIN 9pin(Male: )
* Use twist shielded cables.
2.10 Telemecanique PLC
2-28
2.11 Automationdirect PLC
Available PLC
Direct LOGIC
PLC Link Unit Wiring Diagram
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 5]
Port 1 on a CPU unit
Select PLC Type
Port 3 on a CPU unit
Port 2 on a CPU unit
RS-232C [Wiring Diagram 1]RS-422 [Wiring Diagram 5]
RS-232C [Wiring Diagram 2]D2-240 Port 2 on a CPU unit
D2-250 Port 2 on a CPU unit RS-232C [Wiring Diagram 3]
D4-430D4-440
D4-450 RS-485 [Wiring Diagram 6]
D4-450
Port 1 on a CPU unit
Direct LOGIC(K-Sequence)
D2-250Port 2 on a CPU unit RS-232C [Wiring Diagram 3]
D4-430D4-440
Port 3 on a CPU unit
Port 0 on a CPU unit
Port 2 on a CPU unit
Port 1 on a CPU unit
RS-232C [Wiring Diagram 2]D2-240 Port 1 on a CPU unitPort 2 on a CPU unit
RS-232C [Wiring Diagram 4]
RS-485 [Wiring Diagram 6]
Communication Setting
The recommended communication parameter setting of both PLC and POD is as follows:
Port "0" for x10, "1" for x1
19200bps
Odd
8
0 (fixed)
Host link system (fixed)
None (fixed)
HEX (fixed)
Baud Rate
Parity
TransmissionCode
Data Length
Stop Bit 1
Response Delay Time
Function
Time-out
ASCII/HEX
Item Setting of PLC
1
19200bps
Odd
8
1
Comm. Parameter of POD
2.11 Automationdirect PLC
2-29
FG
SD
RD
SG
RxD
2
1
3
RS 4
CS 5
TxD
1
3
4
SG 7
654321
POD (CN1)D-sub 25pin(Male: )
Modular Connector 6pinPLC
* Use twist shielded cables.
FG
SD
RD
RS
CS
1
2
3
4
5
SD
RD
RS
CS
SG
2
3
4
5
7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
Available Memory
Direct LOGIC, Direct LOGIC(K-Sequence)
Set the memory to the extent of the memory range of each PLC model.
In case of using the [Bit Write : unavailable] memory as the bit device of the [Output
Memory] of a switch whose [Output Action] is [Momentary W], the other bits will be cleared
when the bit memory is output, because the [Bit Write : unavailable] memory will be output
by one word. Use TYPE number to assign indirect memory for macro programs.
Wiring
The following is a diagram to show the wiring of the cable which connects POD to PLC.
RS-232C
Wiring Diagram 1
Wiring Diagram 2
Memory Bit Write TYPE Remarks
DL DL(K)
V (data register) 0
X (input relay) 1
Y (output relay) 2
C (internal relay) 3
S (stage) 4
GX (global inputs) 5
GY (global outputs) 6
T (timer/contact) 7
CT (counter/contact) 8
Available: Unavailable:
2.11 Automationdirect PLC
2-30
Wiring Diagram 4
RS-422
Wiring Diagram 5
Wiring Diagram 3
Wiring Diagram 6
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
RXD+
RXD-
CTS1+
TXD1+
TXD1-
RTS1+
RTS1-
CTS1+
9
10
11
14
16
18
19
23
SG 7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
* Use twist shielded cables.
FG
+SD
-SD
+RD
-RD
1
12
13
24
25
TXD3+
TXD3-
RXD3+
RXD3-
12
13
24
25
SG 7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 25pin(Male: )
In case SU-6M, it is possible to use terminal blocks.
* Use twist shielded cables.
FG
SD
RD
RS
CS
1
2
3
4
5
TXD
RXD
RTS
CTS
0V
2
3
4
5
7SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 15pin(Male: )
* Use twist shielded cables.
*1 High density D-sub 15pin
*1
FG
SD
RD
RS
CS
1
2
3
4
5
TXD
RXD
0V
2
3
13
SG 7
POD (CN1)D-sub 25pin(Male: )
PLCD-sub 15pin(Male: )
* Use twist shielded cables.
2.11 Automationdirect PLC
Fuji Electric Co., Ltd.ED & C · EDrive Systems CompanyGate City Ohsaki, East Tower11-2, Osaki 1-chome, Shinagawa-ku, Tokyo, 141-0032, JapanPhone: +81-3-5435-7135~8Fax: +81-3-5435-7456~9
URL http://www.fujielectric.co.jp/kiki/
Information in this manual is subject to change without notice.