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(12) United States Patent Lay et al. US006531330B2 US 6,531,330 B2 Mar. 11, 2003 (10) Patent N0.: (45) Date of Patent: (54) (75) (73) (*) (21) (22) (65) (30) Jul. (51) (52) (58) METHOD OF FABRICATING THIN FILM TRANSISTOR FLAT PANEL DISPLAY Inventors: Chung-Wen Lay, Taipei (TW); Meng-Yueh Wu, Hsinchu (TW) Assignee: AU Optronics Corp., Hsinchu (TW) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days. Appl. No.: 10/200,831 Filed: Jul. 22, 2002 Prior Publication Data US 2003/0017636 A1 Jan. 23, 2003 Foreign Application Priority Data 23, 2001 ..................................... .. 90117932 A Int. Cl.7 .............................................. .. H01L 21/00 US. Cl. ....................... .. 438/30; 438/149; 438/151; 438/479; 438/517 Field of Search ........................ .. 438/30, 149, 151, 438/479, 517 ll DLp (56) References Cited U.S. PATENT DOCUMENTS 6,372,535 B1 * 2002/0121639 A1 * 4/2002 Lyu 9/2002 S0 et al. * cited by examiner Primary Examiner—John F. Niebling Assistant Examiner—Stanetta Isaac (74) Attorney, Agent, or Firm—Ladas & Parry (57) ABSTRACT A method of fabricating a thin ?lm transistor (TFT) ?at panel display. The method merely comprises four mask steps of: (1) using the ?rst mask process for patterning the ?rst conductive layer/gate insulating layer/amorphous silicon layer of the TFT, (2) using the second mask process for de?ning the passivation layer and the etching stopper, (3) using the third mask process for forming the Source/Drain, and (4) using the fourth mask process for forming the pixel electrode, Whereby simplifying the fabricating process of the TFT ?at panel display. 12 Claims, 19 Drawing Sheets / ~~100 103 101 102 103 101 102

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  • (12) United States Patent Lay et al.

    US006531330B2

    US 6,531,330 B2 Mar. 11, 2003

    (10) Patent N0.: (45) Date of Patent:

    (54)

    (75)

    (73) (*)

    (21) (22) (65)

    (30) Jul.

    (51) (52) (58)

    METHOD OF FABRICATING THIN FILM TRANSISTOR FLAT PANEL DISPLAY

    Inventors: Chung-Wen Lay, Taipei (TW); Meng-Yueh Wu, Hsinchu (TW)

    Assignee: AU Optronics Corp., Hsinchu (TW) Notice: Subject to any disclaimer, the term of this

    patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.

    Appl. No.: 10/200,831 Filed: Jul. 22, 2002

    Prior Publication Data

    US 2003/0017636 A1 Jan. 23, 2003

    Foreign Application Priority Data 23, 2001 ..................................... .. 90117932 A

    Int. Cl.7 .............................................. .. H01L 21/00 US. Cl. ....................... .. 438/30; 438/149; 438/151;

    438/479; 438/517 Field of Search ........................ .. 438/30, 149, 151,

    438/479, 517

    ll

    DLp

    (56) References Cited

    U.S. PATENT DOCUMENTS

    6,372,535 B1 * 2002/0121639 A1 *

    4/2002 Lyu 9/2002 S0 et al.

    * cited by examiner

    Primary ExaminerJohn F. Niebling Assistant ExaminerStanetta Isaac (74) Attorney, Agent, or FirmLadas & Parry (57) ABSTRACT A method of fabricating a thin ?lm transistor (TFT) ?at panel display. The method merely comprises four mask steps of: (1) using the ?rst mask process for patterning the ?rst conductive layer/gate insulating layer/amorphous silicon layer of the TFT, (2) using the second mask process for de?ning the passivation layer and the etching stopper, (3) using the third mask process for forming the Source/Drain, and (4) using the fourth mask process for forming the pixel electrode, Whereby simplifying the fabricating process of the TFT ?at panel display.

    12 Claims, 19 Drawing Sheets

    / ~~100

    103 101 102

    103 101 102

  • U.S. Patent Mar. 11,2003 Sheet 1 0f 19 US 6,531,330 B2

    3

    1

    FIG. 1A ( PRIOR ART ) 5 2

    40 IIIIIII

    \\\\\\\\\\\\\ W .\\\\\\\\\\\\~ 3

    ~~1

    FIG. 1B ( PRIOR ART )

    2 5 6 40

    W/////////1 ~~3 ~~1

    FIG. 1C ( PRIOR ART ) 2 5

    7,8 6 40 7,8

    \ I ~9

    WKWQ W3

    FIG. 1D ( PRIOR ART )

  • U.S. Patent Mar. 11,2003 Sheet 2 0f 19 US 6,531,330 B2

    DLg

    l L'---- evDL

    I

    FIG.2A

    DLg opl 0p2

    * i J DL '

    BL B 'LLjl'JL \JDL 5%

    0p3

    FIG. 2B

  • U.S. Patent Mar. 11,2003 Sheet 3 0f 19 US 6,531,330 B2

    FIG. 2D

  • U.S. Patent Mar. 11,2003 Sheet 4 0f 19 US 6,531,330 B2

    11 I

    fDLp fDLg 1 1 \ 1 1 / 1 1 / \ / / \ @400 1 ( \ 1 ( \ 103 101 103 101

    102 102

    FIG. 3A

    11 I

    0P3 104

    111 I I #03104 //\ 1 f//\ @100 I(\ 1 K/(\ 103 101 104 103 101 102 102

    DLg

  • U.S. Patent Mar. 11,2003 Sheet 5 0f 19 US 6,531,330 B2

    II I

    0p3 104 (IS)

    I I "?g/3| ' ~\./105 1 \ ' 1\

    104g / 1 1 1 / 11 @9104 11 1 T/ /\ ~100

    1 ( 1 1 K1 ( 1 103 101 104 103 101 102 102

    DLg

    FIG. 3C

    11 I

    110107 1513 103 S\ 1 1 /D

    I

    1 106dm1 [22227 101111 /102 IILW'L ' ' 106105

    107- 1 1 1 / 11 ~V104 1 1 1 7 //\ ~~100 ) 1 1 k 1 ( 1 101 104 103 101

    \ 102 DLp DLg

  • U.S. Patent Mar. 11,2003 Sheet 6 0f 19 US 6,531,330 B2

    FIG. 4A

    11 1

    0P3 104

    i KDLp opl ) /0p2 202 ~ - 202 202 ~ '- ~202

    i 1'1 104* / 1 l /W ~V104

    f / ~~100 I ( \ 1 f ( \

    103 101 104 103 101 102 102

    DLg

  • U.S. Patent Mar. 11,2003 Sheet 7 0f 19 US 6,531,330 B2

    II I

    0p3 IS >DLp

    f 106 106

    104 104 100

    DLg

    FIG. 4C

    FIG. 4D

  • U.S. Patent Mar. 11,2003 Sheet 8 0f 19 US 6,531,330 B2

    Dig DL y

    B f B. *i-____m?______i i-ui gym I

    FIG.5A

    DLg opl 0p2

    } ) DL

    lili BL |_ _J

    0p3

    FIG. 5B

  • U.S. Patent Mar. 11,2003 Sheet 9 0f 19 US 6,531,330 B2

    FIG. 5C

  • U.S. Patent Mar. 11,2003 Sheet 10 0f 19 US 6,531,330 B2

    1 1 1 l

    f-DLp f DLg

    \ \

    1 / / / \ / / ~100 I ( \ / ( 103 101 103 101

    102 102

    FIG. 6A

    II 1

    0P3 104

  • U.S. Patent Mar. 11,2003 Sheet 11 0f 19 US 6,531,330 B2

    11 1

    0P3 104

    l KDLP } 106J/ N106 , 105d/ 1 105 1 1

    104-I / 1 1 / 1 12,104 / \ L 7 / /\ ~100 I ( \ 1 I ( \

    103 101 104 103 101 102 102

    DLg

    FIG. 6C

    11 I

    107 104 107 S 2 D

    103 103 A ) ) 106105 2 106105 102 \ 102 ( V A W

    |\][l Quinn; 1 , I I 11 - 104

    \ K K T/ \ ~~100 ) 1 1 K! ( \ 101 104 103 101

    102 DLp DLlg

  • U.S. Patent Mar. 11,2003 Sheet 12 0f 19 US 6,531,330 B2

    Dig: DL '

    B f B. Al ____ ____L__t i?-i ML __l

    FIG. 7A

    DLg 0p10p2

    J ) DL '

    B i B. iiili Km +1

    FIG. 7B

  • U.S. Patent Mar. 11,2003 Sheet 14 0f 19 US 6,531,330 B2

    / / \ / \ V100 103 101 103 101

    102 102

    FIG. 8A

    11 1

    0P3 104

    104g 1 1 \h "@104 / \ 1 f / /\ ~w~100 / ( \ 1 k I ( \ 103 10] 104 103 101

    I02 102 DLg

  • U.S. Patent Mar. 11,2003 Sheet 15 0f 19 US 6,531,330 B2

    1 104VJ/ 1 ~~104 \1 / /\ 1 7/ 1 ( \ 1 K1 ( \ 103 101 104 103 101

    102 102 DLg

    FIG.8C

    II I

    FIG. 8D

  • U.S. Patent Mar. 11,2003 Sheet 16 0f 19 US 6,531,330 B2

    DLg

    DLp 0

    4-\/DL l

    FIG. 9A

    SL\' 0p1 0p2

    W 0 0

    FIG. 9B

  • U.S. Patent Mar. 11,2003 Sheet 18 0f 19 US 6,531,330 B2

    / DLp DLg \

    FIG. 10A

    106

    II. \_/106 III] r 71: ? SL I M104 2 ,6 1 '4 . '/ 1 1 "'4

    K 1 ) \ ( \ / // ( \ ( 104104 103 101 100

    104 D'Lg 102

    FIG. 10B

  • U.S. Patent Mar. 11,2003 Sheet 19 0f 19 US 6,531,330 B2

    11 I

    S107(T2) 103 103 limlios 1% SL 305

    / \ 1 J 1 /\ H 7//\ 1 / \ 1 (1 / \ W l \ ( 106 104 101 106106104106 103 101 100

    DLp 104 104 102 DLg

    FIG. 10C