UNIVERSITY OF PRETORIA, PRETORIA, SOUTH AFRICA

FACULTY OF ENGINEERING, BUILT ENVIRONMENT AND INFORMATION TECHNOLOGY

DEPARTMENT OF ELECTRICAL, ELECTRONIC AND COMPUTER ENGINEERING

1. BIOGRAPHICAL SKETCH - MONUKO DU PLESSIS 1.1 GENERAL INFORMATION

Surname du Plessis Maiden name

First names Monuko ID Number 4912165097082

Citizenship South African Title Prof Female Male √

Place of birth King Williamstown, South Africa Date of birth 16 December 1949

Marital status Married Telefax No. +27 12 362 5115

Direct Telephone

+27 12 420 2952 E-mail monuko@up.ac.za

Residential address

228 Rockwood Crescent Woodlands Estate, Pretoria

Postal address PO Box 1548, Brooklyn Square, 0075 Pretoria, South Africa

1.2 LANGUAGE PROFICIENCY Afrikaans (Read, Write & Speak) Good English (Read, Write & Speak) Good 1.3 ACADEMIC QUALIFICATIONS OBTAINED

Degree/

Diploma Field of study

Higher education institution

Period Year of

graduation Distinctions

B.Eng Engineering University of Pretoria (Cum Laude)

4 year 1972

M.Eng Engineering University of Pretoria

(Cum Laude)

4 year 1978

D.Eng Engineering University of Pretoria 4 year 1984

B.A. Psychology University of South Africa 4 year 1989 Psychology

B.Com Commerce University of South Africa (Cum Laude)

4 year 1993

B.Com (Hons) Commerce University of South Africa (Cum Laude)

4 year 1998

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1.4 WORK EXPERIENCE TO DATE Name of employer Capacity and/or type of work Period

Department of Transport Telecommunications Engineer (Civil Aviation) 1973

University of Pretoria Lecturer 1973-1978

University of Pretoria Senior Lecturer 1979-1984

University of Pretoria Associate Professor 1985-1987

University of Pretoria Professor 1988-2015

1.5 RESEARCH Research Field: Microelectronics

Research Specialty: Integrated Circuit Design Silicon Photonics Device Physics

Rated as a C1 researcher (i.e. established researcher with considerable international recognition for the high quality and impact of recent research outputs) by the NRF (National Research Foundation) in South Africa (2004-2009). Rated as a B3 researcher (i.e. an independent researcher enjoying considerable international recognition for the high quality and impact of his/her recent research outputs) by the NRF (National Research Foundation) in South Africa (2010-2015.) Google Scholar citation analysis: H-rating: h = 15 (h = 11 since 2010) Total number of citations: 856 (516 citations since 2010) Number of journal papers with more than 10 citations: i10 = 28 (i10 = 14 since 2010) 2 RESEARCH OUTPUTS 2.1 Books (Proceedings editor) 6

2.2 Chapters in books 2

2.3 International accredited publications 58

2.4 International conference proceedings 70

2.5 National conference proceedings 22

2.6 International conference contributions 20

2.7 National conference contributions 40

2.8 International patents granted 27

2.9 South African patents granted 12

2.10 International patents pending 16

2.11 South African patents pending 3

276

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2.1 Books (Proceedings editor)

6 M. du Plessis, Editor of the SPIE Proceedings Vol. 9257. ISBN 978-1-628-41324-3. Proceedings of the 3rd Conference on Sensors,-MEMS and Electro-Optical Systems (SMEOS 2014). Skukuza, South Africa, 17-19 March 2014.

5 M. du Plessis, Editor of the Proceedings of the 2nd Conference on Sensors,-MEMS and Electro-Optical Systems (SMEOS 2011). ISBN 978-0-620-525604-3. Pretoria, South Africa. September 2011.

4 M. du Plessis, Editor of the Proceedings of the 1st Conference on Sensors,-MEMS and Electro-Optical Systems (SMEOS 2009). ISBN 978-0-620-45648-7. Pretoria, South Africa. September 2009.

3 M. du Plessis and W. Perold, Editor of the Proceedings of the Conference on Semi- and Superconductor Technology (SACSST 2009). ISBN 978-0-620-43865-0. Stellenbosch, South Africa. April 2009.

2 M. du Plessis, Editor of the Proceedings of the 2nd International Conference on Simulation of Devices and Technology (ICSDT’98). Cape Town, South Africa. 1998.

1 M. du Plessis, Editor of the Proceedings of the 1st International Conference on Simulation of Devices and Technology (ICSDT’95). Pretoria, South Africa. 1995.

2.2 Chapters in books

2 M. du Plessis, “Porous silicon: An explosive nano-material,” Book chapter in the textbook “Handbook of Porous Silicon: From Formation to Application,” Edited by Ghenadii Korotcenkov, Taylor and Francis, USA. Accepted for publication in December 2014. ISBN 978-1-48-226452-4 to be published 14 January 2016.

1 M. du Plessis, “Energetics with porous silicon,” Book chapter in the textbook “Handbook of Porous Silicon,” Edited by Leigh Canham, Springer, Germany, ISBN 978-3-319-05743-9, pp. 975-983, January 2015. (http://link.springer.com/book/10.1007/978-3-319-04508-5)

2.3 Publications in international refereed accredited journals

58 M. du Plessis and T-H. Joubert, “Reachthrough pn junction optical sources in SOI nanowires,” Journal of Nanophotonics. Submitted for publication February 2015.

57 M. du Plessis and T-H. Joubert, “Electroluminescence from two junction punch through structures in silicon nanowires,” IEEE Photonics Technology Letters. Submitted for publication February 2015.

56 M du Plessis, H. Wen and E. Bellotti, “Temperature characteristics of hot electron electroluminescence in silicon,” Optics Express, Submitted for publication February 2015.

55 P.J. Venter and M. du Plessis, “A 128x96 pixel CMOS microdisplay utilizing hot carrier electroluminescence from junctions in reach through,” IEEE Journal of Display Technology, Vol. 10, No. 9, pp. 721-728, September 2014.

54 M. du Plessis, “A decade of porous silicon as nano-explosive material,” (Review paper), Propellants, Explosives, Pyrotechnics, Vol. 39, No. 3, pp. 348-364, June 2014.

53 D.S. Mellet and M. du Plessis, “A novel CMOS Hall effect sensor,” Sensors and Actuators A: Physical, Vol. 211, pp. 60-66, May 2014.

52 M. du Plessis, P.J. Venter and E. Bellotti, “Spectral characteristics of hot electron electroluminescence in silicon avalanching junctions,” IEEE Journal of Quantum Electronics, Vol. 49, No. 7, pp. 570-577, July 2013.

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51 A.W. Bogalecki, M. du Plessis, P.J. Venter and C. Janse van Rensburg, “Spectral measurement and analysis of silicon CMOS light sources,” Africa Research Journal, Vol. 103, No. 1, pp. 18-23, March 2012.

50 J. Schoeman and M. du Plessis, “Characterisation of the electrical response of a novel dual element thermistor for low frequency applications,” Africa Research Journal, Vol. 103, No. 1, pp. 9-13, March 2012.

49 W. Maclean, M. du Plessis and J. Schoeman, “Optimisation of CMOS compatible microbolometer device performance,” Africa Research Journal, Vol. 103, No. 1, pp. 3-8, March 2012.

48 M.E. Goosen, M. du Plessis, P. J. Venter, A. W. Bogalecki, A. C. Alberts and P. Rademeyer, “CMOS avalanche electroluminescence applications – microdisplay and high speed data communication,” Africa Research Journal, Vol. 103, No. 1, pp. 24-28, March 2012.

47 P.J. Venter, M. du Plessis, A.W. Bogalecki, M.E. Goosen and P. Rademeyer, “An 8 x 64 pixel dot matrix microdisplay in 0.35 micron CMOS technology,” Optical Engineering 51(1), 014003(1-7), January 2012.

46 K. Olivier, J.E. Celliers and M. du Plessis, “Design and performance of wideband DRFM for radar test and evaluation,” Electronics Letters, Vol. 47, Issue 14, pp. 824-825, 7 July 2011.

45 M. du Plessis, J. Schoeman, W. Maclean and C. Schutte, “The electrothermal properties of integrated circuit microbolometers,” Africa Research Journal, Vol. 102, No. 2, pp. 40-48, June 2011.

44 L.W. Snyman, M. du Plessis and E. Bellotti, “Photonic transitions (1.4 eV- 2.8 eV) in silicon p+np+ injection-avalanche CMOS LEDs as function of depletion layer profiling and defect engineering,” IEEE Journal of Quantum Electronics, Vol. 46, No.6, pp. 906-919, June 2010.

43 M. du Plessis and P. Rademeyer, “Novel electroluminescence technique to analyze mixed reverse breakdown phenomena in silicon diodes,” Solid State Electronics, Vol. 54, No. 4, pp. 433-438, April 2010.

42 A.W. Bogalecki and M. du Plessis, “Design and manufacture of quantum-confined Si light sources,” Africa Research Journal, Vol. 101, No. 1, pp. 11-16, March 2010.

41 P.J. Venter and M. du Plessis, “Feasibility of optical clock distribution for future CMOS technology nodes,” Africa Research Journal, Vol. 101, No. 1, pp. 26-30, March 2010.

40 P. Ellinghaus, P.J. Venter, M. du Plessis, P. Rademeyer and A.W. Bogalecki, “A fully CMOS optical transmission system based on light emitting avalanche diodes,” Africa Research Journal, Vol. 101, No. 1, pp. 17-20, March 2010.

39 M. du Plessis, “Investigating nanoporous silicon explosive devices,” Physica Status Solidi (c), Vol. 6, No. 7, pp. 1763-1768, July 2009.

38 M. du Plessis, “Nanoporous silicon explosive devices,” Materials Science and Engineering B, Vol. 147/2-3, pp. 226-229, February 2008.

37 M. du Plessis, “A gravimetric technique to determine the crystallite size distribution in high porosity nanoporous silicon,” Transactions of the Electrochemical Society, Vol. 9, No. 1, pp. 133-142, September 2007.

36 M. du Plessis, “The relationship between specific surface area and pore dimension of high porosity nanoporous silicon, Model and experiment,” Physica Status Solidi (a), Vol. 204, No. 7, pp. 2319-2328, July 2007.

35 L.W. Snyman, M. du Plessis and H. Aharoni, “Injection-avalanche based n+pn silicon complementary metal oxide semiconductor light emitting device (450nm – 750nm) with two order of magnitude increase in light emission intensity,” Japanese Journal of Applied Physics, Vol.46, No.4B, pp. 2474-2480, April 2007.

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34 M. du Plessis, “Properties of porous silicon nano-explosive devices,” Sensors and Actuators A, Physical, Vol 135/2, pp 666-674, April 2007.

33 O.S. Adekeye, S. Sinha and M. du Plessis, “Design and implementation of a CMOS automatic gain control (AGC) amplifier,” South African Journal of Science, Vol. 102, No. 11/12, pp. 606-608, December 2006.

32 S. Sinha and M. du Plessis, “PLL based frequency synthesizer implemented with an active inductor oscillator,” Africa Research Journal incorporating the South African Institute for Electrical Engineers (SAIEE) Transactions, Vol. 97, No. 3, pp 237-242, September 2006.

31 Y.J. Chen and M. du Plessis, “An integrated 0.35µm CMOS optical receiver with clock and data recovery circuit,” Microelectronics Journal, Vol.37, Issue 9, pp.985-992, September 2006.

30 L.W. Snyman, M. du Plessis and H. Aharoni, “A dependency of quantum efficiency of Si CMOS n+pp+ LEDs on current density,” IEEE Photonics Technology Letters, Vol.17, No.10, pp.2041-2043, October 2005.

29 M. du Plessis, H. Aharoni and L.W. Snyman, “Two- and multi-terminal CMOS/BiCMOS Si LED’s,” Optical Materials, Vol. 27, Issue 5, pp.1059-1063, February 2005.

28 M. du Plessis, H. Aharoni and L.W. Snyman, “Two- and multi-terminal silicon light emitting devices in standard CMOS/BiCMOS IC technology,” Physica Status Solidi (a), Vol. 201, No. 10, pp. 2225-2233, July 2004.

27 H. Aharoni and M. du Plessis, “Low operating voltage integrated silicon light emitting devices,” IEEE Journal of Quantum Electronics, Vol. 40, Issue 5, pp.557-563, May 2004.

26 S.J. de Beer, M. du Plessis and E. Seevinck, “An SRAM array based on a four-transistor CMOS SRAM cell,” IEEE Transactions on Circuits and Systems, Part I, Fundamental Theory and Applications Vol. 50, Issue 9, pp. 1203-1208, September 2003.

25 M. du Plessis, H. Aharoni and L.W. Snyman, “Silicon LED’s fabricated in standard VLSI technology as components for all silicon monolithic integrated optoelectronic systems,” IEEE Journal of Selected Topics in Quantum Electronics, Vol. 8, Issue 6, pp.1412-1419, November/December 2002.

24 L.W. Snyman, H. Aharoni, M. du Plessis, J.F.K. Marais, D. van Niekerk and A. Biber, “Planar light-emitting electro-optical interfaces in standard silicon complementary metal oxide semiconductor integrated circuitry,” Optical Engineering, Vol.41, No. 12, pp. 3230-3240, December 2002.

23 M. du Plessis, H. Aharoni and L.W. Snyman, “Spatial and intensity modulation of light emission from a silicon LED matrix,” IEEE Photonics Technology Letters, Vol. 14, Issue 6, pp. 768-770, June 2002.

22 E. Seevinck, E.A. Vittoz, M. du Plessis, T-H. Joubert and W. Beetge, “CMOS translinear circuits for minimum supply voltage,” IEEE Transactions on Circuits and Systems – II, Vol.47, No.12, pp.1560-1564, December 2000.

21 M. du Plessis, H. Aharoni and L.W. Snyman, “A silicon transconductance light emitting device (TRANSLED),” Sensors and Actuators A, Vol.80(3), pp.242-248, March 2000.

20 L.W. Snyman, M. du Plessis, E. Seevinck and H. Aharoni, “An efficient low voltage, high frequency silicon CMOS light emitting device and electro-optical interface,” IEEE Electron Device Letters (U.S.A.), Vol.20, No.12, pp.614-617, December 1999.

19 L.W. Snyman, H. Aharoni, M. du Plessis, A. Biber and B.D. Patterson, “Light emitting diodes fabricated with standard silicon CMOS integrated circuit technology,” Elektron (SAIEE publication), Vol. 16, No. 6, pp.16-19, June 1999.

6

18 S.A. Goodman, F.D. Auret, M. du Plessis and W.E. Meyer, “The influence of high energy alpha-particle irradiation on the spectral and defect properties of a Si photovoltaic detector,” Semiconductor Science and Technology, Vol.14, No.14, pp.323-326, April 1999.

17 L.W. Snyman, H. Aharoni and M. du Plessis, “Characterization of breakdown phenomena in light emitting silicon n+p diodes,” Journal of Applied Physics, Vol.84, No.5, pp.2953-2959, September 1998.

16 E. Seevinck, M. du Plessis, T-H. Joubert and A.E. Theron, “Active-bootstrapped gain-enhancement technique for low-voltage circuits,” IEEE Transactions on Circuits and Systems II, Vol.45, No.9, pp.1250-1254, September 1998.

15 L.W. Snyman, H. Aharoni, M. du Plessis and R.B.J. Gouws, “Increased efficiency of silicon light emitting diodes in a standard 1.2 micron complementary metal oxide semiconductor technology,” Optical Engineering, Vol.37, No.7, pp.2133-2141, July 1998.

14 H. Aharoni and M. du Plessis, “The spatial distribution of light from silicon LED’s,” Sensors and Actuators A, Vol.57(3), pp.233-237, December 1996.

13 E. Seevinck, M. du Plessis, T-H. Joubert and A.E. Theron, “Low-voltage CMOS bias circuit,” Electronics Letters, Vol.32, No.20, pp. 1879-1880, 1996.

12 M. du Plessis and P. Schieke, “Simulation of the sub-threshold characteristics of resistive gate NMOS transistors,” Journal Avtometra (Russian), No.4, pp.43-50, 1995.

11 A.E. Theron and M. du Plessis, “An efficient response surface technique for investigating process related effects on circuit electrical performance,” The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, COMPEL, Vol.13, No.4, pp.685-692, December 1994.

10 P. Schieke and M. du Plessis, “Lateral gate bias effects in resistive gate NMOS transistors,” The International Journal for Computation and Mathematics in Electrical and Electronic Engineering, COMPEL, Vol.12, No.4, pp.341-351, December 1993.

9 P. Schieke and M. du Plessis, “Simulation of the saturation current characteristics of a resistive gate MOS transistor as a function of lateral gate bias,” South African Journal of Physics, Vol.16, No.1/2, pp.108-110, June 1993.

8 A.E. Theron and M. du Plessis, “Circuit performance based optimization of the CMOS fabrication process,” South African Journal of Physics, Vol.16, No.1/2, pp.111-114, June 1993.

7 J.C. Brümmer, H. Aharoni and M. du Plessis, “Visible light from guardring avalanche silicon photodiodes at different current levels,” South African Journal of Physics, Vol.16, No.1/2, pp.149-152, June 1993.

6 P. Schieke and M. du Plessis, “A silicon high-frequency bipolar power transistor,” South African Journal of Science, Vol.87, No.3/4, pp.133-134, March/April 1991.

5 A.E. Theron and M. du Plessis, “An accurate MOSFET model for computer-aided simulation of analogue circuits,” South African Journal of Science, Vol.85, No.11, pp.716-718, November/December 1989.

4 J.C. Brümmer and M. du Plessis, “Numerically aided design of a reachthrough silicon avalanche photodiode,” South African Journal of Science, Vol.85, No.11, pp.714-716, November/December 1989.

3 T-H. Botha and M. du Plessis, “Technological design considerations of passive and non-MOS active components for analogue CMOS circuits,” South African Journal of Science, Vol.85, No.11, pp.701-703, November/December 1989.

2 M. du Plessis and J.A. Pretorius, “Epitaxial processing for advanced CMOS technology,” South African Journal of Science, Vol.84, No.8, pp.690-692, August 1988.

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1 M. du Plessis and P. Rademeyer, “Experimental verification of a VMOS UHF power transistor model and design,” Electronics Letters, Vol.21, No.19, pp.881-882, 1985.

2.4 Papers presented and published in international conference proceedings

70 M. du Plessis and T-H. Joubert, “Silicon nanowire hot carrier electroluminescence,” Submitted for publication in the Proceedings of the Conference on Transport and Photonics in Group IV-based Nanodevices, E-MRS Spring Meeting and Exhibit, Lille, France, 11-15 May 2015.

69 M. du Plessis and P.J. Venter, “Silicon-on-insulator (SOI) nanowire hot carrier electroluminescence,” Proceedings of the International IEEE Photonics Conference, IPC 2014, pp. 562-563, San Diego, USA, 12-16 October 2014.

68 M.E. Goosen, P.J. Venter, M. du Plessis, N.M. Fauré, C. Janse van Rensburg and P. Rademeyer, “Fully integrated CMOS microdisplays for wearable sports and HMD applications,” Proceedings of the 2014 SID International Symposium on Wearable Displays I: Imaging Devices, SID 2014 Digest, pp. 226-229, San Diego, USA, 3-6 June 2014.

67 A.F. Bulling, P.J. Venter and M. du Plessis, “Analysis of CMOS hot carrier light sources using back-end-of-line light directing structures for improved light extraction efficiency,” Accepted for publication in the Proceedings of the 3rd Conference on Sensors, MEMS and Electro-Optic Systems, SMEOS’2014, Proceedings of SPIE Vol. 9257, 9257-24(1-9), Skukuza, South Africa, 17-19 March 2014.

66 M.E. Goosen, P.J. Venter, M. du Plessis, N.M. Faure, C. Janse van Rensburg and P. Rademeyer, “All-CMOS night vision viewer with integrated microdisplay,” Proceedings of the Conference on Advances in Display Technologies IV, Proceedings of SPIE Vol. 9005, 9005-5, San Francisco, California, USA, 1-6 February 2014.

65 C. Janse van Rensburg, M. du Plessis, P.J. Venter, “Characteristics of avalanche electroluminescent nanoscale Si light sources in SOI technology,” Proceedings of the Conference on Silicon Photonics IX, Proceedings of SPIE Vol. 8990, 8990-19, San Francisco, California, USA, 1-6 February 2014.

64 M. du Plessis and P.J. Venter, “Hot electron electroluminescence from silicon nanowires,” Proceedings of the ICPS 2013 International Conference on Photonics Solutions, Proceedings of SPIE Vol. 8883, 888346 (1-9), Pattaya, Thailand, 26-28 May 2013.

63 P.J. Venter, A.C. Alberts, M. du Plessis, T-H. Joubert, M.E. Goosen, C. Janse van Rensburg, P. Rademeyer and N.M. Faure, “A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources,” Proceedings of the Advances in Display Technologies III Conference, Proceedings of SPIE Vol. 8643, 864309(1-9), San Francisco, California, USA, 2-7 February 2013.

62 P.J. Venter, M. du Plessis, A.W. Bogalecki and C. Janse van Rensburg, “Nanoscale SOI silicon light source design for improved efficiency,” Proceedings of the Optoelectronic Integrated Circuits XV Conference, Proceedings of SPIE Vol. 8628, Paper 86280A(1-9), San Francisco, California, USA, 2-7 February 2013.

61 M.E. Goosen, A.C. Alberts, P.J. Venter, M. du Plessis and P. Rademeyer, “An all-silicon optical PC-to-PC link utilising USB,” Proceedings of the Optoelectronic Interconnects XIII Conference, Proceedings of SPIE Vol. 8630, Paper 86300K(1-9), San Francisco, California, USA, 2-7 February 2013.

60 A.W. Bogalecki, M. du Plessis, P.J. Venter and C. Janse van Rensburg, “NIR spectral characteristics of avalanche electroluminescent silicon CMOS light emitters,” Proceedings of the Silicon Photonics VII Conference, Proceedings of SPIE Vol. 8266, 82660S(1-11), San Francisco, California, USA, 21-26 January 2012.

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59 M.E. Goosen, A.C. Alberts, P. Rademeyer, A.W. Bogalecki, M. du Plessis and P.J. Venter, “A high-speed 0.35um CMOS optical communication link,” Proceedings of the Optoelectronic Interconnects XII Conference, Proceedings of SPIE 8267, 826716(1-7), San Francisco, California, USA, 21-26 January 2012.

58 P.J. Venter, M. du Plessis, A.W. Bogalecki and P. Rademeyer, “An all-CMOS microdisplay utilizing integrated novel avalanche light-emitting sources,” Proceedings of the SID (Society for Information Display) Display Week Conference, SID 2011, pp. 1512-1515, Los Angeles, California, USA, 15-20 May 2011.

57 M.E. Goosen, P.J. Venter, M. du Plessis, I.J. Nell, A.W. Bogalecki and P. Rademeyer, “High speed CMOS optical communication using silicon light emitters,” Proceedings of the Optoelectronic Interconnects and Component Integration XI Conference, Proceedings of SPIE Vol. 7944, 79440X(1-8), San Francisco, California, USA, 22-27 January 2011.

56 P.J. Venter, A.W. Bogalecki, M. du Plessis, M.E. Goosen and I.J. Nell, “CMOS dot matrix microdisplay,” Proceedings of the Advances in Display Technologies Conference, Proceedings of SPIE Vol. 7956, 79560Y(1-6), San Francisco, California, USA, 22-27 January 2011.

55 A.W. Bogalecki, P.J. Venter, I.J. Nell, M.E. Goosen and M. du Plessis, “Integrated optical light directing structures in CMOS to improve light extraction efficiency,” Proceedings of the 22nd International Conference on Microelectronics (ICM 2010), pp. 168-171, Cairo, Egypt, 19-22 December 2010.

54 P.J. Venter, A.W. Bogalecki, I.J. Nell, M.E. Goosen and M. du Plessis, “Improved efficiency of CMOS light emitters in punch through with field oxide manipulation,” Proceedings of the 22nd International Conference on Microelectronics (ICM 2010), pp. 36-39, Cairo, Egypt, 19-22 December 2010.

53 M. du Plessis, P.J. Venter and A.W. Bogalecki, “Using reach-through techniques to improve the external power efficiency of silicon CMOS light emitting devices,” Proceedings of Photonic Integration, Silicon Photonics V Conference, Proceedings of SPIE Vol. 7606, 760612(1-12), San Francisco, USA, 23-28 January 2010.

52 A.W. Bogalecki and M. du Plessis, “Design and manufacture of quantum-confined punch-through SOI light sources,” Proceedings of Photonic Integration, Optoelectronic Integrated Circuits XII Conference, Proceedings of SPIE Vol. 7605, 76050B(1-12), San Francisco, USA, 23-28 January 2010.

51 P.J. Venter and M. du Plessis, “Improved silicon light emission for reach- and punch-through devices in standard CMOS,” Proceedings of Photonic Integration, Optoelectronic Interconnects and Component Integration X Conference, Proceedings of SPIE Vol. 7607, 76070Z(1-9), San Francisco, USA, 23-28 January 2010.

50 P. Ellinghaus, P.J. Venter, M. du Plessis, P. Rademeyer and A.W. Bogalecki, “An all silicon optical transmission system for clock and data transmission,” Proceedings of Photonic Integration, Silicon Photonics V Conference, Proceedings of SPIE Vol. 7606, 76061J(1-7), San Francisco, USA, 23-28 January 2010.

49 P.J. Visser, J. Schoeman and M. du Plessis, “A CMOS based logic driver design for a 16 x 16 multiplexer based read-out array for infrared microbolometers,” Proceedings of the International IEEE Africon 2009 Conference, pp. 1-4, Nairobi, Kenya, 23-25 September 2009.

48 M.E. Goosen, S. Sinha, A. Müller and M. du Plessis, “A low switching time transmitter for high speed adaptive pre-emphasis serial links,” Proceedings of IEEE International Semiconductor Conference, CAS 2009, pp. 481-484, Sinaia, Romania, 12-14 October 2009.

47 M. Božanić, S. Sinha, A. Müller and M. du Plessis, “Design flow for a Si:Ge BiCMOS based power amplifier,” Proceedings of IEEE International Semiconductor Conference, CAS 2009, pp. 311-314, Sinaia, Romania, 12-14 October 2009.

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46 L.W. Snyman, K.A. Ogudo, M. du Plessis and G. Udahemuka, “Application of Si LED’s (450nm-750nm) in CMOS integrated circuitry based-MOEMS, simulation and analysis,” Proceedings of MOEMS-MEMS, Micro- and Nanofabrication Conference, MOEMS and Miniaturized Systems VIII, Proceedings of SPIE Vol. 7208, 72080C(1-17), San Jose, USA, 24-29 January 2009.

45 C. Schutte, M. du Plessis, T-H. Joubert, and O. Philander, “Technology development for a MEMS microbolometer,” Proceedings of the 2nd South African International Aerospace Symposium (SAIAS 2008), Spier Conference Centre, Stellenbosch, South Africa, 14-16 September 2008.

44 C. Coetzee, S. Sinha, M. du Plessis and A. Muller, “A 0.35 μm CMOS GPS Receiver,” Proceedings of IEEE International Semiconductor Conference, CAS 2008, pp. 411-414, Sinaia, Romania, 13-15 October 2008.

43 L.W. Snyman and M. du Plessis, “Increasing the efficiency of p+np injection-avalanche Si CMOS LED's (450nm-750nm) by means of depletion layer profiling and reach through techniques,” Proceedings of Silicon Photonics III Conference, Proceedings of SPIE Vol. 6898, 68980E(1-12), San Jose, USA, 20-25 January 2008.

42 M. du Plessis, “Integrated nanoporous silicon nano-explosive devices,” Proceedings of the 2007 IEEE International Symposium on Industrial Electronics, ISIE 2007, pp. 1574-1579, Vigo, Spain, 4-7June 2007.

41 L.W. Snyman, M. du Plessis and H. Aharoni, “Two order increase in the optical emission intensity of CMOS Integrated Circuit Si LED’s (450nm – 750nm). Injection–avalanche based n+pn and p+np designs,” Proceedings of Silicon Photonics II Conference, Proceedings of SPIE Vol. 6477, 64770T(1-10), San Jose, USA, 22-25 January 2007.

40 L.W. Snyman, M. du Plessis and H. Aharoni, “Light emission from two junction Si CMOS LED’s (450nm – 750nm) with two orders increase in emission intensity – Applications for next generation silicon-based optoelectronics,” Extended abstracts of the 2006 International Conference on Solid State Devices and Materials SSDM’2006, pp. 50-51, Yokohama, Japan, 13-15 September 2006.

39 C.C. du Preez, S. Sinha and M. du Plessis (Invited paper), “CMOS ECG, EEG and EMG waveform bio-simulator,” Proceedings of the IEEE International Semiconductor Conference, CAS 2006, pp.29-38, Sinaia, Romania, 27-29 September 2006.

38 M. du Plessis, (Invited paper) “Integrated porous silicon nano-explosive devices,” Proceedings of the 7th Siberian/Russian Workshop and Tutorial on Electron Devices and Materials EDM’2006, pp. 6-13, Erlagol, Altai, Russia, 1-5 July 2006.

37 M. du Plessis and C. du P. Conradie, “Porous silicon nano-explosive devices,” Proceedings of the SPIE International Conference on Device and Process Technologies for Microelectronics, MEMS and Photonics IV, Proceedings of SPIE Vol. 6037, 60370X(1-10), Brisbane, Australia, 11-14 December 2005.

36 M. du Plessis and C. du P. Conradie, (Invited paper) “Nano-explosions in silicon,” Proceedings of the 12th International IEEE Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2005, pp.721-726, Kraków, Poland, 22-25 June 2005.

35 L.W. Snyman, M. du Plessis and H. Aharoni, (Invited paper) “Three terminal optical sources (450nm – 750nm) for next generation silicon CMOS OEIC’s,” Proceedings of the 12th International IEEE Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2005, pp.737-750, Kraków, Poland, 22-25 June 2005.

34 M. du Plessis, L.W. Snyman and H. Aharoni, “Low voltage light emitting devices in silicon IC technology,” Proceedings of the IEEE International Symposium on Industrial Electronics, ISIE 2005, Vol.3, pp.1145-1149, Dubrovnik, Croatia, 20-23 June 2005.

10

33 L.W. Snyman, M. du Plessis and H. Aharoni, “Three terminal n+ppn silicon CMOS light emitting devices (450nm-750nm) with three order increase in quantum efficiency,” Proceedings of the IEEE International Symposium on Industrial Electronics, ISIE 2005, Vol.3, pp.1159-1166, Dubrovnik, Croatia, 20-23 June 2005.

32 L.W. Snyman, H. Aharoni and M. du Plessis, “Higher efficiency silicon CMOS light emitting devices (450nm-750nm) using current density confinement and carrier injection techniques,” Proceedings of the Optoelectronic Integration on Silicon III Conference, Proceedings of SPIE Vol. 5730, pp. 59-72, San Jose, USA, 25-26 January 2005.

31 M. du Plessis, H. Aharoni and L.W. Snyman, “Low voltage CMOS/BiCMOS light emitting devices,” Proceedings of the IEEE International Conference on Optoelectronic and Microelectronic Materials and Devices, COMMAD’2004, pp. 393-396, Brisbane, Australia, 8-10 December 2004.

30 L.W. Snyman, H. Aharoni and M. du Plessis, (Invited paper) “Increasing the efficiency of a three terminal silicon CMOS LED through current density and carrier injection techniques,” Proceedings of the 12th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications, EDMO 2004, pp. 71-82, Kruger National Park, South Africa, 8- 9 November 2004.

29 S. Sinha and M. du Plessis, “Design of an active-inductor dual-loop frequency synthesizer,” Proceedings of the 12th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications, EDMO 2004, pp. 52-59, Kruger National Park, South Africa, 8- 9 November 2004.

28 S. Sinha and M. du Plessis, “Design of a dual-loop frequency synthesizer,” Proceedings of the 7th IEEE Africon 2004 Conference, Vol. 1, pp. 525-529, Gaberone, Botswana, 15-17 September 2004.

27 L.W. Snyman, C-T Chaing, A.W. Bogalecki, M. du Plessis and H. Aharoni, “200-Mbps optical integrated circuit design and first iteration realizations in 1.2 and 0.8 micron Bi-CMOS technology,” Proceedings of the Optoelectronic Integration on Silicon II Conference, Proceedings of SPIE Vol. 5357, pp. 25-34, San Jose, USA, 24-29 January 2004.

26 L.W. Snyman, H. Aharoni and M. du Plessis, “Quantum efficiency of CMOS integrated silicon n+pp+ light emitting devices as function of current density,” Proceedings of the 11th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications, EDMO 2003, pp. 133-138, Orlando, Florida, USA, 17- 18 November 2003.

25 L.W. Snyman, A.W. Bogalecki, L.M. Canning, M. du Plessis and H. Aharoni, “High frequency optical integrated circuit design and first iteration realisation in standard silicon CMOS integrated circuitry,” Proceedings of the 10th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications, EDMO 2002, pp.77-82, Manchester, UK, 18-19 November 2002.

24 J.F. Schoeman and M. du Plessis, “A novel technique for non-volatile data storage using avalanche degradation,” Proceedings of the 6th IEEE Africon Conference, Vol.1, pp.411-414, George, South Africa, 2-4 October 2002.

23 M. du Plessis and H. Aharoni, “Resistive gate MOS modulation of light emission from a silicon LED array,” Photonics West 2002 Conference, Proceedings of the Silicon-based and Hybrid Optoelectronics IV Conference, Proceedings of SPIE Vol. 4654, pp. 70-77, San Jose, USA, 20-25 January 2002.

22 J.F. Schoeman and M. du Plessis, “A novel technique for non-volatile data storage using avalanche degradation,” Proceedings of the International Semiconductor Conference, CAS’2001, Vol. 2, pp.577-580, Sinaia, Romania, 9-13 October 2001. (Best student paper)

21 M du Plessis, H. Aharoni and L.W. Snyman, “Silicon light emitting devices in standard CMOS technology,” (Invited paper) Proceedings of the International Semiconductor Conference, CAS’2001, Vol. 1, pp.231-238, Sinaia, Romania, 9-13 October 2001.

11

20 L.W. Snyman, H. Aharoni and M du Plessis, “Planar silicon light sources in standard 1.2 and 2 micron CMOS technology,” The Technical Digest of the 4th Pacific Rim Conference (CLEO) on Lasers and Electro–Optics 2001, IEEE Catalog Number 01TH8557, Vol 1, pp.108-109, Nippon Convention Center , Makuhari Messe, Chiba, Japan, July 15-19 July 2001

19 M. du Plessis, H. Aharoni and L.W. Snyman, “Spatial and intensity modulation of light emission from silicon LED matrix,” Proceedings of The IEEE International Conference on Optoelectronic and Microelectronic Materials and Devices, COMMAD’2000, pp.29-32, Melbourne, Australia, 6-8 December 2000.

18 T-H. Joubert, E. Seevinck and M. du Plessis, “A CMOS reduced-area SRAM cell,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS’2000), Vol. 3, pp. 335-338, Geneva, Switzerland, 28-31 May 2000.

17 L.W. Snyman, H. Aharoni, A. Biber, A.W. Bogalecki, L.M. Canning, M. du Plessis and P.A. Maree, (Invited paper) “Optical sources, integrated optical detectors and optical waveguides in standard silicon CMOS integrated circuitry,” Proceedings of SPIE Vol. 3953, Silicon-based Optoelectronics II, pp.20-36, San Jose, California, USA, 22-28 January 2000

16 T-H. Joubert, E. Seevinck and M. du Plessis, “A four-transistor CMOS SRAM cell,” Proceedings of the IEEE Africon’99 Conference, Vol. 2, pp.1173-1176, Cape Town, South Africa, 28 September to 1 October 1999.

15 M. du Plessis, H. Aharoni and L.W. Snyman, “A gate-controlled silicon light emitting diode,” Proceedings of the IEEE Africon’99 Conference, Vol. 2, pp.1157-1160, Cape Town, South Africa, 28 September to 1 October 1999.

14 M. du Plessis, H. Aharoni and L.W. Snyman, “Spectral characteristics of Si light emitting diodes in a 0.8 micron BiCMOS technology,” Proceedings of The International Conference on Optoelectronic and Microelectronic Materials and Devices, COMMAD’98, Perth, Australia, pp.228-231, 14-16 December 1998.

13 M. du Plessis and P. Schieke, “Analysis of MOS resistive gate transistors for application in analog multipliers,” Proceedings of The International Conference on Optoelectronic and Microelectronic Materials and Devices, COMMAD’98, Perth, Australia, pp.224-227, 14-16 December 1998.

12 M. du Plessis and P. Schieke, “Simulation of a single resistive gate MOS transistor analog multiplier,” Proceedings of The Sixth International Conference on Simulation of Devices and Technologies, ICSDT’98, Cape Town, South Africa, pp.124-128, 14-16 October 1998.

11 L.W. Snyman, A. Biber, H. Aharoni, M. du Plessis, B.D. Patterson and P. Seitz, “Practical Si LED’s with standard CMOS technology,” Proceedings of the IEEE Southeastcon ’98 Conference, Orlando, Florida, USA, pp.344-348, 24 -26 April 1998.

10 L.W. Snyman, H. Aharoni and M. du Plessis, “Higher efficiency Si LEDs with standard CMOS technology,” Proceedings of The Fifth IEEE International Workshop on High Performance Electron Devices for Microwave and Optoelectronic Applications, EDMO’97 Conference, King’s College, London, UK, pp.340-345, 24-25 November 1997.

9 H. Aharoni, M. du Plessis and L.W. Snyman, “Some properties of light emission from silicon junctions,” Proceedings of the SPIE 10th Meeting on Optical Engineering, Jerusalem, Israel, pp.303-309, 2-6 March 1997.

8 P.N.K. Deenapanray, N.E. Perret, F.D. Auret, J.B. Malherbe and M. du Plessis, “Electronic and optical properties of defects formed in Si and GaAs during low energy noble gas ion bombardment,” Proceedings of the International Conference on Optoelectronic and Microelectronic Materials and Devices, COMMAD’96, Canberra, Australia, pp.150-153, December 1996.

12

7 M. du Plessis and P. Schieke, “The characteristics of resistive gate MOS transistors,” Proceedings of the International Conference on Optoelectronic and Microelectronic Materials and Devices, COMMAD’96, Canberra, Australia, pp.239-242, December 1996.

6 T.H. Joubert, M. du Plessis, L.W. Snyman and A.E. Theron, “Education and training of microelectronics engineers: Why and how?,” Proceedings of the Africon’96 Conference, Stellenbosch, South Africa, Vol. 1, pp.293-296, September 1996.

5 L.W Snyman, H. Aharoni and M. du Plessis, “Increased efficiency of silicon light emitting diodes,” Proceedings of the International Symposium on Blue Laser and Light Emitting Diodes, Chiba, Japan, pp.562-565, March 1996.

4 A.E. Theron, L.P.J. Bijnens and M. du Plessis, “Process optimization for CMOS low voltage amplifier,” Proceedings of the Fourth International Seminar on Simulation of Devices and Technologies, ISSDT’95, Kruger National Park, South Africa, pp.200-205, November 1995.

3 L.W. Snyman, H. Aharoni, M. du Plessis, R.B.J. Gouws, L.J. Grobler and D.P.J. Buys, “Physical model of the light emission processes in silicon CMOS light emitting diodes,” Proceedings of the Fourth International Seminar on Simulation of Devices and Technologies, ISSDT’95, Kruger National Park, South Africa, pp.140-143, November 1995.

2 P. Schieke and M. du Plessis, “An analytical DC model for resistive gate MOS transistors biased in the saturation and subthreshold regions,” Proceedings of the Fourth International Seminar on Simulation of Devices and Technologies, ISSDT’95, Kruger National Park, South Africa, pp.70-73, November 1995.

1 S.F. Voges and M. du Plessis, “The effect of the vertical electric field on freeze-out in MOS structures,” Proceedings of the IEEE Workshop on Low Temperature Semiconductor Electronics, Burlington, Vermont, USA, pp.38-42, August 1989.

2.5 Papers presented and published in national conference proceedings

22 M.E. Goosen, M. du Plessis, P.J. Venter, A.W. Bogalecki, A.C. Alberts and P. Rademeyer, “CMOS avalanche electroluminescence applications – microdisplay and high speed data communication,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, pp. 64-68, 19-21 September 2011.

21 W. Maclean, M. du Plessis and J. Schoeman, “Optimization of CMOS compatible microbolometer device performance,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, pp. 69-74, 19-21 September 2011.

20 J. Schoeman and M. du Plessis, “Characterisation of the electrical response of a novel dual element thermistor for low frequency applications,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, pp. 59-63, 19-21 September 2011.

19 A.W. Bogalecki, M. du Plessis and P.J. Venter, “Spectral measurements and analysis of silicon CMOS light sources,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, pp. 32-37, 19-21 September 2011.

18 M. du Plessis, J. Schoeman, W. Maclean and C. Schutte, “The electro-thermal properties of integrated circuit microbolometers,” Proceedings of the Test and Measurement Conference T&M 2010, Paper M112(1-6), Champagne Resort, Drakensberg, South Africa, 7-10 November 2010.

17 P.J. Venter and M. du Plessis, “Feasibility of optical clock distribution for future CMOS technology nodes,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2009 Conference, pp. 71-75, Skukuza, South Africa, 7-9 September 2009.

13

16 P. Ellinghaus, P.J. Venter, M. du Plessis, P. Rademeyer and A.W. Bogalecki, “A fully CMOS optical transmission system based on light emitting avalanche diodes,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2009 Conference, pp. 27-30, Skukuza, South Africa, 7-9 September 2009.

15 T-H. Joubert and M. du Plessis, “CMOS focal plane processing chip for IR array imager,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2009 Conference, pp. 21-26, Skukuza, South Africa, 7-9 September 2009.

14 M. du Plessis, P.J. Venter and P. Ellinghaus, “The improvement of the external power efficiency of silicon led’s using reach-through structures,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2009 Conference, pp. 15-20, Skukuza, South Africa, 7-9 September 2009.

13 A.W. Bogalecki and M. du Plessis, “Design and manufacture of quantum-confined Si light sources,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2009 Conference, pp. 9-14, Skukuza, South Africa, 7-9 September 2009

12 W. Maclean and M. du Plessis, “SPICE simulation of thermal properties of uncooled IR microbolometers,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2009 Conference, pp. 80-84, Skukuza, South Africa, 7-9 September 2009.

11 J. Schoeman and M. du Plessis, “Characterisation of the electrical response of a thermistor in the infrasonic frequency range,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2009 Conference, pp. 91-93, Skukuza, South Africa, 7-9 September 2009.

10 P.J. Visser, J. Schoeman and M. du Plessis, “A CMOS based design of a 16 × 16 pseudo-pixelwise read-out array for infrared microbolometer sensors,” Proceedings of the SMEOS (Sensors, MEMS and Electro-optic Systems) 2009 Conference, pp. 100-103, Skukuza, South Africa, 7-9 September 2009.

9 S. Sinha, M. Božanić, J. Schoeman, M. du Plessis and L.P. Linde, “A CMOS based multiple-access DSSS transceiver,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 19-24, Spier, Stellenbosch, South Africa, 8-9 April 2009.

8 T-H. Joubert and M. du Plessis, “A 384 x 288 pixel CMOS image readout chip,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 105-110, Spier, Stellenbosch, South Africa, 8-9 April 2009.

7 L.W. Snyman, M. du Plessis and E. Bellotti, “Photonic transitions (1.4eV – 2.8eV) in silicon p+np+ injection-avalanche CMOS LEDs as function of depletion layer profiling and punch through techniques,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 146-160, Spier, Stellenbosch, South Africa, 8-9 April 2009.

6 K.A. Ogudo, L.W. Snyman, M. du Plessis and G. Udahemuka, “Simulation of Si LED (450nm – 750nm) light propagation phenomena in CMOS integrated circuitry for MOEMS applications,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 161-175, Spier, Stellenbosch, South Africa, 8-9 April 2009.

5 P.J. Visser, J. Schoeman and M. du Plessis, “A CMOS based multiplexer design of a 16 x 16 read-out array for infrared microbolometer sensors,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 66-70, Spier, Stellenbosch, South Africa, 8-9 April 2009.

4 M.J. Swart and M. du Plessis, “Microbolometer model and characterisation,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 59-65, Spier, Stellenbosch, South Africa, 8-9 April 2009.

14

3 P.J. Venter and M. du Plessis, “Impact of future CMOS scaling on power consumption, Electrical versus optical clock distribution networks,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 25-30, Spier, Stellenbosch, South Africa, 8-9 April 2009.

2 A.W. Bogalecki and M. du Plessis, “Design and manufacture of nanometre-scale SOI light sources,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 140-145, Spier, Stellenbosch, South Africa, 8-9 April 2009.

1 M. du Plessis and P. Rademeyer, “A novel electroluminescence technique to analyse mixed field emission and impact ionisation reverse breakdown,” Proceedings of the 1st SACSST 2009 (South African Conference on Semi- and Superconducting Technology) Conference, pp. 54-58, Spier, Stellenbosch, South Africa, 8-9 April 2009.

2.6 International papers presented (but not published)

20 M. du Plessis and P.J. Venter, “Optimization of CMOS micro display light sources," Paper presented at the 4th International Conference on the Advances in Applied Physics and Materials Science, APMAS 2014, Oludeniz, Turkey, 24-27 April 2014.

19 M. du Plessis, “Nano explosive devices in silicon technology," Paper presented at the IEEE EDS Mini Colloquium, Future University of Cairo, Cairo, Egypt, 18-19 March 2012.

18 M. du Plessis, “Nano explosive devices in silicon technology," Paper presented at the IEEE EDS Mini Colloquium, University of Pretoria, Pretoria, South Africa, 23 September 2011.

17 M. du Plessis and A.W. Bogalecki, “Avalanche electroluminescence in silicon-on-insulator (SOI) nanowires,” Paper presented at the Smart Materials, Devices, and Related Technology Symposium at the XX International Materials Research Congress, Cancun, Mexico, 14-19 August 2011.

16 K. Ogudo, L.W. Snyman, G. Udahemuka and M. du Plessis, “Simulation of Si-LED (450nm-750nm) light propagation phenomena in CMOS 0.35 micron-integrated circuitry, MOEMS applications,” Paper presented at the SPIE Symposium on MOEMS-MEMS, Micro- and Nanofabrication, Proc. 7204 - Micromachining and Microfabrication Process Technology XIII, San Jose, USA, 24 - 29 January 2009

15 H. Aharoni, M. du Plessis and L.W. Snyman, “Proposed model for the effect of microplasma properties on the light emission spectrum from single crystal reverse biased silicon pn junctions,” Poster presented at the 55th Annual Meeting of the Israel Physical Society (IPS 2009), Bulletin of the Israel Physical Society (IPS), Vol.55, p. 39, Bar-Ilan University, Ramat Gan, Israel, 13 December, 2009.

14 H. Aharoni, M. du Plessis and L.W. Snyman, “BJT-like three terminal silicon light emitting devices (SiLEDs), Light emission intensity enhancement and modulation from reverse biased pn junction operated in the ionization region, by external mobile carrier injection into its high electric filed space charge region,” Poster presented at the 53rd Annual Meeting of the Israel Physical Society (IPS 2007), The Bulletin of the Israel Physical Society, Vol. 53, p.171, Weizmann Institute of Science, Rhovot, Israel, 9 December 2007.

13 H. Aharoni, M. du Plessis and L.W. Snyman, “Enhancement of light intensity output from two terminal silicon light emitting devices (SiLEDs) through structural and geometrical means,” Poster presented at the 53rd Annual Meeting of the Israel Physical Society (IPS 2007), The Bulletin of the Israel Physical Society, Vol. 53, p.172, Weizmann Institute of Science, Rhovot, Israel, 9 December 2007.

12 M. du Plessis, “Integrated nano-explosive devices using nano-porous silicon,” Invited talk at IEEE EDS Mini-Colloquium, NADE – Nanoelectronic Devices - Present and Perspectives, Sinaia, Romania, 14 October, 2007

15

11 H. Aharoni, M. du Plessis and L.W. Snyman, “Multiterminal silicon integrated monolithic light emitting devices,” Poster presentation, Intel 12th EMEA (Europe, Middle East, Africa) Academic Forum, Budapest, Hungary, 12-14 June, 2007.

10 H. Aharoni, M. du Plessis and L.W. Snyman, “Two terminal silicon integrated monolithic light emitting devices,” Poster presentation, Intel 12th EMEA (Europe, Middle East, Africa) Academic Forum, Budapest, Hungary, 12-14 June, 2007.

9 M. du Plessis, “Nanoporous silicon explosive devices,” Paper presented at the European Materials Research Society Conference on Semiconductor Nanostructures towards Electronic and Optoelectronic Device Applications, E-MRS 2007 Spring Meeting, Strasbourg, France, May 28 to June 1, 2007.

8 L.W.Snyman, M.du Plessis, H.Aharoni, “Researching the mechanism responsible for light emission in avalanche-based silicon CMOS LEDs (450nm-750nm),” Paper presented at the 51st Annual Meeting of the Israel Physical Society (IPS 2005), Ort Braude College, Krmiel, Israel. Bulletin of the Israel Physical Society, Vol.51, pp.104, 29 December 2005.

7 M. du Plessis, “Silicon light emitting devices in standard CMOS/BiCMOS technology,” IEEE Distinguished Lecturer lecture at IEEE EDS EAM (Europe, Africa, Middle East) Colloquium, Madrid, Spain, 21 May 2004.

6 H. Aharoni, M. du Plessis and L.W. Snyman, "Practical silicon light emitting devices fabricated by standard IC technology,” Paper presented at the 50th Annual Meeting of the Israel Physical Society (IPS 2004), Haifa Technion, Israel. Bulletin of the Israel Physical Society, Vol.50, pp.125, 9 December 2004.

5 M. du Plessis, H. Aharoni and L.W. Snyman, “Two- and multi-terminal CMOS/BiCMOS Si LED’s,” Paper presented at the Si-based Photonics, Towards true monolithic integration Symposium at the European Materials Research Society E-MRS 2004 Spring Meeting in Strasbourg, France, May 24-28, 2004.

4 H. Aharoni, M. du Plessis and L.W. Snyman, “Light emission from multiterminal silicon integrated monolithic devices,” Paper presented at the 49th Annual Meeting of the Israel Physical Society, Bar-Ilan University, Ramat Gan, Israel. Bulletin of the Israel Physical Society, Vol.49, pp.64, 21 December 2003.

3 H. Aharoni, M. du Plessis and L.W. Snyman, “Light emission from two terminal silicon optoelectronic devices,” Paper presented at the 48th Annual Meeting of the Israel Physical Society, Weizmann Institute, Rehovot, Israel. Bulletin of the Israel Physical Society, Vol.48, pp.5, 3 December 2002.

2 H.Aharoni, M. du Plessis and L.W. Snyman, “Electro-optical characterization of striations in CZ grown Si wafers by using light emission from built-in junctions,” Paper presented at the Second Conference on Material Science and Technologies, AGIL’98, Ramat Gan, Israel, 25-26 November 1998.

1 P. Olckers and M. du Plessis, “Simulating the real world for engineering students,” Paper presented at the IEEE Frontiers in Education Conference, Indiana, USA, October 1987.

2.7 National papers presented (but not published)

40 P.J. Venter and M. du Plessis, “Integrating silicon hot carrier electroluminescent light sources in standard CMOS,” Paper presented at the SMEOS (Sensors, MEMS and Electro-Optic Systems) 2014 Conference, Skukuza, South Africa, 17-19 March 2014.

39 P. Rademeyer, M. du Plessis, P.J. Venter, M.E. Goosen, N.M. Faure and C. Janse van Rensburg, “Novel applications of silicon-based CMOS light sources,” Paper presented at the SMEOS (Sensors, MEMS and Electro-Optic Systems) 2014 Conference, Skukuza, South Africa, 17-19 March 2014.

38 D.S. Mellet and M. du Plessis, “A novel CMOS Hall effect sensor,” Paper presented at the SMEOS (Sensors, MEMS and Electro-Optic Systems) 2014 Conference, Skukuza, South Africa, 17-19 March 2014.

16

37 J. Schoeman and M. du Plessis, “Optimisation of the thermal coupling coefficient for a dual element uncooled microbolometer,” Paper presented at the SMEOS (Sensors, MEMS and Electro-Optic Systems) 2014 Conference, Skukuza, South Africa, 17-19 March 2014.

36 M. du Plessis, “Porous silicon nano explosives: A review,” Paper presented at the SMEOS (Sensors, MEMS and Electro-Optic Systems) 2014 Conference, Skukuza, South Africa, 17-19 March 2014.

35 T-H. Joubert and M. du Plessis, “CMOS focal plane processing chip for IR array imager,” Paper presented at the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, 19-21 September 2011.

34 P.J. Venter, F. Bertazzi, M. du Plessis and E. Bellotti, “Modelling of SiGe heterostructures for optoelectronic applications,” Paper presented at the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, 19-21 September 2011.

33 P. Rademeyer and M. du Plessis, “The UP/INSiAVA silicon photonics initiative – an overview,” Paper presented at the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, 19-21 September 2011.

32 P.J. Venter, M. du Plessis, A.W. Bogalecki, M.E. Goosen, A.C. Alberts and P. Rademeyer, “An all-CMOS microdisplay using novel light sources for data display applications,” Poster presented at the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, 19-21 September 2011.

31 A.C. Alberts, M.E. Goosen, P. Rademeyer and M. du Plessis, “An optimized optical concentrator for use in the collection of a diffuse wide spectrum light source for data communications,” Poster presented at the SMEOS (Sensors, MEMS and Electro-optic Systems) 2011 Conference, Berg-en-Dal, South Africa, 19-21 September 2011.

30 M. du Plessis, P.J. Venter, A.W. Bogalecki, M.E. Goosen, I.J. Nell, “Experimental determination of the internal quantum efficiency of silicon CMOS light sources,” Poster presentation at the Test and Measurement Conference, T&M 2010, Champagne Resort, Drakensberg, South Africa, 7-10 November 2010.

29 S.A. Goodman, F.D. Auret, W.E. Meyer and M. du Plessis, “The influence of particle irradiation on the performance of a Si photodetector,” Paper presented at the 42nd SAIP (South African Institute of Physics) Conference, Durban-Westville, South Africa, 1997.

28 S.A. Goodman, F.D. Auret and M. du Plessis, “The influence of radiation damage on Si photovoltaic detectors,” Paper presented at the Conference on Photovoltaic Technology, PVCON’95, Kruger National Park, South Africa, 18-20 September 1995.

27 J.C. Brümmer, M. du Plessis and J.J. van der Merwe, “Photovoltaic silicon attitude sensors for satellite applications,” Paper presented at the Conference on Photovoltaic Technology, PVCON’95, Kruger National Park, South Africa, 18-20 September 1995.

26 M. du Plessis, “Silicon research at the University of Pretoria,” Paper presented at the Materials Research Symposium, University of Pretoria, Pretoria, 29 April 1993.

25 L.W. Snyman, M. du Plessis, H. Aharoni and J.C. Brümmer, “SEM EBIC characterization of breakdown mechanisms in Si n+p photodiodes,” Paper presented at the International Conference on the Science and Technology of Electron Devices, STEDCON’92, Berg-en-Dal, Kruger National Park, South Africa, 16-18 November 1992.

17

24 P. Schieke and M. du Plessis, “Simulation of the saturation current characteristics of a resistive gate MOS transistor as a function of lateral gate bias,” Paper presented at the International Conference on the Science and Technology of Electron Devices, STEDCON’92, Berg-en-Dal, Kruger National Park, South Africa, 16-18 November 1992.

23 M. du Plessis and A.E. Theron, “The effect of spatially distributed threshold adjust implants on the output conductance of saturated MOS transistors,” Paper presented at the International Conference on the Science and Technology of Electron Devices, STEDCON’92, Berg-en-Dal, Kruger National Park, South Africa, 16-18 November 1992.

22 C. Marè, P.J. Swart and M. du Plessis, “Colour discriminator,” Paper presented at the International Conference on the Science and Technology of Electron Devices, STEDCON’92, Berg-en-Dal, Kruger National Park, South Africa, 16-18 November 1992.

21 M. du Plessis and A.E. Theron, “Circuit performance based optimisation of the CMOS fabrication process,” Paper presented at the International Conference on the Science and Technology of Electron Devices, STEDCON’92, 16-18 November 1992, Berg-en-Dal, Kruger National Park, South Africa, 16-18 November 1992.

20 J.C. Brümmer, H. Aharoni and M. du Plessis, “Visible light from guardring avalanche silicon photodiodes at different current levels,” Paper presented at the International Conference on the Science and Technology of Electron Devices STEDCON’92, Berg-en-Dal, Kruger National Park, South Africa, 16-18 November 1992.

19 M. du Plessis and A.E. Theron, “Simulation of MOS transistors with partial threshold adjust channel implants,” Paper presented at the Joint SAIEE and Industry Symposium on Electronic Circuit Simulation and Design Techniques, Midrand, South Africa, 22 October 1992.

18 C. Marè and M. du Plessis, “The design of optical components in standard CMOS technology,” Paper presented at the Joint SAIEE and Industry Symposium on Electronic Circuit Simulation and Design Techniques, Midrand, South Africa, 22 October 1992.

17 P. Schieke and M. du Plessis, “One-dimensional simulation of resistive gate MOS transistors,” Paper presented at the Joint SAIEE and Industry Symposium on Electronic Circuit Simulation and Design Techniques, Midrand, South Africa, 22 October 1992.

16 A.E. Theron and M. du Plessis, “Optimization of analogue integrated circuit design,” Paper presented at the Joint SAIEE and Industry Symposium on Electronic Circuit Simulation and Design Techniques, Midrand, South Africa, 22 October 1992.

15 J.P.L. Cloete, M. du Plessis and J.A. Pretorius, “A DCVSL module generator,” Paper presented at the Joint SAIEE and Industry Symposium on Electronic Circuit Simulation and Design Techniques, Midrand, South Africa, 22 October 1992.

14 M. du Plessis, “Silicon device research and development in South Africa - An overview,” Paper presented at the Republic of South Africa/Republic of China Binational Symposium on Electronic Materials and Devices. (Invited talk), University of Port Elizabeth, Port Elizabeth, 2-3 July 1990.

13 P.M. van Rooyen and M. du Plessis, “The integration of simulation tools to enhance the South African semiconductor industry,” Paper presented at the SACAC Simulation Symposium, Johannesburg, May 1990.

12 P. Schieke and M. du Plessis, “A Silicon high frequency bipolar power transistor,” Paper presented at the Gallium Arsenide Device Symposium, Mabula Game Lodge, 28 November 1989.

11 M. du Plessis, (Invited talk) “Microelectronics and the chemical engineer,” Paper presented at the SA Institute of Chemical Engineers Symposium on Electronic Materials, Pretoria, October 1988.

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10 M. du Plessis and J.A. Pretorius, “Epitaxial processing for advanced CMOS technology,” Paper presented at the International Conference on Epitaxy, EPICON’87, Kruger National Park, November 1987.

9 M. du Plessis, (Invited talk) “Microelectronics,” Paper presented at the Fedgas Special Gases Seminar, Pretoria, 2 September 1987.

8 M. du Plessis, “Silicon photodiode matrix with NMOS readout circuitry,” Paper presented at the Seminar on Sensors and Sources, CSIR, Pretoria, 17 October 1985.

7 M. du Plessis, “Reliability studies on VMOS RF power transistors,” Paper presented at the Seminar on Analytical and Characterization Techniques for Resolving Failure Mechanisms in Microelectronics, CSIR, Pretoria, 26 September 1985.

6 M. du Plessis, “The application of ion implantation in MOS technologies,” Paper presented at the Symposium on Ion Implantation, University of Pretoria, Pretoria, 11 July 1983.

5 J.A. Pretorius and M. du Plessis, “Processing of UHF MOS power devices,” Paper presented at the Symposium on Semiconductor Devices and Materials, UPE, Port Elizabeth, 9-10 July 1981.

4 M. du Plessis and J.A. Pretorius, “Design and optimization of UHF MOS power devices,” Paper presented at the Symposium on Semiconductor Devices and Materials, UPE, Port Elizabeth, 9-10 July 1981.

3 P. Rademeyer and M. du Plessis, “Design and Technology of a CCD array,” Paper presented at the Symposium on Charge Coupled Devices and Surface Acoustic Waves, SAIEI, Johannesburg, November 1980.

2 J.A. Pretorius and M. du Plessis, “NMOS process technology,” Paper presented at the Semiconductor Technology Symposium, CSIR, Pretoria, 30 November -1 December 1978.

1 M. du Plessis, “The design of CCD analogue integrated circuits in MOS technology,” Paper presented at the Semiconductor Technology Symposium, CSIR, Pretoria, 30 November -1 December 1978.

2.8 International patents granted

27 M. du Plessis, R.F. Greyvenstein and A.W. Bogalecki, “Optoelectronic device with light directing arrangement and method of forming the arrangement,” (Divisional application in respect of method claims) USA Patent 14/278,181 (Filed as patent application 14/278,181 on 1 April 2014, Notice of allowance received 19 December 2014).

26 M. du Plessis, “Light emitting device with encapsulated reach-through region,” Japan Patent JP5636373 (Filed as patent application 2011-540278 on 13 June 2011, Granted 24 October 2014).

25 M. du Plessis, R.F. Greyvenstein and A.W. Bogalecki, “Optoelectronic device with light directing arrangement and method of forming the arrangement,” Taiwan Patent 097,142,312 (Filed 31 October 2008, Granted 20 November 2014).

24 M. du Plessis, “Silicon light emitting device with carrier injection,” South Korea Patent 10-1439165 (Filed as patent application 10-2010-7008565 on 20 April 2010, Granted 11 September 2014).

23 M. du Plessis, “Silicon light emitting device with carrier injection,” Taiwan Patent I447944 (Filed as patent application 097,138,783 on 7 October 2008, Granted 1 August 2014).

22 M. du Plessis, R.F. Greyvenstein and A.W. Bogalecki, “Optoelectronic device with light directing arrangement and method of forming the arrangement,” Japan Patent JP5550558 (Filed as patent application 2010-531626 on 30 April 2010, Granted 30 May 2014).

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21 M. du Plessis, R.F. Greyvenstein and A.W. Bogalecki, “Optoelectronic device with light directing arrangement and method of forming the arrangement,” USA Patent 8,729,582 (Filed as patent application 12/740,597 on 20 October 2010, Granted 20 May 2014).

20 M. du Plessis and L.W. Snyman, “Semiconductor light emitting device utilising punch-through effects,” USA Patent 8,759,845 (Filed as patent application 12/863,743 on 18 October 2010, Granted 24 June 2014).

19 M. du Plessis, “Silicon light emitting device with carrier injection,” USA Patent 8,362,679 (Filed as patent application 12/734,050 on 1 October 2010, Granted 29 January 2013).

18 M. du Plessis, “Silicon light emitting device with carrier injection,” Canada Patent CA2702002 (Filed as patent application 2,702,002 on 8 April 2010, Granted 25 February 2014).

17 M. du Plessis and L.W. Snyman, “Semiconductor light-emitting device comprising heterojunction,” USA Patent 8,674,382 (Filed as patent application 12/865,609 on 22 November 2010, Granted 18 March 2014).

16 M. du Plessis, “Light emitting device with encapsulated reach-through region,” USA Patent 8,669,564 (Filed as patent application 13/139,653 on 23 September 2011, Granted 11 March 2014) (INSiAVA (Pty) Ltd).

15 M. du Plessis and L.W. Snyman, “Microchip-based MOEMS and waveguide device,” USA Patent 8,395,226 (Filed as patent application 13/146,469 on 19 March 2012, Granted 12 March 2013).

14 M. du Plessis, “Silicon light emitting device with carrier injection,” Europe Patent EP2198466 (Filed as patent application 08807923.1 on 8 April 2010, Granted 4 December 2013). (Granted in France, Germany, Italy, UK on 4 March 2014)

13 M. du Plessis, “Silicon light emitting device with carrier injection,” Japan Patent JP5,420,550 (Filed as patent application 2010-528514 on 8 April 2010, Granted 29 November 2013).

12 M. du Plessis, R.F. Greyvenstein and A.W. Bogalecki, “Optoelectronic device with light directing arrangement and method of forming the arrangement,” China Patent CN101911320 (Filed as patent application 200880123526.1 on 31 October 2008, Granted 21 November 2012).

11 M. du Plessis and L.W. Snyman, “Light-emitting device comprising heterojunction,” China Patent CN101933169 (Filed as patent application 200980103564.5 on 30 January 2009, Granted 11 July 2012).

10 M. du Plessis, “Silicon light emitting device with carrier injection,” China Patent CN101855736 (Filed as patent application 200880115897.5 on 8 October 2008, Granted 21 December 2011).

9 M. du Plessis and L.W. Snyman, “Semiconductor light emitting device comprising heterojunction,” Europe Patent EP2238630 (Filed as patent application 09705354.0 on 30 January 2009, Granted 7 September 2011). (Granted in Germany, Belgium, UK, France, Austria on 7 December 2011).

8 E. Seevinck and M. du Plessis, “Verstärker mit aktiver bootstrap-verstärkungsverbesserungstechnik,” Germany Patent DE69707082 (Filed as patent application 69707082 on 7 May 1997, Granted 6 June 2002).

7 E. Seevinck and M. du Plessis, “Niederspannungs-vorspannungsschaltung zur erzeugung von stromversorgungsunabhängigen biaspotentialen und vorspannungssströmen,” Germany Patent DE69707463 (Filed as patent application 69707463 on 7 May 1997, Granted 23 May 2002).

6 L.W. Snyman, H. Aharoni and M. du Plessis, “Optoelectronic device with separately controllable carrier injection means,” USA Patent 6,111,271 (Filed as patent application 08/938,730 on 26 September 1997, Granted 29 August 2000).

5 E. Seevinck and M. du Plessis, “Amplifier with active-bootstrapped gain-enhancement technique,” USA Patent 6,028,480 (Filed as patent application 08/859,801 on 19 May 1997, Granted 22 February 2000).

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4 L.W. Snyman, H. Aharoni and M. du Plessis, “Indirect bandgap semiconductor optoelectronic device,” USA Patent 5,994,720 (Filed as patent application 08/930,322 on 5 December 1997, Granted 30 November 1999).

3 E. Seevinck and M. du Plessis, “Low voltage bias circuit for generating supply-independent bias voltages and currents,” Europe patent EP0910820 (Filed as patent application 97919572.4 on 7 May 1997, Granted 17 October 2001).

2 E. Seevinck and M. du Plessis, “Low voltage bias circuit for generating supply-independent bias voltages currents,” USA patent 5,825,236 (Filed as patent application 08/859,798 on 19 May 1997, Granted 20 October 1998).

1 E. Seevinck and M. du Plessis, “Amplifier with active-bootstrapped gain-enhancement technique,” Europe patent EP0840951 (Filed as patent application 97919574.0 on 7 May 1997, Granted 4 October 2001).

2.9 National patents granted

12 M. du Plessis and A.W. Bogalecki, “Micro optical device,” RSA Patent 2012/09421 (Filed 12 December 2012, Granted 28 August 2013).

11 M. du Plessis and L.W. Snyman, “Microchip-based MOEMS and waveguide device,” RSA Patent 2011/04343 (Filed 10 June 2011, Granted 27 March 2013).

10 M. du Plessis, “Light emitting device with encapsulated reach-through region,” RSA Patent 2011/04342 (Filed 10 June 2011, Granted 14 December 2011).

9 M. du Plessis and L.W. Snyman, “Light-emitting device comprising heterojunction,” RSA Patent 2010/04754 (Filed 6 July 2010, Granted 25 May 2011).

8 M. du Plessis and L.W. Snyman, “Semiconductor light emitting device utilising punch-through effects,” RSA Patent 2010/04753 (Filed 6 July 2010, Granted 31 August 2011).

7 M. du Plessis, “Silicon light emitting device with carrier injection,” RSA patent 2010/02300 (Filed 6 April 2010, Granted 31 August 2011).

6 M. du Plessis, R.F. Greyvenstein and A.W. Bogalecki, “Optoelectronic device with light directing arrangement and method of forming the arrangement,” RSA Patent 2010/02944 (Filed 28 April 2010, Granted 29 December 2010)

5 C. du P. Conradie en M. du Plessis, “Detonator device,” RSA Patent No 2007/02946 (Filed 10 April 2007, Granted 28 May 2008).

3 L.W. Snyman, H. Aharoni and M. du Plessis, “Indirect bandgap semiconductor optoelectronic device,” RSA Patent No. 1996/02478 (Filed 28 March 1996, Granted 27 November 1996).

2 L.W. Snyman, H. Aharoni and M. du Plessis, “Multi terminal optoelectronic device,” RSA Patent No. 1996/02528 (Filed 29 March 1996, Granted 31 December 1997).

1 L. van Biljon, P. Rademeyer and M. du Plessis, “An ultra high frequency power VMOS transistor (UHF-VMOS),” RSA Patent No.84/0111 (Granted 6 January 1984).

2.10 International patents pending

16 M.E. Goosen, M. du Plessis and J. Korvink, “A data transfer circuit, method and system for an MRI machine having a plurality of receiver surface coils,” Europe Patent Application 13765798.7. Filed 5 August 2013.

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15 M du Plessis and A.W. Bogalecki, “Near infrared light source in bulk silicon,” USA Patent Application 14/345,102. Filed 14 May 2014.

14 M du Plessis and A.W. Bogalecki, “Near infrared light source in bulk silicon,” Europe Patent Application 12775312.7. Filed 12 September 2012.

13 M du Plessis and A.W. Bogalecki, “Micro optical device,” USA Patent Application 13/810,809. Filed 1 April 2013.

12 M du Plessis and A.W. Bogalecki, “Micro optical device,” China Patent Application 201180035285.7. Filed 18 January 2013.

11 L.W. Snyman and M. du Plessis, “Microchip based MOEMS and waveguide device,” Europe Patent Application 10702768.2. Filed 27 January 2010.

10 M. du Plessis, “Encapsulated reach-through in SOI,” Europe Patent Application EP2377171, Filed 26 November 2009.

9 M. du Plessis, “Silicon light emitting device utilizing reach-through effects,” USA Patent Application 13/161,113, Filed 15 June 2011.

8 M. du Plessis, “Silicon light emitting device utilizing reach-through effects,” China Patent Application 200980155227.0, Filed 25 July 2011.

7 M. du Plessis, “Silicon light emitting device utilizing reach-through effects,” Taiwan Patent Application 098102175, Filed 20 January 2009.

6 M. du Plessis, R.F. Greyvenstein and A.W. Bogalecki, “Optoelectronic device with light directing arrangement and method of forming the arrangement,” Europe Patent Application 08846163.7, Filed 31 October 2008.

5 M. du Plessis and L.W. Snyman, “Semiconductor light emitting device utilising punch-through effects,” Europe Patent Application 09703175.1, Filed 21 January 2009.

4 M. du Plessis and L.W. Snyman, “Semiconductor light emitting device utilising punch-through effects,” Japan Patent Application 2010/543598, Filed 30 April 2010.

3 M. du Plessis and L.W. Snyman, “Semiconductor light-emitting device comprising heterojunction,” South Korea Patent Application 10-2010-7015821, Filed 16 July 2010.

2 M. du Plessis and L.W. Snyman, “Semiconductor light-emitting device comprising heterojunction,” Canada Patent Application CA 2713070, Filed 22 July 2010.

1 M. du Plessis and L.W. Snyman, “Semiconductor light-emitting device comprising heterojunction,” Taiwan Patent Application 098103313, Filed 2 February 2009.

2.11 National patents pending

3 M du Plessis, J. Korvink and M.E. Goosen, “Integrated Si optical link for MRI system,” South Africa Application 2012/05920, Filed 6 August 2012.

2 M. du Plessis and A.W. Bogalecki, “Waveguide with integrated light source,” South Africa Patent Application 2012/06743, Filed 10 September 2012.

1 M. du Plessis and A.W. Bogalecki, “Near-IR light source in bulk Si,” South Africa Patent Application 2014/01293, Filed 20 February 2014.

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3. MEMBERSHIP OF NATIONAL AND INTERNATIONAL BODIES Registered as Professional Engineer (Pr.Eng.) with ECSA (Engineering Council of South Africa) IEEE (Institute of Electrical and Electronics Engineers) Senior Member (1985-2015) SPIE (International Society for Optical Engineering Member (2000-2015)

4. LEADERSHIP AND HONOURS Technical leader of INSiAVA contract research project at UP into silicon light emission. R15 million contract over three years (2008-2010), followed by R30 million contract over 30 months (2011-2014). Director of CEFIM (Carl and Emily Fuchs Institute for Microelectronics), University of Pretoria. (1991-2012). Acting Director of CEFIM 2015. Group leader, Electronics group, Department of Electrical, Electronic and Computer Engineering, University of Pretoria. (1995-2005). Acting Group leader 2015. Programme coordinator for Electronic Engineering, University of Pretoria. (1999-2005). Named in 2008 as one of the 100 Leading Minds of the University of Pretoria over the last 100 years, as part of the university centenary celebrations. Won the prize for the best academic publication in the Africa Research Journal in 2010 for the following paper: A.W. Bogalecki and M. du Plessis “Design and manufacture of quantum-confined Si light sources,” Africa Research Journal, Vol. 101, No. 1, pp. 11-16, March 2010. Served as a non-executive director on the board of SAMES (Pty) Ltd. from 2007 to 2009. (South African Microelectronic Systems) Appointed by the South African Minister of Education in 2004 to serve in the Reference Group evaluating the National Curriculum for Electrical Technology (Grades 10 to 12). South African Corresponding member on Commission D, Electronics and Photonics of the International Union of Radio Science (URSI) (2000-2005). Chairman of the International IEEE EDS/Photonics/CAS/SSC (Electron Devices, Photonics, Circuits and Systems and Solid State Circuits) Chapter in South Africa (2000-2012). Founded the South African closed corporation SST (Solid State Technology cc.) in 1990. SST consults to industry in the field of integrated circuit design, semiconductor technology and opto-electronic devices. Registered as a Professional Engineer (Pr.Eng.) with ECSA (Engineering Council of South Africa). I was nominated by the executive of UP for the prestigious 2014/15 NSTF-BHP Billiton Awards that recognise outstanding contributions to science, engineering, technology and innovation in South Africa. I was nominated for the T W Kambule Award for my contribution to the research and its outcomes in the field of Photonics over the last 5 to 10 years, as well as a Lifetime award for outstanding contributions to Science, Engineering and Technology (SET) in South Africa.

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5. COMMUNITY SERVICE Appointed in 2004 as an international IEEE EDS (Electron Devices Society) Distinguished Lecturer for Region 8 (Africa, Europe, Middel east and Russia). Several invited talks were given locally and overseas in the period 2004 to 2013. Received the Technical Achievement of the year Award from the South African company Kentron in 2003 for outstanding technical performance. Chairman of organizing committee for the 1st International Conference on Simulation of Devices and Technology (ICSDT) in 1995 (Kruger National Park, South Africa). Chairman of organizing committee for the 2nd International Conference on Simulation of Devices and Technology (ICSDT) in 1998 (Cape Town, South Africa). Topic chair for Electron Devices sessions at the IEEE Africon’99 conference (1999 in Cape Town, South Africa) Topic chair for Electron Devices sessions at the IEEE Africon’02 conference (2002 in George, South Africa) Topic chair for Electron Devices sessions at the IEEE Africon’04 conference (2004 in Gaberone, Botswana) Project leader of South African Department. of Science and Technology Innovation Fund Technology Mission project “Faster and smaller integrated circuit boards” (2003-2006). Member of the organizing committee for the 12th IEEE International Symposium on Electron Devices for Microwave and Optoelectronic Applications, EDMO 2004 (Kruger Park, South Africa). Technical chair of the South African Conference on Semi- and Superconductor Technology (SACSST 2009), Spier Wine Estate, Stellenbosch, South Africa, 7-9 April 2009 Technical chair of the 1st Conference on Sensors, MEMS, and Electro-optic Systems, SMEOS 2009, Skukuza, Kruger National Park, South Africa , 8-10 September 2009. Technical chair of the 2nd Conference on Sensors, MEMS, and Electro-optic Systems, SMEOS 2011, Berg en Dal, Kruger National Park, South Africa , 8-10 September 2011. Technical chair of the 3rd Conference on Sensors, MEMS, and Electro-optic Systems, SMEOS 2014, Skukuza, Kruger National Park, South Africa , 17-19 March 2014. Reviewer of papers for several international journals, e.g. IEEE Transactions on Electron Devices, IEEE Photonics Letters. Editor: Devices and Components, of the journal Transactions of the South African Institute for Electrical Engineers (2004-2015). Appointed as a member of the international IEEE VLSI Technology and Circuits Committee in 2014. The objective of the VLSI Technology and Circuits Committee is to identify new areas of interest to the Electron Devices and Solid-State Circuits communities.