Name: M.VanithaDesignation: Asst.ProfEmail: mvanitha@vit.ac.inCabin: 313A – 19 SJTContact Hours: - Friday (B1/B2 slots)

Why this subject?Why this subject?• To acquire some understanding and

appreciation of a computer systems functional components, their characteristics, their performance and their interactions.

• Need to understand computer architecture in order to structure a program so that it runs more efficiently on a real machine.

• In selecting a system to use, they should be able to understand the tradeoff among various components such as CPU clock speed vs memory size.

ITA407 COMPUTER ARCHITECTURE ITA407 COMPUTER ARCHITECTURE L T P C L T P C 3 0 0 33 0 0 3

Unit No. 1BASIC STRUCTURE OF COMPUTERS 9 HrsElements of Computers– Limitations of Computers-Evaluation of computers Design

Methodology - System design - System Representation, Design process, The Gate level – the Register level- Register - level components, programmable logic devices, Register level design –the Processor Level - Processor Level Components, Processor level design.

Unit No. 2 PROCESSOR BASICS 9 HrsCPU organization: Fundamentals; – Data Representation: Basic formats, Fixed –Point

Numbers, Floating point numbers; Data Path Design-Fixed point arithmetic-Addition and Subtraction, Multiplication, Division; – Arithmetic – Logic Units- Combinational ALU, Sequential ALU

Unit No. 3PIPELINE AND PARALLEL PROCESSING 9 HrsFloating point Arithmetic, Pipeline Processing-Pipeline design- Parallelism in uni-processor

system – parallel computer structures – vector processing requirements

Unit No. 4 MEMORY ORGANIZATIONS 9 HrsMemory technology: Memory Device Characteristics, Random Access Memory (RAM), Serial

Access Memory; memory systems: Memory Allocation – virtual memory -Caches: Main features, address mapping

Unit No. 5 I/O AND SYSTEM ORGANIZATION 9 Hrs

Basic concepts, Bus control – IO and System Control: Programmed IO, DMA and Interrupts, IO processors, Operating Systems – Multiprocessors and fault tolerant computers.

Text Books1 John P Hayes, Computer architecture and organization, III edition McGraw- Hill, 199 2 2. M.M.Mano, Computer system architecture, PHI, 1982.

References

1. John. L. Hennessy & David A. Patterson, “Computer Architecture”, Elsevier, India, 3rd Ed, 2003.

2. Andrew S.Tanenbaum, Structured computer organization, PHI, 1990.3. William Stallings, Computer organization and architecture, Addison Wrsley 5th

edition, 2001. 4. Carl Hamacher, Zvonko Vranesic and Safwat Zaky, Computer organization, McGraw-

Hill, 2002. 5. Kai Hwang, Advanced Computer architecture, McGraw-Hill1993.

Evaluation ProcedureEvaluation Procedure• Quiz – 1 (5M)• CAT – 1 (15M)• Quiz – 2 (5M)• CAT – 2 (15M)• Quiz – 3 (5M)• Assignment / Mini project – (5M)• Term End Exam – 50M

Computing the Last 100 Computing the Last 100 yearsyears

A Brief History of A Brief History of ComputersComputers

The beginning of computing The beginning of computing ––Abacus (3000BC)Abacus (3000BC)

BabbageBabbage’’s Differential Engine s Differential Engine (1823)(1823)

• ENIAC (Electronic Numerical Integrator and Computer)• Designed by Mauchly and Eckert• University of Pennsylvania• First general-purpose electronic

digital computer• Response to WW2 need to calculate

trajectory tables for weapons.• Built 1943-1946 – too late for war

effort.

• ENIAC DetailsDecimal (not binary)• 20 accumulators of 10 digits• Programmed manually by switches• 18,000 vacuum tubes• 30 tons• 15,000 square feet• 140 kW power consumption• 5,000 additions per second

Vacuum Tube

THE BABBAGE DIFFERENCE ENGINE (1832) 25,000 parts

ENIAC 1946First Electronic Computer

It is for decimal number system, Which can

perform A,S,M,D. To speed up addition operation it uses pipelining tech.

Vacuum tubes, 80 feet long, 8.5 feet high, several feet wide, total 18,000

vacuum tubes

Numeric Integrator and Numeric Integrator and CalculatorCalculator

• To reprogram the ENIAC you had to rearrange the patch cords that you can observe on the left in the prior photo, and the settings of 3000 switches that you can observe on the right

Alan Turing (1912Alan Turing (1912--1954)1954)

John Mauchly leaning on the John Mauchly leaning on the UNIVUNIVersal ersal AAutomatic utomatic CComputeromputer

Dr. VonDr. Von--NeumanNeuman with IAS with IAS machinemachine

•Stored Program Concept

•Main memory storing programs and data

•ALU operating on binary data

•Control unit interpreting instructions from memory and executing

•Input and output equipment operated by control unit

•Princeton Institute for Advanced Studies (IAS).

•Completed 1952

The IBM 7094, a typical The IBM 7094, a typical mainframe computer mainframe computer

2nd Generation: Transistor Based Computers Transistors replaced

vacuum tubes Smaller Cheaper Less heat dissipation Made from Silicon (Sand) Invented 1947 at Bell Labs William Shockley et al. Commercial Transistor

based computers: NCR & RCA produced

small transistor machines IBM 7000 DEC – 1957 (PDP-1)

First transistor computer – Manchester University 1953.

Second Generation (1958Second Generation (1958--1964)1964)

• 1958 Philco introduces TRANSAC S-2000– first transistorized commercial machine

• IBM 7070, 7074 (1960), 7072(1961)• 1959 IBM 7090, 7040 (1961), 7094

(1962)• 1959 IBM 1401, 1410 (1960), 1440

(1962)• FORTRAN, ALGOL, and COBOL are first

standardized programming languages

3rd Generation: Integrated Circuits A single, self-contained transistor is called a discrete component.

Transistor based computers – discrete components manufactured separately, packaged in their own containers, and soldered or wired together onto circuit boards.

Early 2nd generation computers contained about 10,000 transistors – but grew to hundreds of thousands!!!!

Integrated circuits revolutionized electronics.

Silicon Chip – Collection of tiny transistors

Third Generation (1964Third Generation (1964--1971)1971)

• April 1964 IBM announces the System/360– solid logic technology (integrated circuits)– family of “compatible” computers

• 1964 Control Data delivers the CDC 6600• nanoseconds• telecommunications• BASIC, Beginners All-purpose Symbolic

Instruction Code

Fourth Generation (1971Fourth Generation (1971-- ))

• Large scale integrated circuits (MSI, LSI)• Nanoseconds and picoseconds• Databases (large)• Structured languages (Pascal)• Structured techniques• Business packages

Generations of Computers Vacuum tube - 1946-1957 (One bit Size of a hand)

Transistor - 1958-1964 (One bit Size of a fingernail)

Small scale integration - 1965 onUp to 100 devices on a chip

Medium scale integration - to 1971100-3,000 devices on a chip

Large scale integration - 1971-19773,000 - 100,000 devices on a chip

Very large scale integration - 1978 to date100,000 - 100,000,000 devices on a chip

Ultra large scale integrationOver 100,000,000 devices on a chip

Thousands of bits on the size of a hand

Millions of bits on the size of a fingernail.

INTEL PROCESSORSINTEL PROCESSORSProcessor Transistor count Date of

introduction Manufacturer

Intel 4004 2,300 1971 IntelIntel 8008 2,500 1972 IntelIntel 8080 4,500 1974 IntelIntel 8088 29,000 1979 Intel

Intel 80286 134,000 1982 Intel

Intel 80386 275,000 1985 IntelIntel 80486 1,200,000 1989 IntelPentium 3,100,000 1993 IntelPentium II 7,500,000 1997 IntelPentium III 9,500,000 1999 IntelPentium 4 42,000,000 2000 IntelAtom 47,000,000 2008 IntelItanium 2 220,000,000 2003 IntelCore 2 Duo 291,000,000 2006 IntelCore 2 Quad 582,000,000 2006 IntelItanium 2 with 9MB cache 592,000,000 2004 IntelCore i7 (Quad) 731,000,000 2008 IntelDual-Core Itanium 2 1,700,000,000 2006 IntelSix-Core Xeon 7400 1,900,000,000 2008 Intel

Quad-Core Itanium Tukwila 2,000,000,000 (future) Intel

8-Core Xeon Nehalem-EX 2,300,000,000 (future) Intel

Digital Equipment Digital Equipment CorporationCorporation

(Mini(Mini--computers)computers)

PDPPDP--8, 8, Programmed Data Programmed Data ProcessorProcessor

PDPPDP--11 (1970)11 (1970)

IntelIntel• Noyce, Moore, and Andrew Grove leave

Fairchild and found Intel in 1968– focus on random access memory (RAM) chips

• Question: if you can put transistors, capacitors, etc. on a chip, why couldn’t you put a central processor on a chip?

• Ted Hoff designs the Intel 4004, the first microprocessor in 1969– based on Digital’s PDP-8

MicrocomputersMicrocomputers

Intel processorsIntel processors• CPU Year Data Memory MIPS• 4004 1971 4 1K• 8008 1972 8 16K• 8080 1974 8 64K• 8088 1980 8 1M .33• 80286 1982 16 1M 3• 80386 1985 32 4G 11• 80486 1989 32 4G 41• Pentium1993 64 4G 111

Difference between Computer Architecture & Computer Organization

Organization of VonOrganization of Von--Neumann Neumann Machine (IAS Computer)Machine (IAS Computer)

• The task of entering and altering programs for ENIAC was extremely tedious

• Stored program concept – says that the program is stored in the computer along with any relevant data

• A stored program computer consists of a processing unit and an attached memory system.

• The processing unit consists of data-path and control. The data-path contains registers to hold data and functional units, such as arithmetic logic units and shifters, to operate on data.

Structure of Von Neumann Machine

Memory of the IAS Memory of the IAS 1000 storage locations called words. Each word 40 bits. A word may contain:

A numbers stored as 40 binary digits (bits) – sign bit + 39 bit value

An instruction-pair. Each instruction: An opcode (8 bits) An address (12 bits) – designating one of the 1000 words in

memory.

Von Neumann Machine MBR: Memory Buffer Register

- contains the word to be stored in memory or just received from memory.

MAR: Memory Address Register- specifies the address in memory of the word to be stored or retrieved.

IR: Instruction Register - contains the 8-bit opcode currently being executed.

IBR: Instruction Buffer Register- temporary store for RHS instruction from word in memory.

PC: Program Counter - address of next instruction-pair to fetch from memory.

AC: Accumulator & MQ: Multiplier quotient - holds operands and results of ALU ops.

AC MQ

MBR

IBR PC

IR MAR

IAS Instruction set

IAS Instruction set (continued)

Example of an Instruction-pair.

Load M(100), Add M(101)0000000100011111010000000101000111110101

Fetch / Execute CycleFetch / Execute Cycle

AC MQ

IBR PC = 1

IR MAR = 1

MEMORY1. LOAD M(X) 500, ADD M(X) 5012. STOR M(X) 500, (Other Ins).....500. 3501. 4

PC

MBRIR

IBR

MAR11

LOAD M(X) 500, ADD M(X) 501

ACADD M(X) 501

LOAD M(X)

5003

ADD M(X)

5012

42

STOR M(X) 500, (Other Ins)

(Other Ins)STOR M(X)

500

37

MBR

Mar ← PC

add = 1

LOAD M(X) 500, ADD M(X) 501

ADD M(X) 501LOAD M(X)500

MAR =500add = 500

MBR = 3

3

AC = 3

Add M(X)501

MAR = 501add = 501

PC = 2

4

MBR = 4

AC = 7

MAR ←PC

MAR = 2add = 2

STOR M(X) 500, (Other Ins)

STOR M(X)(Other Ins)

500

MAR = 500

Instruction Cycle State Instruction Cycle State DiagramDiagram

Instruction state cycle diagram Instruction state cycle diagram (cont..)(cont..)

• Instruction address calculation (iac):– Determine the address of the next instruction to be executed. Adding

a fixed number to a next number.• Instruction fetch: (if)

– Read the instruction from its memory location into the processor.• Operand Address Calculation: (oac)

– Analyze instruction to determine type of operation to be performed and operand(s) to be used.

• Operand Address Calculation: (oac)– If the operation involves the reference to an operand in memory or

available via I/O, then determine the address of the operand.• Operand Fetch (of):

– Fetch the operand from memory or read it from I/O.• Data Operation (do):

– Perform the operation indicated in the instruction.• Operand store (os)

– Write the result into memory or out to I/O.

Example of Program Execution

Register transfer operation for Register transfer operation for addition operationaddition operation

1. LOAD M(X) 500, ADD M(X) 501• Register transfer operations: (PC = 1)

– MAR ← PC– MBR ← M[MAR]– IBR ← MBR[20:39]– IR ← MBR[0:7]– MAR ← MBR[8:19]– MBR ← M[MAR]– AC ← MBR– IR ← IBR[0:7]– MAR ← IBR[8:19]– MBR ← M[MAR]– AC ← AC + MBR

ProblemsProblems• Let A = A(1), A(2), …, A(1000) and

B= B(1), B(2), … , (1000) be two vectors (one dimensional arrays) comprising 1000 numbers each that are to be added to form an array C such that C(I) = A(I) + B(I) for I = 1, 2, …, 1000. Using the IAS instruction set, write a program for this problem. Ignore the fact that the IAS was designed to have only 1000 words of storage.

Solution:Solution:

2. On the IAS, what would the machine code instruction look like to load the contents of memory address 2?

Solution: Load M(X), Opcode – 00000001 Address – 000000000010Machine code instruction:

00000001 000000000010

3. How many trips to memory does the CPU need to make to complete this instruction during the instruction cycle?

Solution: To fetch the instruction – 1st trip, to fetch the operand from the given address in the instruction – 2nd trip. So, totally trips to memory

4. On the IAS, describe in English the process that the CPU must undertake to read a value from memory and to write a value to memory in terms of what is put into the MAR, MBR, address bus, data bus, and control bus.

Solution:• Read:

– CPU puts the address of the value it wants into MAR.– Read control signal is generated– CPU puts the address on the address bus– Memory puts the corresponding data onto data bus– This data is then transferred to MBR.

• Write:– CPU puts the address of the value it wants into MAR.– CPU places the data onto the data bus– It asserts write control signal– Places the address onto the address bus.– Memory transfers the data on the data bus into the

corresponding memory location.

Size ofSize of• AC –• MQ –• MBR –• IBR –• IR –• MAR –• PC –

40 bits40 bits

40 bits20 bits8 bits12 bits

12 bits

QuizQuiz• MBR –• MAR –• AC –• IBR –• IR –• PC –• MQ –• IAS –• What is Computer Architecture?• What is Computer Organization?• Number of words in IAS machine?• Number of bits per word in IAS machine?• Data is represented in ____________ form in

IAS machine• Explain Stored program concept.

References References • http://www.computersciencelab.co

m/ComputerHistory/HistoryPt1.htm• W. Stallings, Computer organization

and architecture, Prentice-Hall,2000