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Objectives of shunt compensation

1. Mid point voltage regulation for line segmentation

Doubles the Pmax transmitted at the expense of increased reactive

power demand on the mid point compensator (and on the endgenerators)

2. End of line voltage support to prevent voltage instability.

3. Improvement of transient stability.

4. Power oscillation damping.

UNIT-II Shunt Compensation

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Methods of controllable VAR generation

Static VAR generators vs Static VAR compensators

SVG : Is a self- sufficiently functioning device (unit) thatdraws controllable reactive current from an alternating power

source.

SVC : An SVG becomes an SVC when it is equipped withspecial system controls(external) which derive the necessary

reference for its input, from the operating requirements andprevailing variables of the power systems, to execute the desired

compensation of the transmission line.

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Typical inputs to the SVG can be : The reactive current, impedance or power reference

signal that the SVG is to provide at its output.

Two broad categories of shunt connected SVGs

1) Variable impedance type SVGs

Eg : TCR, TSR, TSC, FC+TCR, TSC+TCR and

multilevel TSC and TCR banks

2) Switching converter type SVGs

Power converters (AC to DC or DC to AC) are operated as voltage and current

sources. These converters produce reactive power essentially without reactive energy

storage components by circulating alternating current among the phases of the AC

system (Static Synchronous Generators-SSG)

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STATCOM (Static Compensator):

When an SSG is operated with an energy source, and with appropriate

controls to function as a shunt connected reactive compensator, it is known as

STATIC Synchronous Compensator (STATCOM)

Traditional methods of reactive power compensation:

1) Mechanically switched capacitor and/or inductor

2) Over or under excited synchronous m/c

3) Saturating reactors along with fixed capacitors

4) Semiconductor switch based VAR generators from 1970 onwards

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FACTS controllers for shunt compensation

a) TSC

b) TCR

c) SVC (FC+TCR)d) SVC (TSC+TCR)

e) STATCOM

f) Hybrid compensators

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a) Thyristor switched capacitor(TSC)

Switching surges

VAR control in steps

Switch closed when the Vin is equal

to the capacitor voltage

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Simple control requirement (Fully in or fully out).

Response time around 2 cycles of input voltage.

VAR generated is proportional to the system voltage.

Large size & weight

No generation of harmonics

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It consists of a fixed (usually air-core) reactor of

inductance L, and a bidirectional thyristor valve (or

switch) sw.

The current in the reactor can be controlled frommaximum (thyristor valve closed) to zero (thyristor

valve open) by the method of firing delay angle control.

That is, the closure of the thyristor valve is delayed

with respect to the peak of the applied voltage in each

half-cycle, and thus the duration of the current

conduction intervals is controlled.

b) THYRISTOR CONTROLLED REACTOR

(TCR)

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Static VAR Compensator (SVC) or Fixed capacitor VAR compensator

(TCR+FC)

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When =90o , L is fully in & hence there is no more controllability

In FC+TCR SVC, since

Smooth and step less control.

Complex control (Synchronization and presence of harmonics)

Low order harmonics are generated.

When =180o, L is out, current is zero

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t

m

t

dttsinL

Vdi

00

1

min= 90o (w.r.t +ve zero crossing of Vs) => max IL1

& max = 180o

=> iL(t)=0 IL1=0.For < t < {ie 90 < < 180}

i.e. or

Brief analysis of TCR

ktL

Vi

m

cos1

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Using Initial conditions,

At t=, i1=0.

=>

Boundary condition i1=0 at t=

=> =2- or +=2

V-I characteristics of TCR

With different firing angle

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IL1=Fundamental component of Il

..Verify

Low efficiency.

Large passive elements.

)212

2(2

SinL

Vm

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Conduction angle = -2

=90o to 180o measured from +ve zero crossing of Vin

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L

Vm

2

)212

2(2

1)(

SinL

BL

IL1 () = fundamental component (peak) of iL ()

IL1 () varies from 0 at =180 to max at =90

BL () varies from 0 (at =180 to BL max at =90)

)2

12

2( SinL

Vm

Maximum RMS of inductor current (fundamental) is

Reactive admittance

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Variation of normalised IL1() [or BL1() ] from 0 to 1p.u.

as a function of

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Operating V-I area of (a) TCR (b) TSR TSR is identical (Similar) to TCR but is operated with fixed

firing angle, usually =90o or 180o

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Harmonics with TCR:

where n=2k+1 & k=1,2,3etc

Triplen harmonics are

absent in delta balanced

connected system.

1

)()(4

)( 2n

nSinnCosnCosSin

nL

V

ILn

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1. Multi-pulse TCR arrangement

By employing 12 pulse TCR arrangement 2 identical 3- TCRs, one fed

from a Y-connected winding (Transformer secondary) and the other

connected to a -connected secondary winding (of the same transformer

).

Harmonics generated in the two TCRs get cancelled due to the 30o

phase shift between the transformer secondaries.

Methods to reduce harmonics

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2. Another method to reduce the harmonics is to employ Sequential

control of multiple TCR banks

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Sequential control of multiple TCR banks

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Case1. When v(wt)=vc0Then the current rises instantly to the steady

state value with infinite di/dt

Case2. When v(wt)vc0Then a large current flows to charge the

capacitor to bus voltage

In both cases, the SCRs fail to withstand the

stress.

Hence a small inductor is included in series.

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L : is a small reactor to limit the surge current.

Let ; then

or

where

Peak(amplitude) of capacitor voltage is

Ignoring VL(t), the switch voltage is

Vsw=V-Vc (Varies from 0 to )

tSinVV m tCosLC

CVi m

21

tCosCn

nVti m )

1()(

2

2

L

C

X

X

LCn

21

2

1

12

2

n

nVV mC

12

2

2

n

nVm

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Switching Transients with TSC

Typical cases of switching

b)Capacitor partially discharged

a)Capacitor fully discharged

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Minimum transients if TSC is

switched ON at the instants when

capacitor residual voltage and the

applied AC voltages are equal.

Transient-free switching waveforms with TSC

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Since the capacitor is normally discharged after the TSC is switched

OFF, the maximum possible delay in switching IN of the

TSC is one full cycle of the applied voltage.

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Switching instants:

Case i: Vc < Vm

then the instant for the switching is when Vc = V i.e., Vsw = 0.

Case ii: If Vc > Vm

then the instant for the switching is when Vsw = min i.e., =0(min)

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Fig : Operating V-I area

TCR OFF, TSC ON TCR ON, TSC OFF

BOTH OFF

Icmax ILmax0

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Fixed Capacitor-Thyristor Controlled reactor FC TCR type SVG)

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QL=VIL() ; Qc=VIc=Constant

QLmax = VIL(=90o)

Total (or net) reactive power Q=QL-Qc

Therefore Qmax

= VIL

(=90o) - VIc

Qmin= VIL(=180o) - VIc = -Qc

=0

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for = 90o to 180o

212

2)( SinF

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Inductor current control in TCR

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FC TCR type SVG:

Dynamic response exhibits a time lag (due to firing delay

angle control) with respect to the input response.

The transfer function is of the form,

where k = Gain constant

Td = Transport lag (due to

control)

sTd

kesG

)(

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Simplifying to a first order ,

Typically Tdmax = T/2 in a 1- case.

For a 6-pulse (3-) case,

Average Tdmax = T/6 for increasing current,

= T/3 for decreasing current.

sT

ksG

d

1)(

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i. Capacitor Losses : small & constant

ii. Inductor losses : Vary as square of current

iii. Switching losses(scr) : Vary linearly with current

Losses in FC+TCR type SVG

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Thus the total loss is small with higher capacitive VAR

output (as in case of pf correction in industry)

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Effective, variable capacitive VAR (-Qc to +QL)

TSC-TCR type SVG (Single bank)

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Multiple TSC and TCR(3-TSC 1-TCR type SVG)

Effective, variable capacitive VAR

(-3Qc to +QL)

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Operation of the functional control scheme for (TSC-TCR) SVG

1. From the preset command of reactive power requirement

(+ve capacitive current of SVG), compute the inductive

current needed.

Therefore first estimate n since Ic = constant.

(Round up to next integer)

)(LFcref

Qref InIV

VARI

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Then

Therefore control input to TCR control block is thus completed.

2. Transient-free , controlled switching IN of TSC bank(s).

Thyristors in TSC are switched ON when the voltage across them is

minimum.

3. TCR firing delay angle control.

CQrefLF nIII )(

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Fig : Functional control scheme for (TSC-TCR) SVG

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Fig : Transient- free switching strategy implementation

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Vsw

= 1 when Vc

= V

PT = 1 when V = Vm

Vpol = 1 when

sign(V) = sign(Vc)

TSC turns ON if :

ON = 1 and Vsw = 1

or

ON = 1 and PT = 1 & Vpol = 1

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Fig : Operating V-I area of TSC-TCR SVG with two TSC banks

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With each switched-in

TSC bank, the losses

increase by a fixedamount.

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Voltage control with SVC

SVC characteristics with voltage control

Slope or droop regulation

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V-I characteristics of TCR with voltage control

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V-I characteristics of FC-TCR with voltage control

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Slope or Droop Regulation for Static VAr compensators

(SVC)

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VRefLoad Line 1

Icmax ILmax

VsvcLoad Line 3

ILr

E2

Load Line 2

Icr

E1

Ic IL

BcmaxBLmax

Perfect Regulation or Flat characteristics implies

Poorly defined operating point

SVC overload limits are hit frequently for minor variation in operating voltage

Uneconomical load sharing when more devices are sharing load in parallel

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Slope or Droop Regulation

In many applications ,the static compensator is not used as a perfect

terminal voltage regulator, but rather the terminal voltage is allowed to

vary in proportion with the compensating current. There are several

reasons for this.

1. The linear operating range of a compensator with a given maximum capacitive

and inductive ratings can be extended if a regulation droop is allowed .

2. Perfect regulation (zero droop or slope) could result in poorly operating point,

and a tendency of oscillation.

3. A regulation droop or slope enables automatic load sharing between staticcompensator as well as other voltage regulating devices connected in parallel.

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1. Extended linear control range with Slope Regulation(K0)

VRefLoad Line 1

Icmax ILmax

Vsvc

Even for a range of E2 to E1, the SVC current range is reduced

with droop regulation

Ic IL

VLmaxV

cmax

VcmaxVLmax

ILmax

K=

Icmax

=

Load Line 2

Icr

E1

x

Load Line 3

ILr

E2

y

Bcmax BLmax

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2. With Regulation Slope(K0)

Overload operation can be reserved for system disturbance conditions callingfor wider voltage range (E4 to E3) at the SVC bus. Thus the current limits are

not hit unduly

3 L d Sh i Wi h D R l i

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3. Load Sharing With Droop Regulation

a) Two parallel connected SVCs at bus

b) Without droop same Vreffor both

two units operating at overload, countering

each other to maintain the same Vref (theoperation at A; is possible with SVC1 at B near

maximum and SVC2 at C on overload

c). With droopboth units are allowed to have

different Vreflevels

Both are well within their max limits, (for

operation at A, SVC1 is at B and SVC2 at C )

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