45
UNIT 2

UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

Embed Size (px)

DESCRIPTION

xixi YiYi carry c i sum s i carry-out c i

Citation preview

Page 1: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

UNIT 2

Page 2: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

ADDITION & SUBTRACTION OF SIGNED NUMBERS

Page 3: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

xi Yi carry ci sum si carry-out ci+1

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

Page 4: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 5: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

Logic for single stage

Page 6: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

Logic for single stage

Page 7: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

n-bit ripple carry adder

• A cascaded connection of n full adder blocks can be used to add n-bit numbers .since carry propagate or ripple through the adder it is called an n-bit ripple carry adder.

Page 9: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

DESIGN OF FAST ADDERS

Page 10: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

DESIGN OF FAST ADDERS

• Two approaches to reduce delay in adders– 1st approach-Fastest possible electronic

technology in implementing ripple carry logic design

– 2nd approach-Use an augmented logic gate network structure that is larger

Page 11: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

MULTIPLICATION OF POSITIVE NUMBERS

Page 12: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

• Product of n digit numbers can be accommodated in 2n digits

• Product of 4bit numbers will fit into 8bits• Refer pg-378 4th para alone for register

configuration diagram

Page 13: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

Manual multiplication

1 1 0 1 x multiplicand M 1 0 1 1 multiplier Q 1 1 0 1 1 1 0 1 0 0 0 0 1 1 0 1

1 0 0 0 1 1 1 1 Product P

Page 14: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 15: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 16: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

REGISTER CONFIGURATION

Page 17: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 18: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

SIGNED OPERAND MULTIPLICATIONBOOTH ALGORITHM

Page 19: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

BOOTH MULTIPLIER TABLE

Page 20: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 21: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 22: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

FAST MULTIPLICATION1.BIT PAIR RECODING OF

MULTIPLIER

2.CARRY SAVE ADDITION OF SUMMANDS

Page 23: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

• 1.BIT PAIR RECODING OF MULTIPLIER

2.CARRY SAVE ADDITION OF SUMMANDS

Have been used in various ways by the high performance processor to reduce the time needed to perform multiplication

Page 24: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

BIT PAIR RECODING OF MULTIPLIER

Page 25: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

• A technique called Bit pair recoding halves the maximum number of summands

• It is derived directly from booth algorithm

Page 26: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 27: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 28: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 29: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 30: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

CARRY SAVE ADDITION OF SUMMANDS

Page 31: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

• Multiplication requires the addition of several summands

• A technique called carry save addition(CSA) speeds up the addition process

• Instead of letting the carries ripples along the rows, they can be saved and introduced into the next row ,at the correct weighted position

Page 32: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

• Delay through carry save array is somewhat less than delay through ripple carry array

• A more significant reduction in delay can be achieved as follows– Consider addition of many summands,as required

in multiplication of longer operand– Group the summands in three and perform carry

save addition on each of these group

Page 33: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

• In parallel to generate a set of S and C– Next we group all of the S and C vectors into three

and perform carry save addition on them,generate further set of S and C

- We continue this process until there are only two vectors remaining

Page 34: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 35: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 36: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 37: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 38: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

INTEGER DIVISION1.Restoring Division

2.Non Restoring Division1.

Page 39: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

Restoring Division

Page 40: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 41: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 42: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 43: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS

Non Restoring Division

Page 44: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS
Page 45: UNIT 2. ADDITION & SUBTRACTION OF SIGNED NUMBERS