Unit 1 Minimization Techniques and Logic Gates. Introduction to Digital Systems Analog devices and systems process time-varying signals that can take

Unit 1Minimization Techniques and

Logic Gates

Introduction to Digital Systems• Analog devices and systems process time-varying

signals that can take on any value across a continuous range.

• Digital systems use digital circuits that process digital signals which can take on one of two values, we call:

0 and 1 (digits of the binary number system)

or LOW and HIGH or FALSE and TRUE

• Digital computers represent the most common digital systems.• Once-analog Systems that use digital systems today:

– Audio recording (CDs, DAT, mp3) – Phone system switching– Automobile engine control – Movie effects– Still and video cameras….

High

Low

Digital circuit

inputs outputs: :

Analog Signal

Digital Signal

3

Advantages of Digital Systems Over Analog Systems

1. Reproducibility of the results 2. Accuracy of results3. More reliable than analog systems due to better immunity to

noise.

4. Ease of design: No special math skills needed to visualize the behavior of small digital (logic) circuits.

5. Flexibility and functionality.

6. Programmability.

7. Speed: A digital logic element can produce an output in less than 10 nanoseconds (10-8 seconds).

8. Economy: Due to the integration of millions of digital logic elements on a single miniature chip forming low cost integrated circuit (ICs).

4

Boolean AlgebraBoolean Algebra

• Boolean Algebra named after George Boole who used it to study human logical reasoning – calculus of proposition.

• Elements : true or false ( 0, 1)

• Operations: a OR b; a AND b, NOT a

e.g. 0 OR 1 = 1 0 OR 0 = 0

1 AND 1 = 1 1 AND 0 = 0

NOT 0 = 1 NOT 1 = 0

What is an Algebra? (e.g. algebra of integers)set of elements (e.g. 0,1,2,..)set of operations (e.g. +, -, *,..)postulates/axioms (e.g. 0+x=x,..)

Boolean function

• Boolean function: Mapping from Boolean variables to a Boolean value.

• Boolean algebra: Deals with binary variables and logic operations operating on those variables.

BASIC IDENTITIES OF BOOLEAN ALGEBRA

• Postulate 1 (Definition): A Boolean algebra is a closed algebraic system containing a set K of two or more elements and the two operators · and + which refer to logical AND and logical OR

Basic Identities of Boolean Algebra(Existence of 1 and 0 element)

(1) x + 0 = x

(2) x · 0 = 0

(3) x + 1 = 1

(4) x · 1 = 1

Basic Identities of Boolean Algebra (Existence of complement)

(5) x + x = x

(6) x · x = x

(7) x + x’ = x

(8) x · x’ = 0

Basic Identities of Boolean Algebra (Commutativity):

(9) x + y = y + x

(10) xy = yx

Basic Identities of Boolean Algebra (Associativity):

(11) x + ( y + z ) = ( x + y ) + z

(12) x (yz) = (xy) z

Basic Identities of Boolean Algebra (Distributivity):

(13) x ( y + z ) = xy + xz

(14) x + yz = ( x + y )( x + z)

Basic Identities of Boolean Algebra (DeMorgan’s Theorem)

(15) ( x + y )’ = x’ y’

(16) ( xy )’ = x’ + y’

Basic Identities of Boolean Algebra (Involution)

(17) (x’)’ = x

Function Minimization using Boolean

Algebra

• Examples:

(a) a + ab = a(1+b)=a

(b) a(a + b) = a.a +ab=a+ab=a(1+b)=a.

(c) a + a'b = (a + a')(a + b)=1(a + b) =a+b

(d) a(a' + b) = a. a' +ab=0+ab=ab

Try

• F = abc + abc’ + a’c

The other type of questionShow that;

1- ab + ab' = a2- (a + b)(a + b') = a

1- ab + ab' = a(b+b') = a.1=a2- (a + b)(a + b') = a.a +a.b' +a.b+b.b'

= a + a.b' +a.b + 0 = a + a.(b' +b) + 0 = a + a.1 + 0 = a + a = a

More Examples• Show that;

(a) ab + ab'c = ab + ac(b) (a + b)(a + b' + c) = a + bc

(a) ab + ab'c = a(b + b'c) = a((b+b').(b+c))=a(b+c)=ab+ac

(b) (a + b)(a + b' + c) = (a.a + a.b' + a.c + ab +b.b' +bc)

= …

DeMorgan's Theorem

(a) (a + b)' = a'b'

(b) (ab)' = a' + b'

Generalized DeMorgan's Theorem

(a) (a + b + … z)' = a'b' … z'

(b) (a.b … z)' = a' + b' + … z‘

DeMorgan's Theorem

• F = ab + c’d’

• F’ = ??

• F = ab + c’d’ + b’d

• F’ = ??

DeMorgan's Theorem

Show that: (a + b.c)' = a'.b' + a'.c'

More DeMorgan's exampleShow that: (a(b + z(x + a')))' =a' + b' (z' + x')

(a(b + z(x + a')))' = a' + (b + z(x + a'))' = a' + b' (z(x + a'))' = a' + b' (z' + (x + a')') = a' + b' (z' + x'(a')') = a' + b' (z' + x'a)=a‘+b' z' + b'x'a=(a‘+ b'x'a) + b' z' =(a‘+ b'x‘)(a +a‘) + b' z' = a‘+ b'x‘+ b' z‘ = a' + b' (z' + x')

More Examples

(a(b + c) + a'b)'=b'(a' + c')

ab + a'c + bc = ab + a'c

(a + b)(a' + c)(b + c) = (a + b)(a' + c)

Simplification of Switching Functions

Karnaugh Maps (K-Map)

A K-Map is a graphical representation of a logic function’s truth table

Two-Variable K-Map

0 1

0

1

ab

Three-Variable K-Map

abc 00 01 11 10

0

1

0m

1m

2m

3m

6m

7m

4m

5m


abc 00 01 11 10

0

1


abc 00 01 11 10

0

1

Edges are adjacent

Four-variable K-Map

abcd 00 01 11 10

00

01

11

10

0m

1m

2m

3m

6m

7m

4m

5m

12m

13m

14m

15m

10m

11m

8m

9m

Four-variable K-Mapab

cd 00 01 11 10

00

01

11

10


cd 00 01 11 10

00

01

11

10

Edges are adjacent

Edg

es a

re a

djac

ent

Plotting Functions on the K-map

SOP Form

Canonical SOP Form

Three Variable Example

F ABC ABC ABC ABC

using shorthand notation

6 3 1 5F m m m m

, , 1,3,5,6F A B C m

Three-Variable K-Map Example

abc 00 01 11 10

0

1

, , 1,3,5,6F a b c m

Plot 1’s (minterms) of switching function

1 1 1

1


abc 00 01 11 10

0

1

, ,F a b c ab bc

Plot 1’s (minterms) of switching function

1 1 1

1 abbc

Four-variable K-Map Example

abcd 00 01 11 10

00

01

11

10

, , , 0, 2,9,12,14F a b c d m

1

1

1

1

1

Karnaugh Maps (K-Map)

Simplification of Switching Functions

using K-MAPS

Terminology/Definition• Literal

– A variable or its complement

• Logically adjacent terms– Two minterms are logically adjacent if

they differ in only one variable position– Ex: abc abcand

m6 and m2 are logically adjacent

Note: abc abc a a bc bc Or, logically adjacent terms can be combined

Terminology/Definition

• Implicant– Product term that could be used to cover minterms of

a function• Prime Implicant

– An implicant that is not part of another implicant• Essential Prime Implicant

– An implicant that covers at least one minterm that is not contained in another prime implicant

• Cover– A minterm that has been used in at least one group

Guidelines for Simplifying Functions

• Each square on a K-map of n variables has n logically adjacent squares. (i.e. differing in exactly one variable)

• When combing squares, always group in powers of 2m , where m=0,1,2,….

• In general, grouping 2m variables eliminates m variables.

Guidelines for Simplifying Functions

• Group as many squares as possible. This eliminates the most variables.

• Make as few groups as possible. Each group represents a separate product term.

• You must cover each minterm at least once. However, it may be covered more than once.

K-map Simplification Procedure

• Plot the K-map• Circle all prime implicants on the K-

map• Identify and select all essential prime

implicants for the cover.• Select a minimum subset of the

remaining prime implicants to complete the cover.

• Read the K-map

Example

• Use a K-Map to simplify the following Boolean expression

, , 1, 2,3,5,6F a b c m


abc 00 01 11 10

0

1

Step 1: Plot the K-map

1 1 1

1

, , 1, 2,3,5,6F a b c m

1


abc 00 01 11 10

0

1

Step 2: Circle ALL Prime Implicants

1 1 1

1

, , 1, 2,3,5,6F a b c m

1


abc 00 01 11 10

0

1

Step 3: Identify Essential Prime Implicants

1 1 1

1

, , 1, 2,3,5,6F a b c m

1

EPI

EPI

PI

PI


abc 00 01 11 10

0

1

Step 4: Select minimum subset of remaining Prime Implicants to complete the cover.

1 1 1

1

, , 1, 2,3,5,6F a b c m

1

EPIPI

EPI


abc 00 01 11 10

0

1

Step 5: Read the map.

1 1 1

1

, , 1, 2,3,5,6F a b c m

1

bcab

bc

Solution

, ,F a b c ab bc bc ab b c

Example


, , 2,3,6,7F a b c m


abc 00 01 11 10

0

1

Step 1: Plot the K-map

11

11

, , 2, 4,5,7F a b c m


abc 00 01 11 10

0

1

Step 2: Circle Prime Implicants

11

11

, , 2,3,6,7F a b c m

Wrong!!We reallyshould drawA circle aroundall four 1’s


abc 00 01 11 10

0

1


EPIEPI

, , 2,3,6,7F a b c m

11

11Wrong!!We reallyshould drawA circle aroundall four 1’s


abc 00 01 11 10

0

1

Step 4: Select Remaining Prime Implicants to complete the cover.

EPIEPI

11

11

, , 2,3,6,7F a b c m


abc 00 01 11 10

0

1


abab

11

11

, , 2,3,6,7F a b c m

Solution

, ,F a b c ab ab b

Since we can still simplify the functionthis means we did not use the largestpossible groupings.


abc 00 01 11 10

0

1

Step 2: Circle Prime Implicants

11

11

, , 2,3,6,7F a b c m

Right!


abc 00 01 11 10

0

1


EPI

, , 2,3,6,7F a b c m

11

11


abc 00 01 11 10

0

1


b

11

11

, , 2,3,6,7F a b c m

Solution

, ,F a b c b

Special Cases


abc 00 01 11 10

0

1 1 1 1

1

, , 1F a b c

11

1

1


abc 00 01 11 10

0

1

, , 0F a b c


abc 00 01 11 10

0

1 1

, ,F a b c a b c

1

1

1

Four Variable Examples

Example


, , , 0, 2,3,6,8,12,13,15F a b c d m


cd 00 01 11 10

00

01

11

10

, , , 0, 2,3,6,8,12,13,15F a b c d m

1

1

1

1

11

1

1


cd 00 01 11 10

00

01

11

10

0,2,3,6,8,12,13,15F m

1

1

1

1

11

1

1


cd 00 01 11 10

00

01

11

10

F abd abc acd abd acd

1

1

1

1

11

1

1

Example


, , , 0, 2,6,8,12,13,15

3,9,10

F a b c d m

d

D=Don’t care (i.e. either 1 or 0)


cd 00 01 11 10

00

01

11

10

1

1

d

1

11

1

1

, , , 0, 2,6,8,12,13,15 3,4,9F a b c d m d

d

d


cd 00 01 11 10

00

01

11

10

1

1

d

1

11

1

1

F ac ad abd

d

d

Five Variable K-Maps

, , , ,F a b c d e

Five variable K-map

A=1

A=0

Use two four variable K-maps

Use Two Four-variable K-Maps

bcde 00 01 11 10

00

01

11

10

bcde 00 01 11 10

00

01

11

10

A=0 map A=1 map

Five variable example

, , , , 5,7,13,15,21,23,29,31F a b c d e m


bcde 00 01 11 10

00

01

11

10

bcde 00 01 11 10

00

01

11

10

A=0 map A=1 map

, , , , 5,7,13,15,21,23,29,31F a b c d e m

1

1

1

1

1

1

1

1


bcde 00 01 11 10

00

01

11

10

bcde 00 01 11 10

00

01

11

10

A=0 map A=1 map

1

1

1

1

1

1

1

1

1F a ce 2F a ce

Five variable example

1 2F F F a ce a ce ce

Plotting POS Functions

K-map Simplification Procedure

• Plot the K-map for the function F• Circle all prime implicants on the K-map• Identify and select all essential prime implicants

for the cover.• Select a minimum subset of the remaining

prime implicants to complete the cover. • Read the K-map• Use DeMorgan’s theorem to convert F to F in

POS form

Example


, , 1, 2,3,5,6F a b c M


abc 00 01 11 10

0

1

Step 1: Plot the K-map of F

1 1 1

11

, , 1, 2,3,5,6F a b c M


abc 00 01 11 10

0

1

Step 2: Circle ALL Prime Implicants

1 1 1

11


abc 00 01 11 10

0

1


1 1 1

11

EPI

EPI

PI

PI


abc 00 01 11 10

0

1

Step 4: Select minimum subset of remaining Prime Implicants to complete the cover.

1 1 1

11

EPIPI

EPI


abc 00 01 11 10

0

1


1 1 1

11

bcab

bc

Solution

F ab bc bc

F ab bc bc

a b b c b c

, , 1, 2,3,5,6F a b c M

SOP and POS Forms

• SOP Given a Table of Combinations

– What is the SOP form for the following 3 input / 1 output digital device?

S A B f

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 0

1 1 1 1

• Computing the SOP (2)

– This SOP has 4 minterms:• f = S'AB' + S'AB + SA'B + SAB

S A B f minterm name

0 1 0 1 m2

0 1 1 1 m3

1 0 1 1 m5

1 1 1 1 m7

• Canonical SOP

– Boolean functions can use shorthand notation when in SOP form:

• f = S'AB' + S'AB + SA'B + SAB

f(S,A,B) = (m2,m3,m5,m7)

or

f(S,A,B) = m(2,3,5,7)

• Canonical SOP Example

– f(x1,x2,x3) = m(1,4,5,6)

– f =

minterm x1 x2 x3 f

0 0 0 0 0

1 0 0 1 1

2 0 1 0 0

3 0 1 1 0

4 1 0 0 1

5 1 0 1 1

6 1 1 0 1

7 1 1 1 0

x1'x2'x3 + x1x2'x3' + x1x2'x3 + x1x2x3'

• Product of Sums Form

– An alternate canonical “two-level” format

• “Product of sums” POS

• Two levels– OR level followed by AND level

– Again, NOT doesn’t count as a level

• Not a common as SOP, but can be useful in some situations– Which ones?

• Computing the POS

– Identify rows with “0” on output (f = 0)

– Represent the input for each 0 row as a maxterm• A logical “sum” of the input bits which guarantees that term

will be “0” (sum of literals)

A B f

0 0 0

0 1 1

1 0 0

1 1 0

• Canonical POS Example

– f(x1,x2,x3) = (M0,M2,M3,M7) = M(0,2,3,7)

– f =

maxterm x1 x2 x3 f

0 0 0 0 0

1 0 0 1 1

2 0 1 0 0

3 0 1 1 0

4 1 0 0 1

5 1 0 1 1

6 1 1 0 1

7 1 1 1 0

(x1+x2+x3)(x1+x2'+x3)(x1+x2'+x3')(x1'+x2'+x3')

NAND/NOR Circuits

• Completeness of NAND

• Any Boolean function can be implemented using just NAND gates. Why?– Need AND, OR, and NOT– NOT: 1-input NAND (or 2-input NAND with inputs tied

together)– AND: NAND followed by NOT– OR: NAND preceded by NOTs

• Likewise for NOR

• Using NAND as Universal Logic

– NOT

– AND

– OR

• SOP Using NORs & POS Using NANDs

– NANDs are natural for SOP networks• You can extend this idea to multi-level circuits as long as the

levels alternate AND/OR/AND/OR ending with OR• You can implement an SOP circuit using only NOR gates

– All gates become NORs; just add an extra “inverter” following the final NOR

– NORs are natural for POS networks• You can extend this idea to multi-level circuits as long as the

levels alternate OR/AND/OR/AND ending with AND• You can implement a POS circuit using only NAND gates

– All gates become NANDs; just add an extra inverter following the final NAND

• SOP Using NAND Networks

– SOP can be implementedwith just NAND gates

• “pushing the bubbles”• Every gate just becomes

a NAND!

x 1 x 2

x 3 x 4 x 5

x 1 x 2

x 3 x 4 x 5

x 1 x 2

x 3 x 4 x 5

• 2x1 MUX Using NANDs

– Implement f = S'A + SB with NAND gates only

– This one is complicated by the inverter on S!

• POS Using NOR Networks

– POS can be implementedwith just NOR gates

• Every gate just becomesa NOR

x 1

x 2

x 3

x 4

x 5

x 1

x 2

x 3

x 4

x 5

x 1

x 2

x 3

x 4

x 5

• Schematics of DeMorgan’s Laws

(x ∙ y)' = x' + y'

(x + y)' = x' ∙ y'

• Universal Logic Families

– Any logic function can be designed using only:

• AND, OR, NOT• NAND• NOR

– These are called “universal logic families”

– Actual components are often designed using either NAND or NOR gates only

• NAND and NOR require fewer transistors to build• Just having a single gate design is simpler than having 3!

• AND/OR Networks NAND/NAND

– Convert multi-level AND/OR net NAND/NAND

• And Again … But Be Careful

conserve the polarity of the input/output signals

Logic GatesLogic Gates

AND FunctionOutput Y is TRUE if inputs A AND B are TRUE, else it is FALSE.

Logic Symbol

Text Description

Truth Table

Boolean Expression

ANDA

BY

INPUTS OUTPUT

A B Y 0 0 0 0 1 0 1 0 0 1 1 1

AND Gate Truth Table

Y = A x B = A • B = AB

AND Symbol

OR FunctionOutput Y is TRUE if input A OR B is TRUE, else it is FALSE.

Logic Symbol

Text Description

Truth Table

Boolean Expression Y = A + B

OR Symbol

A

BYOR

INPUTS OUTPUT

A B Y 0 0 0 0 1 1 1 0 1 1 1 1

OR Gate Truth Table

NOT Function (inverter)Output Y is TRUE if input A is FALSE, else it is FALSE. Y is the inverse of A.

Logic Symbol

Text Description

Truth Table

Boolean Expression

INPUT OUTPUT

A Y 0 1 1 0

NOT Gate Truth Table

A YNOT

NOT Bar

Y = AY = A’

Alternative Notation

Y = !A

NAND FunctionOutput Y is FALSE if inputs A AND B are TRUE, else it is TRUE.

Logic Symbol

Text Description

Truth Table

Boolean Expression

A

BYNAND

A bubble is an inverterThis is an AND Gate with an inverted output

Y = A x B = AB

INPUTS OUTPUT

A B Y 0 0 1 0 1 1 1 0 1 1 1 0

NAND Gate Truth Table

NOR FunctionOutput Y is FALSE if input A OR B is TRUE, else it is TRUE.

Logic Symbol

Text Description

Truth Table

Boolean Expression Y = A + B

A

BYNOR

A bubble is an inverter.This is an OR Gate with its output inverted.

INPUTS OUTPUT

A B Y 0 0 1 0 1 0 1 0 0 1 1 0

NOR Gate Truth Table

Circuit-to-Truth Table Example

OR

A

Y

NOT

ANDB

CAND

2# of Inputs = # of Combinations

2 3 = 8

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y


OR

A

Y

NOT

ANDB

CAND

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0

0

0

0

10

0

0


0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0

OR

A

Y

NOT

ANDB

CAND

0

0

1

0

11

1

1


0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

010

OR

A

Y

NOT

ANDB

CAND

0

1

0

0

10

0

0


0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

010

0

OR

A

Y

NOT

ANDB

CAND

0

1

1

0

11

1

1


0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0101

0

OR

A

Y

NOT

ANDB

CAND

1

0

0

0

00

0

0


0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

01010

0

OR

A

Y

NOT

ANDB

CAND

1

0

1

0

00

0

0


0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

010100

0

OR

A

Y

NOT

ANDB

CAND

1

1

0

1

00

1

1


0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0101001

0

OR

A

Y

NOT

ANDB

CAND

1

1

1

1

00

1

1

Circuit-to-Boolean Equation

OR

A

Y

NOT

ANDB

CAND

A B

A C

A= A B + A C

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

A B C Y

0

0

00

0

11

}

1

1

}

A - O - I Logic

OR

A

Y

NOT

ANDB

CAND

AND Gates

INVERTER Gates

OR GatesOther Logic Arrangements:

NAND - NAND LogicNOR - NOR Logic

NAND Gate – Special Application

INPUTS OUTPUT

A B Y0 0 10 1 11 0 11 1 0

A

BYNAND

TNANDS

S T

00

1

0 1

1 0

Equivalent To An Inverter Gate

NOR Gate - Special Application

S T

00

1

0 1

1 0

Equivalent To An Inverter Gate

TS NOR

A

BYNOR

INPUTS OUTPUT

A B Y0 0 10 1 01 0 01 1 0

Documents

Unit 1 Minimization Techniques and Logic Gates. Introduction to Digital Systems Analog devices and systems process time-varying signals that can take