INTERNATIONAL ELECTRON DEVICES ANXUAL MEETING

Shipley AZ-1350, a positive resist, was found to require a very narrow range of charge density for proper exposure ( ~ 5 x 1 0 - 6 C/cmZ at 10 kV) and was also considered unsuitable for a reliable micro- circuit fabrication system.

Polymethyl methacrylate, a positive re- sist polymerized from the monomer in the laboratory, exhibits many of the properties desirable for high-resolution work. Proper exposure range is between 5 Xl0-5 and 5X10-4 C/cm2 at 10 t o 15 kV. Edge resolu- tion studies indicate a slight undercut in the developed image that can be increased or eliminated by suitable processing after ex- posure.

Metalized structures can be formed by evaporating the metal through the de- veloped resist with a demonstrated l: l height-to-width ratio in a line 3000 '4C wide. The resist is suitable for acidic or basic chemical etching with similar resolution capabilities. Transistors with stripe widths of 1 micron and 0.5 micron have been fabri- cated in the laboratory on silicon wafers using the polymethyl methacrylate resist. I t is believed that higher resolution can be achieved with this resist by using improved electron beam systems.

6 ) Color Thermometry of Electronic De- vices-G. V. L u k i a n o f , I B M , Pough- keepsie, N . Y. A novel method for obtaining dynamic

real-time high-spatial-resolution tempera- ture distribution over surfaces of electronic components is presented. The thermometric medium is a liquid crystalline coating de- posited on the devices to be measured. I t scatters incident white light into bright colors in response to the temperature of the device. Each scattered color uniquely repre- sents a temperature. The response is in milli- seconds. The process is reversible and has high spatial resolution over any size area.

This measurement method can be ap- plied to microelectronic components which have too small dimensions, which are inac- cessible, or which have too small mass or are too fragile to permit use of most of the con- ventional temperature methods. It can also be used in those cases where large areas have to be simultaneously mapped.

This measurement technique has been used to make thermal maps and to localize structural defects in electronic components. The two-dimensional nature of the measure- ment offers simultaneous localization and measurement of temperature.

SESSION 26-SOLID-STATE DEVICES VI1 : JUNCTION DEVICES (B) Chairman: J. M . Early Organizer: R. J. h'hittier 1) Design of n-p-V-n Si Microwave Transis-

tors with Wide Output Spaces-R. L. Pritchett, Bell Telephone Laboratories, Murray Hi l l , N . J . Si n-p-v-n microwave transistors have

been designed and fabricated with the ob- jective of maximizing power gain by widen- ing the collector depletion region (output

space) far beyond that which gives maxi- mum f ~ . For maximum power gain the out- put space delay angle should be roughly 1/8 of a n R F cycle and consequently the opti- mum output spacing depends on the operat- ing frequency. Increasing the output space leads to increased power gain at the expense of lower fT and higher output impedance.

Design of the epitaxial collector doping profile should avoid unswept high-resistivity regions for two reasons. First, the unswept material introduces series resistance which causes the gain versus frequency character- istic t o fall off more than 6 dB/octave at fre- quencies above fT. Secondly, higher peak currents are possible with a fully swept epi- taxial region, since high fields can be main- tained which inhibit base widening effects.

A consequence of this approach is that bias conditions are functions of the fre- quency for which the design is optimized. Devices designed for 2-GHz operator at V,,= 85 v, J,= 800 A/cm2, while 4-GHz transistors require V,,=40 v, J,= 3000 A/cm2. Devices based upon the above design theory have been fabricated with 10-,U and 4-w output spaces. The units with 10-,U out- put spacing gave 10-dB MAG at 2.5-GHz even thoughfT was only 500 MHz. Similarly,

livered over 7-dB MAG at 4 GHz. This level the 4-p structure, having fT= 1.8 GHz, de-

of performance was realized by assembling the transistors on stripline mounts which incorporated thin-film networks designed to match the high output impedances.

2) The Charge Distribution in High-speed Transistors-G. D. Hachtel, IBM Re- search Cenier, Yorktown Heights, N . Y. , and A . E. Ruehli , IBM, Essex Junction, Tit.

A self-consistent scheme of subpico- coulomb charge measurement and two- dimensional, transport analysis has been used to calculate the distribution of charge in high speed (3-7-GHz) Ge and Si transis- tors. This scheme carefully measures total stored charge and calculates the mobile charge stored in the two-dimensional base and collector space charge regions. Storage in the emitter space charge layer is obtained by subtraction of calculated charge from measured charge. The conclusions of this study are 1) the majority (as much as 80 percent) of the mobile charge is stored in the emitter; 2) 30 t o 50 percent of the remaining charge is injected through the emitter side- wall and stored in the remote base region; 3) overall transit time is dominated by low- field mobility regions-thus Johnson's113 fundamental limitations do not apply, and the transit time of state-of-the-art devices continues to reflect the lowfield mobility of the material ( 1 4 ~ ~ ~ 3 Xpsi).

An independent study of the emitter- base junction was made to explore the effects of degeneracy of the hole gas in the vicinity of the highly doped emitter. I t was found that the degenerate gas pushes a consider- able distance into the base region. I t is shown that in the region of greatest charge storage (the highly doped emitter), the dif- fusion constant is strongly augmented (as

tor structures, RCA Rev. , January 1964. 118 E. 0. J o p o n , "Physical limitations on transis-

437

much as an order of magnitude) over the value ( K T / q ) g given by the Einstein rela- tion. This augmentation is shown to strongly alter the transit time and the emitter effi- ciency predicted by Boltzmann statistics.

3) Double-Diffused Silicon and Germanium Microwave Amplifier Transistors-A. J . Anderson, D . 14'. Boone, and C. F. Dennis, Texas Instruments Incorporated, Dallas, Texas. This paper is a comparison of both

germanium and silicon n-p-n double-diffused transistors used as small-signal low-noise amplifiers in the frequency rang-e of 1 t o 6 GHz.

With the development of the necessary oxide masking and shallow diffusion tech- nologies, it has been possible to fabricate n-p-n double-diffused planar germanium transistors using the more sophisticated multi-stripe transistor geometries which have been used in the fabrication of micro- wave silicon transistors.

Due to the higher mobilities inherent in germanium, it was possible to achieve cutoff frequencies of 8 GHz in the germanium de- vices as compared to cutoff frequencies of 5.5 GHz in the silicon devices.

Base transit time is still the dominant factor limiting cutoff frequency in silicon transistors while the germanium transistor cutoff frequency is determinated largely by depletion layer transit time due to the lower limiting scattering velocity. The more nar- row depletion layers along with the slightly higher dielectric constant gave higher output capacitances and rb'C, products in the ger- manium devices which resulted in devices with maximum frequency of oscillation (fmex) approximately the same as the silicon devices.

Both germanium and silicon transistors were fabricated using comparable geometries employing 2.5-pm stripe widths. The best devices of both types were remarkably simi- lar in performance in the frequency range of 3-6 GHz. Unilateral power gains of greater than 5 dB a t 6 GHz were measured on both germanium and silicon devices.

The theoretical advantages and disad- vantages of both materials are discussed, along with the advantages and disadvan- tages which arise primarily due to technol- ogy limitations.

4) Ultra-High-speed Planar Germanium Transistors and Integrated Circuits- H. N . Yu and F. H. Dill , I B X Research Center, Yorktown Heights, N . Y . Since the introduction of the silicon

planar technology, germanium devices have gradually been replaced in the electronics field. This is mainly due to the lack of a germanium planar technology attributable to, among other reasons, the lack of a stable self-protective oxide on germanium. With the advent of insulator or oxide technologies, a germanium planar technology has been de- veloped. The technology has been proven to be parallel t o that of silicon in its potential for fabricating diodes, transistors, as well as integrated circuits. However, its utiliza- tion in fabricating ultra-high speed devices and integrated circuits is described. Because of higher mobilities of both electrons and

43 8

holes in germanium than that in silicon, higher frequency or speed performances with germanium devices than that with silicon devices have been expected and realized.

Descriptions will be given on essential technologies, such as oxide deposition, dif- fusion, alloying, as well as epitaxy, used in fabricating the planar transistors and inte- grated circuits.

The alloy diffused planar p-n-p transis- tors were fabricated on O.l-D-cm epitaxial

The transistors thus fabricated have fp p-type germanium grown on a p+ substrate.

above 5 GHz with rbCc as low as 5 ps using an emitter width of 0.2 mil. Characteristics of integrated circuits using transistors of the same horizontal geometry with junction isolation will be discussed. Overall switching delays measured in emitter-follower current switch circuits including packages in both the hybrid and the integrated circuits are in the range of 300-400 ps. Hybrid circuits with discrete transistors using devices with 0.1 mil emitter width have shown less than 300 ps in switching delays.

5 ) Double-Diffused High-speed Ge Tran- sistors-P. Gansauge, I B M Research Center, Yorktown Heights, N . Y. The recent progress on pyrolytic deposi-

tion of masking films on semiconductor surfaces allows one to adopt double diffused technologies for Ge similar to tha t used for Si. Because of the more favorable material properties, Ge offers the possibility of higher speed and frequency devices.

This paper describes the process of double-diffused n-p-n and n-p-n planar tran- sistors. The lateral dimensions of the three- stripe transistors are such that conventional photoresist processes can be applied. The emitter stripe width is 5 p, emitter and base are separated by 5 p. Impurity profiles are discussed for both types of transistors. To obtain high-speed transistors, the diffused structures are rather shallow. The emitter depth and base width are 0.2 p.

Data of the electrical measurements in- dicate high-speed performance. For n-p-n transistorsfr is on the order of 5 GHz. Cir- cuit delay measured on hybrid emitter-fol- lower current switch circuits is 500 ps. For p-n-p transistors, fr is 3 GHz, circuit delay 400 ps, which is considerably lower than Si circuits of comparable dimensions.

6) The Laminated Overlay Transistor, A New Approach to High-Power-High Frequency Struct~res1~~-H. T V . Becke, P . Del Priore, and D. Stolniiz, Radio Corpomtion of America, Somerville, N . J . This report describes the work performed

in the development of laminated transistors for radio-frequency application. The specific advantages obtainable from laminated struc- tures are outlined, and specific transistor design considerations are presented.

Novel techniques and special tools that replace conventional transistor fabrication methods are explained, as well as the evolu- tion of these techniques leading to a com-

Avionics Laboratory, Research and Technology 114 This work was supported by the Air Force

Division, Air Force Systems Command, Wright- Patterson Air Force Base, Ohio.

IEEE TRASSACTI0N.q

plete processing technology. The method of incorporating emitter-ballast resistors t o protect against secondary breakdown and the use of glassing for hermetic protection of junctions is described. A double heat-sink package of low thermal resistance has been developed specifically for use with the lami- nated transistor.

Finally, measurement results of I -V characteristics, thermal resistance, fre- quency performance, power output, and efficiency of the first experimental devices are given.

7) Device Design Considerations for an Ultra-High-Voltage (> 1600 volts) High- Frequency Switching Transistor-D. K . M y e r s and S. A . Turner, Fairchild Senai- conductor, Palo Alto, Calif. A 1600-volt switching transistor has

been developed for use in an electronic gyro suspension system. This paper describes the design criteria and processes for this n-p-n silicon device.

The major requirements for this transis- tor are to obtain a stable collector-base breakdown voltage of > 1600 volts, a collec- tor-emitter saturation voltage of <4.0 volts, and an f t specification of 40 MHz.

Two methods have been used for fabri- cating the transistor. One method employs a deep double-diffused structure, and the other uses an epitaxial-grown base layer and a diffused emitter structure. Both methods utilize an etched mesa junction with oxide passivation and have produced devices which meet the required specification.

Data support the following conclusions. The mesa structure appears to yield superior performance planar or planar with field plate structures. The mesa must be shaped by con- trolled etching and masking. The mesa must be protected for stable breakdown. The starting material should be low dislocation and noncompensated. There appears to be a practical mini- mum base depth that will yield accept- able devices. At these voltages, corona and arcing are problems and must be considered. The switching performance variations between high voltage and low voltage are drastic.

SESSION 27-ELECTRON TUBES V: GENERAL ELECTRON DEVICES Chairman: George I. Haddad Organizer: G. Caryotakis 1) Boron-Nitride High-Power Duplexing

Devices-E. E. DeCamp, Jr . , R. M. True, and E . V . Edwards, U. S . A r m y Eleclronics Comnaand, F O Y ~ Monmouth, N. J . The design of the cylindrical pre-TR is a

compromise between the amount of power that can be safely absorbed by the window and the loa~-level insertion loss. Once the low-level insertion loss and recovery time of a duplexer have been fixed, the feasibility of

OX ELEC’TROS DEVICES, J L T E 1968

the device depends on dissipating the heat generated in the plasma discharge without exceeding the critical temperature of the di- electric used to contain the gas.

The results of an experimental program to improve the power-handling capacity of duplexer devices through the use of im- proved dielectric material is described. A dielectric container made of chemical vapor deposited (CVD) boron nitride is substituted for the commonly used quartz envelope. The softening temperature of boron nitride is about twice that of quartz and the thermal conductivity is nearly three times higher.

The improvements in duplexer perfor- mance that can be achieved through the use of this material are significant. A cylindrical pre-TR that failed because of high-tempera- ture effects as a peak power of 38 MLV, 38 kU’ average, using a quartz envelope, oper- ated satisfactorily at a peak power of 70 MW, 70 kLXr average, when a boron nitride envelope was used.

The added duplexer design flexibility that is available through the use of this ma- terial has been determined and design data are tabulated.

2) Ferrite-Varactor X-Band Limiter-J. L. Carter and J . PV. AfcGowan, U. S. A r m y Electronics Command, Fort Monmouth, N . J . The conventional method of achieving

reliable receiver protection for sensitive mi- crowave receivers is to use a limiter consist- ing of a plasma stage and a varactor stage. The plasma limiter is used to reduce the in- cident power to a level that can be safely limited by the varactor device. The major power that is incident on the varactor is the spike leakage pulse that is caused by the slow response time of the plasma device. The fast response time of the varactor makes it ideal for reducing the spike energy. The varactor cannot be used alone because of its limited power-handling capacity and a catastrophic failure mechanism.

Characteristics of a limiter package in which a subsidiary resonance limiter is sub- stituted for the plasma device are described. The ferrite-varactor combination has several advantages over the plasma-varactor pack- age. Reliability is increased since no keep- alive voltage is required. Life is signifi- cantly increased. The recovery time is re- duced from microseconds to nanoseconds at a peak power of 10 kW. The resulting limiter has a low-level insertion loss less than 1.0 dB over a frequency range of 8.4 to 9.5 GHz. Spike leakage energy is less than 0.1 erg over a peak power range of 0 to 10 kb’. The re- covery time is less than 20 11s over the same peak power range. This limiter package can be combined with a ferrite circulator to pro- vide reliable solid-state X-band duplexers at peak power levels in excess of 1 MW. 3) A 40-KW X-Band Ferrite Duplexer-D.

Blattner, W . Siekanowicx, and T. Wa2sh, Radio Corporation of America, Princeton, N . J . This paper discusses the design, construc-

tion, and performance of a wide-band ferrite duplexer for airborne radar application. The duplexer, in conjunction with fixed and