UGMZ2AA Application Note 1 - Mouser Electronics · .Jan 2015 / APN1 rev1.3 Proprietary Information Confidential 4 / 1. Introduction In this document, overview of the development kit

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA

ALPS ELECTRIC CO., LTD.

Application Note1

.Jan 2015 / APN1 rev1.3

Proprietary Information Confidential

1 /

UGMZ2AA Application Note 1

Development kit manual

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


2 /

Table of contents

1. INTRODUCTION ........................................................................................................................................... 4

1.1 HARDWARE COMPONENT ............................................................................................................................. 4

1-2 PROGRAMMER TOOL COMPONENT............................................................................................................ 5

1-3 START GUIDE ............................................................................................................................................... 5

2. INSTALLATION OF TOOLS AND DRIVERS ............................................................................................... 6

2-1 SMARTSNIPPETS ........................................................................................................................................ 6

2-2 KEIL IDE ........................................................................................................................................................ 8

2-3 J-LINK DRIVER ........................................................................................................................................... 10

2-4 J-LINK DEBUG CONFIGURATION IN KEIL IDE ....................................................................................... 11

3．HARDWARE ................................................................................................................................................... 16

3-1PCB LAYOUT .................................................................................................................................................. 16

3-2 EXAMPLE OF WIRE CONNECTION IN DIRECT RAM BOOT ..................................................................... 18

3-3 EXAMPLE OF WIRE CONNECTION IN BURNING OTP MEMORY ............................................................. 19

3-4 EXAMPLE OF WIRE CONNECTION AFTER INTRODUCING FW TO OTP ................................................ 19

4. MODIFICATION OF SOURCE CODE AND BUILDING ................................................................................... 20

4-1 BD ADDRESS AND DEVICE NAME .............................................................................................................. 20

4-2 XTAL PARAMETERS ..................................................................................................................................... 21

4-3 BUILDING SOURCE CODE AND OUTPUT FW DATA ................................................................................. 22

5. FIRMWARE DOWNLOADING.......................................................................................................................... 23

5-1 DIRECT SYSTEM RAM BOOT ...................................................................................................................... 23

5-2 BOOT FROM EXTERNAL ROM (EEPROM) ................................................................................................. 26

5-3 OTP ................................................................................................................................................................. 29

(REFERENCE ) INTRODUCING SAMPLE FW .................................................................................................... 33

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


3 /

REVISON HISTORY ............................................................................................................................................. 35

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


4 /

1. Introduction

In this document, overview of the development kit and procedure of introducing FW(firmware) to

UGMZ2AA are shown.

1.1 Hardware component

The following picture presents the various hardware components for development ,

(a) UGMZ2AA daughter board

ALPS Bluetooth Smart(4.0/4.1LowEnergy) Module with ANT “UGMZ2AA” is mounted on the

board.

I/O ports, reset, and power supply and connected to Mainboard with connector . EEPROM device

(STMicro: M24M01) is mounted on dauther board.

(b) Main Board

Functions (USB-UART,USB-JTAG, poerw supply) are used for “UGMZ2AA”.

The following ports are proveided and connected to UGMZ2AA with connectorl .

-VCC

-GND

-RST

-Vpp

- SWCLK/SWDIO (JTAG debug )

- Programble IO ( P00,P01,P02,P04,P05,P06,P07,P10,P11,P12,P13)

※Above port can be confirgued to UART,I2C,SPI,GPIO,ADC by firmware.

P05 is connected to SW. P00,P01 are used for downloading firmware.

(b) (a)

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


5 /

1-2 Programmer tool component

For downloading firmware(FW) to UGMZ2AA, the following tools are repared.

These tools run on the windows PC.

-Smart Snippets

The Java application for FW downloading. This application runs on windows PC and installed from

Dialog Semiconductor support web site.

-Keil μVision

For building the source code and debugging, Keil μVision version5 IDE is used. The μVision will

be available on your PC by downloading the installer pack and introducing.

1-3 Start Guide

To start quickly , the following procedure will be done.

step1. Install the following tools and drivers. In more detail. please refer to chapter2

- SmartSnippets

- Keil IDE

- J-Link Driver

step2. Download the SDK from Dialog URL. With the SDK, after modification of

xtal parameters in source code ,build is done.Then firmware data (FW) is output

As sample firmware, we recommned “fh_proxr_sdk”.

- SDK

- Modify the xtal parameter

- Build and output FW.

step3 Download the FW to UGMZ2AA with direct SYSTEM RAM Boot, according to the reference.

- HW connection

- Direct RAM Boot

After the above steps, advertising operation will begin for several tens of seconds.

In this period, you can confirm the signal with central device such as iOS or Android or other device which

support Bluetooth 4.0.If CONNECT_REQ is issued, connection sequence will start and you can be available

of proximity service in peripheral device (UGMZ2AA).

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


6 /

2. Installation of tools and drivers

Please introduce the development Programmer tool according to the following.

2-1 SmartSnippets

1. Smart Snippets can be downloaded from Dialog Semiconductor URL.

At first, You have to register for a user account. Please create new account

in the following URL. Until the account issue, it may take one ~ several days.

http://support.dialog-semiconductor.com/

2. Please log in with your account and go to “Software”.

You can get the latest “Smart Snippets Windows Installer 32(64) ” with acceptting the license

terms of Dialog Semiconductor.

http://support.dialog-semiconductor.com/

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


7 /

3. After unzipping installer, please run SmartSnippets_install_win32(64) install application.

According to installer’s guide window, Smartsnippets can be installed.

If the following window is displayed, installation is success. Click “Done” button to close.

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


8 /

2-2 Keil IDE

For building and debugging the source code , Keil μVision IDE is used.

According to the following, please install Keil μVision IDE.

1. From the following URL, please download Keil MDK 5**.exe (ARM uVision version5).

http://www2.keil.com/mdk5/install

2. Please run MDK 5**.exe and execute installation.

3. We recommend the additional installation of Legecy Support package for Coretex–M.

Please download the package installer from the following URL.

After downloading, please run the installation

http://www2.keil.com/mdk5/legacy

http://www2.keil.com/mdk5/install

http://www2.keil.com/mdk5/legacy

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


9 /

4. If mdk ver is eariler than 5.12, please execute installation of ARM Cortex M profile package

from Pack Installer. If not so, this install operation is no need.

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


10 /

2-3 J-Link Driver

Our main Board uses SEGGER J-Link (J-LINK OB license which provide usb to uart function, usb

to JTAG function ) for introducing FW to UGMZ2A.

According to the following, please install the “J-LINK driver”.

1. Please go to the following URL

http://www.segger.com/jlink-software.html

2. Click and download the latest version pack for Windows.

3.Please install J-Link Driver with Setup_Jlink pack which you downladed.

In the installation process, please check the following.

http://www.segger.com/jlink-software.html

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


11 /

2-4 J-Link Debug configuration in Keil IDE

By using J-Link, it is possible to make use of features such as stepwise execution or checking

internal register. About how to set up in Keil, please refer to the following.

This configuration must be done after connecting main board to Section. About connection of the

hardware, please refer to section 3-2.

1. Open the project. Sample project can be intoduduled from “Dialog SDK”.

About downloading the SDK, please refer to chapter “(Reference ) Introducing Sample FW”.

2. Click ‘Options for Target’ button or press Alt+F7. The following window is shown.

Please select Keil MDK

that you use.

Please click “Options for Target’ button”

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


12 /

3. Open the “Device” tab and select the ARM Coretex M0→ARMCM0 device as follows.

If mdk ver is 5.13 or later, this operation is no need.

4. Open the “Taget” tab and check and input values as follws.

“Xtal” :16.0

IROM1: Start 0x20000000 Size 0x8000

IRAM1: Start 0x20008000 Size 0x4000

Please select

“ARMCM0”

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


13 /

5. Open the “Utilities” tab and check “Use External Tool for Flash Programming” as follws.

6. Open the “Debug” tab Open the “Debug” tab and select“J-LINK/J-TRACE Cortex” from the

drop down options. Click on ‘Settings’. A pop-up window may be shown to inform you that a

new firmware version is available. Then,click ‘Yes’ to proceed.

Start 0x20000000

Size 0x8000

IROM1 check IRAM1check

Start 0x20008000

Size 0x4000

check

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


14 /

7. If pop-up window procedure is executed, please select the ‘Cortex M0’ from the list and click

‘OK’ to proceed as follws.

8. Change the Port setting from JTAG to SW. If SW Device has been detected correctly, you can

start “Debug” session. Then configuration is complete. Please click OK button to close.

Select “J-LINK/J-TRACE Cortex”

Click “Settings”

Select “Coretex M0”

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


15 /

Select “SW”

If SW Device has been

detected correctly, you can

start “Debug” session

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


16 /

3．Hardware

In this section, hardware connection information are shown.

3-1PCB Layout

Layout of UGMZ2AA daughter Board is shown as follows.

EEPROM is equiped. UGMZ2AA are connected to EEPROM with P06,P07. .

UGMZ2AA

EEPROM

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


17 /

Layout of MainBoard is sown as follows.

Assignment of test pins and switch are shown as follows.

Test pins are implemented for monitoring Vcc and P00~P13 port.

Swtich1(Reset)

Swtich2(P05)

CN3

(Vpp ON/OFF )

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


18 /

3-2 Example of wire connection in direct RAM Boot

In direct RAM Boot mode (please refer to 5-1) or Boot from external ROM (refert to 5-2), the

following terminals should be connected to Main Board.

VCC

Reset

GND

P00 (UART Tx for firmware downloading)

P01 (UART Rx for firmware downloading)

SWCLK ※for Keil IDE “Debug” session

SWDIO ※for Keil IDE “Debug” session

Please insert the daughter board to the connector on the mainboard.

Then VCC,Reset,GND,SWCLK,SWDO pins are connected to MainBoard. With jumper pin header,

P00 and P01 pins are connected to Main Board.

To Enable above ports , please insert a USB cable connected to your PC.

Connection example is shown as follows.

P01⇔UART Tx(USB side) Vpp OFF

P00⇔UART Rx(USB side)

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


19 /

3-3 Example of wire connection in burning OTP memory

In burning OTP memory (please refer to 5-3), the following pins should be connected to Main

Board.

VCC

Reset

GND

P00 (UART Tx for firmware downloading)

P01 (UART Rx for firmware downloading)

Vpp (0~6.8V)

Please insert the daughter board to the connector on the mainboard.

Then, VCC,Reset,GND pins are connected to MainBoard. With jumper pin header, P00 and P01

pins are connected to Main Board. With CN3 connector pin, Vpp can be active.

To Enable above ports , please insert a USB cable connected to your PC.

(note)

“VPP power supply”

If Vpp is applied with external power supply, Vpp should not be supplied when Vcc turns off.

Please supply after Vcc on.

Connection example is shown as follows.

3-4 Example of wire connection after introducing FW to OTP

After introducing FW to OTP memory , UGMZ2A will work if you apply 3V to VCC pin and 0V to

GND pins. In this case, booting procedure is automatically executed.

P01⇔UART Tx(USB side)

When these pins are

connected,Vpp voltage(6.8v)

is suppled to UGMZ2A.

P00⇔UART Rx(USB side)

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


20 /

4. Modification of source code and building

Sample source code can be applied by “Dialog SDK”. About downloading the SDK, please refer to

chapter “(Reference ) Introducing Sample FW”.

In the following , modification points such as BD Address,Device Name are shown with Dialog

SDK.

4-1 BD Address and Device Name

Open the sample project with Keil μVison.

Please go to nvds.c. For Device Name modification,“NVDS_TAG_DEVICE_NAME” and

“DEVICE_NAME_TAG_LEN” are used.

For BD Address, “NVDS_TAG_BD_ADDRESS” is modified.

Go to nvds.c

Go to sturcture

“nvds_data_storage __attribute_” .

Set Device Name Length

(number of characters +1).

Device Name can be changed by the

member “NVDS_TAG_DEVICE_NAME”.

BD Address can be modified by the member

“NVDS_TAG_BD_ADDRESS”.

For example, If address E0AE5EFFFEE8 is assigned, describe

{0xE8, 0xFE, 0xFF, 0x5E, 0xAE, 0xE0} ※see above

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


21 /

4-2 Xtal parameters

16MHz Xtal parameters（”TRIM_CTRL_REG” setting and “XTAL_TRIMMING_TIME” ） should be

modified for UGMZ2AA .

Go to arch_main.c

Go to arch.h

TRIM_CTRL_REG setting value is 0xEA.

Please describe “SetWord16(TRIM_CTRL_REG, 0xEA);”

in this line (after “lld_sleep_init_func();”).

“XTAL_TRIMMING_TIME” should be defined to “242”.

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


22 /

4-3 Building source code and output FW data

To update the firmware output data (HEX file), please build the source code as the following

procedure. Output firmware data (Hex file) is stored in the “out” folder.

1.Right-click on the project name

2.Go to “Output”

3.Hexfile name can be set with

this textBox

Click “Build target” or push “F7”

button to build the source code

HEX File is created in the “out”

folder,after build is completed.

“out” folder

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


23 /

5. Firmware downloading

User program(FW) works on internal System RAM

For FW downloading to UGMZ2AA, the following three method are available.

-1 Direct Boot from PC

-2 Boot from external ROM (EEPROM)

-3 Boot from OTP

5-1 Direct System RAM Boot

In this mode, FW is booted to System RAM directly from external device such as PC.

It is possible to change or modify booted FW, and this method is mainly used to operation check

and debugging during development. When turned off VCC, FW introduced into RAM is cleared.

Procedures are shown as follows.

1.Please set up hardware connection as 3-2.

2.Start up “Smart Snippets”

3.Create new project. None required if you are creating a project already

4.Open the project. Please select “UART mode” and check “COM”.

DA14580 chip version is “DA14580-01”.

2.After setting project name,

push “Save” button.

1.Push “New” button.

Check “UART mode” Check “COM”

Check “DA14580-01”

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


24 /

5.go to “Board Setup” window and check P0_0,P0_1

6.go to “Booter” window and select FW (HEX file) from Browse.

7.Please push Download Button

1.Click “Board Setup”

icon

2.Check “P0_0,P0_1”

1.Click “Booter” icon 2.Click “Browse” button

3.After selection of HexFile,Click

this button

Click “Download” button

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


25 /

8. Please push hardware Reset button once on Main Board if the following message is shown in

Log window.

9.If the following message is shown in Log window, direct RAM Boot has be completed.

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


26 /

5-2 Boot from external ROM (EEPROM)

In this mode, FW is booted to system RAM from external EEPROM which mounted on UGMZ2 .

It can be to change booted FW by rewriting to external EEPROM.

If you write to external ROM accoding to the following procedure, UGMZ2AA is automatically

booted from external memory after power-up

Procedures are shown as follows. About procedure 2,3,4,5,6, please refer to 5-1.

1. At first, replacing procedure of “flash_programmer.bin” is required in SmartSnippets resources

folder. Please copy “flash_programmer.bin” which include in the attached folder to

SmartSnippets resoure folder and replece .

“attached folder”

“C:¥Users¥(uer name)¥SmartSnippets¥resources”

(note) Above bin file in sample project folder is one that has been modified for the EEPROM

that is mounted on UGMZ2AA dautherboard. If you want to keep the original bin file , please

change the name of the original file. Or you may create by downloading and building the

DA14580 SDK from Dialog Semiconductor URL.

Copy toSmartSnippets

¥resources folder

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


27 /

2.Please set up hardware connection as 3-2.

3. Start up “Smart Snippets”

4. Create new project

5. Open the project

6. go to “Board Setup” window and check P0_0,P0_1

7. go to “EEPROM Programmer” window and select FW (HEX file) from Brwose

8. Please push “Connect” button and “Burn”button.

1.Click “EEPROM Programmer” icon

2.Click “Browse” button


this button

1.Click “Connectr” button 2.Click “Burn” button

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


28 /

If the following message is shown in Log window, please push the Hardware Reset button on Main

Board.

When the following window is displayed in progress, please Click “Yes”

9. If writing has be completed, the introduced data is shown as the follows.

Click “Yes” button

“Memory burning completed successfully.”

Wrtten data is displayed

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


29 /

5-3 OTP

In this method, FW is written to internal OTP memory area . If you write once to OTP, FW is

automatically booted to System RAM after power-up. After writing to the OTP, you cannot change

the FW. Therefore, at the time the specification of FW become Fix, must be written.

Procedures are shown as follows. About procedure 2,3,4,5, please refer to 5-1.

1. Please set up hardware connection as 3-3.

At this point ,please set Vpp terminal voltage to be 0V for more secure sequence.

2. Start up “Smart Snippets”

3. Create new project

4. Open the project

5. go to “Board Setup” window and check P0_0,P0_1

6. go to “OTP image” window and select FW(HEX file) from Browse

7. Please push “Connect” button. If the following message is shown in Log window, please push

the Hardware Reset button on Main Board.

1.Click this icon


this button

3.Click “Browse” button 2.Go to

“OTP image”

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


30 /

8. Please push “Read” button and confirm OTP memory data. If reading is success, access to

OTP is available. At default condition (no OTP image burned), all data is “0”.

9.Please apply 6.8V to Vpp terminal from external voltage(please refer to 3-1,3-3).

10. Please push “Burn” button. Downloading process to OTP will start.

If burning has be completed, the introduced data is shown as the follows.

11. go to “OTP Header” and push “Read from memory” button

Click “Read” button

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


31 /

12. Please update with the following items in OTP Header.

・Application flag1: Yes ・Application flag2: Yes ・Calibration Flag: bit[4]=1

・Xtal 16MHz Trim Values : 320 ・DMA Length : 1CF0

2.Click “Read from memory” button

1.Go to

“OTP Header”

Set Application flag1and2 to ”Yes”

Set Calibration Flag bit[4] to ” 1”

Set Xtal 16MHz Trim Values to ” 320”

Set DMA Length to ” 1CF0”

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


32 /

13. Please push “Burn” button.

Confirmation window, such as the following will be displayed. Please answer “Yes” to all.

14.Please make Vpp terminal to be 0V .

(note) If Vpp is set to 6.8V in VCC off condition, then module might be destroyed.

Please turn off Vcc voltage after Vpp off.

1.Click “Burn” button

2.Click “Yes” button

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


33 /

(Reference ) Introducing Sample FW

In this section, procedures are shown for introducing sample FW with direct System RAM Boot .

As the sample source code and FW, Dialog Semiconductor proximity-reporter_fh project is taken

up. It is developed by Dialog Semiconductor and provided from Dialog Semiconductor support

web site.

By introducing this FW , UGMZ2AA get to be peripheral role and Proximity profile are

implemented.

1. Please log in Dialog Semiconductor customer support with your account and go to “Software”.

Please download “SDK3.0.4 ”.

2. Unzipping the SDK folder

3. Open the project “fh_proxr_sdk” with Keil μVision.

This project is located at SDK_3.0.4.0¥dk_apps¥keil_projects¥proximity¥reporter_fh

.

4. Please modify 16MHz parameter (refer to 4-2).This modification must be executed for

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


34 /

UGMZ2AA.

Please change the BD Address and Device Name, if necessary. (refer to 4-1)

5. Please build and output the Hex file.(refer to 4-3)

6. With direct System RAM Boot (refer to 5-1), carry downloading the FW to UGMZ2AA.

7. If downloading has be finished, advertising operation will begin for several tens of seconds.

In this period, you can confirm the signal with central device such as iOS or Android or other

device which support Bluetooth 4.0.

If CONNECT_REQ is issued, connection sequence will start and you can be available of

internal service.

In the following , capture image is displayed when connected with iOS app “LightBlue”.

SYM

B

DATE OR

NO.

APPD.

CHKD.

DSGD.

CHKD :

APRVD :

DSND :

TITLE

UGMZ2AA


Application Note1

.Jan 2015 / APN1 rev1.3


35 /

Revison HIstory

Revision Date Description Author

1.0 30.Sep.2014 Initial release Y. Tamiya

1.1 06.Jan.2015 - 2.1 change smartsnippets ver3.1 → latest

ver

- Main Board and dauther board images are

changed

- Imformation of J-Link driver installing and

debug setting are add.

Y. Tamiya

1.2 16.Jan.2015 Following modifications are done.

-Added description: Installation of some pack

is no need with Keil 5.12 ,5.13.

- In Boot from external ROM (EEPROM) ,

haredware connection reference changes

from 3-3 to 3-2 .

- Other minor changes are done

S.Matsushita

1.3 26.Jan.2015 Following modifications are done.

- Start Guide is added.

-Added downloading procedure of Coretex M

Legacy support package.

- Other minor changes are done

S.Matsushita

Documents

UGMZ2AA Application Note 1 - Mouser Electronics · .Jan 2015 / APN1 rev1.3 Proprietary Information Confidential 4 / 1. Introduction In this document, overview of the development kit