UDS Company Introduction

2017Q2

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“Leverage UMC technology, bringing yourproducts to market faster with quality andmass production in UMC”

Mission

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• Founded: 2014, Employees: 120 employees

• UMC group company, established at Jinan high-tech development zone, Shandong

• Provide APR, DFT and MPW service & IP solution

• Leverage UMC manufacturing technology and design experts to support customer

UDS - 联暻半导体（山东）有限公司联结万国之芯，暻合一家之品

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Value Proposition to Customer

• Professional team from design, implementation to manufacturing

• To integrate IP, design methodology & process

• Project success hit-rate & mass production base

(vs. service man-day base)

• Flexible business model to grow customer business in different stage

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UMC 深耕中国市场

因应国内市场需求, 整合资金、人才、技术完善IC 设计制造供应链

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Professional design service team• Robust implementation flow and technology know-how• Project base commitment vs. man-day base • Fully demonstrated capability with 100+ advanced node

projects first cut workKey successful cases on different applications

Projects Node Application Status

Taiwan

55SP Set-top box Production

40LP Smart TV Production

55SP TCON Production

China28HLP Tablet AP Production

28HLP Smartphone AP Production

28HLP Communication Production

USA 0.15um Game console Production

Japan 0.13um SATA bridge Production

Core Technology (1/3)

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IP implementation & optimization • CPU core hardening

− UDS can support design implementation & optimization− Successfully demonstrated world class ARM CA-7, CA-9 and CA-53

performance− Achieved 1.6GHz CA-7 @ 28HLP, 1.8GHz CA-9 @ 28HLP and 2GHz CA-53@

28HPC performance

− Under development: CA-53 @ 14FF

• DDR PHY− Special skew requirement − Sign-off methodology− SSO, Signal integrity

• GPU & DSP− Well developed methodology− Provide most optimized PPA

Core Technology (2/3)

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Low power methodology to manage power

Bas

icAd

vanc

ed

Power reductiontechnique

Leakage decrease

Dynamicdecrease

Timingpenalty

Areapenalty

FlowStatus

Gate count reduction Yes Yes No -5% to-10% Proven

Multi-Vt optimization Yes No No <2% Proven

Clock gating No Yes No -5%~-8% Proven

Multi-power domain design Yes Yes No 0% Proven

Multi-supply voltage (MSV) Yes Yes No <5% Proven

Multi-Bit Flip-Flops Yes Yes Yes -5~-8%Proven

Power shut-off (PSO)Power gating Yes No Yes <10% Proven

Core Technology (3/3)

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Flexible Cooperation Models

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Flexible Cooperation Models-IP Solution

eNVM Interface IPsAnalog IPs

POP

Special I/O

Memory Compilers

StandardCells

GP I/O

Free Foundry Program- SC / MC / GPIO

We Support Flexible Business ModelsCustomization IPs

- IP Partner Support

I/O• eSilicon• Faraday• Krivi• UMC

Analog IPs• Cadence• Synopsys • TCI

Fundamental IPs• ARM• Dolphin• Faraday• Synopsys• UMC

eNVM• Cypress• eMemory• ISSI • Kilopass• Sidense• SST• Synopsys• UMC• YMC

Interface IP• Cadence • Synopsys• Faraday • Phisontech

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• Scan synthesis− Scan compression

− Test point insertion

− On-chip clock

• ATPG− In cell aware (28nm HKMG)

− Transition fault

− Bridge fault

− Diagnosis for yield enhancement

Flexible Cooperation Models-DFT Service

Verigy 93000

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• MCU platform license (HW, SW, process-node)

• BIST of eFlash/SRAM

• Customized IPs

• MISC flexible FE/BE Service is provided (Simulation, Synthesis, LEC, Low Power, APR, Verification, Design Consultation, …)

Services of MCU Platform

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Successful Story (1/8)CPU performance optimization

28HPCu CPU• ARM CA53 Quad-core, 12T, LVt/RVt, SSG, 1.4GHz, w/o OD

• CA7, 9T, RVt , SSG, 1.3GHz, OD

14FF CPU test chip• ARM CA53 Quad core with 1M L2 cache• Library : 9T• Corner: SSF, 0.72V, -40C• Metal option: 1P11M, routing 8M

• Area: 2250um x 2020um

• Performance: 1.66GHz

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Application：Mobile

• UMC 28HLP 1P7M

• Gate count：>36M

• SRAM count：>1000

• CPU clock speed：1GHz

• Key IP: DDRIII, LVDS, HDMI, USB3.0 and MIPI

• APR Scheme：Hierarchical design, power shut-off (PSO), DVFS, clock gating

• Status : Production

Successful Story (2/8)Lower power, Hierarchical design

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Application：Communication

• UMC 28HLP 1P8M

• Gate count：>52M

• SRAM count：>500

• CPU clock speed：0.9GHz

• Key IP: DDRIII, USB2.0

• APR Scheme：Hierarchical design, power shut-off (PSO), clock gating

• Status：Production

Successful Story (3/8)Customer with limited resource

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Block Cell type Freq.(MHz)

Instancecount

Block A 7T 250 0.96M

Block B 7T 250 1.13M

Block C 7T 250 1.28M

Block D 9.5T 620 0.13M

Block E 9.5T 300 1.11M

Block F 7T 250 0.61M

Application: DTV• UMC 28HLP

• Trial netlist in : D Day

• Final netlist in: D + 60 days

• UDS Post-CTS data deliver: D + 70 days

• UDS Finish block implementation : D + 90 days

• Tape out: D + 120 days

Successful Story (4/8) Block support with limited schedule

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Application：TCON

• UMC 55SP 1P7M• Gate count：>10M• SRAM count：>300• Clock speed: >400MHz by 7T• Key IP: DDRIII, V-by-one TX_PHY, RX_PHY• APR Scheme： Congestion reduction flow, area reduction

• Implementation period : 8.5 weeks• Area reduction : 8% compared with original version• Status：Production

Successful Story (5/8) Schedule and area reduction

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Width improved 10%

Application：HDTV TCON

• UMC 40LP, 1P7M• Block Gate count：> 8M• SRAM count：~ 300

• Implementation period: 20 days finish routing and fix major timing violations

• Placement cell density: From 60.39% improved to 65.1 %

Successful Story (6/8) Area reduction to cost competitive

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Application：TFT LCD Driver for Mobile

• UMC 55eHV 1P5M• Gate count：>1.8M• Clock Freq. : 200MHz• APR Scheme： Congestion reduction flow, Dynamic IR drop optimization

• Function Dynamic IR drop improvement from 13% to 7.88%• Status：Production

Successful Story (7/8) TFT LCD driver project

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• Application：Security MCU

• UMC 55LP eFlash 9T 1P6M• Gate count：1.4M• SRAM inst.：26• Clock speed：192MHz• Key IP: eFlash, USB2.0, LDO, PLL• APR Scheme：Flatten Design, Multi Power Domain, Clock Gating,

MOSCAP

Successful Story (8/8) eFlash project

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• UDS is a UMC group company− Provide design service to support customers− Pioneering tape out of advanced technologies− Leverage UMC IP partnership to provide customer with

complete support

• Fully demonstrated capability with 100+ advanced node projects first cut work

• Positioned as best service partner to grow business together

Summary

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Thank You!