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S® Training Manual
Circuit Description and Troubleshooting
Course: TVP-10
ProjectionTelevisionRA-3 & RA-4A ChassisModels: KP-43T70 KP-53N74 KP-48V80
KP-46C70 KP-52S70 KP-53V80KP-48S70 KP-61S70 KP-61V80KP-48S72 KP-53XBR300KP-61XBR300
Sony Service CompanyA Division of Sony Electronics Inc ©1999
All Rights ReservedPrinted in U.S.A.
S is a trademark of Sony Electronics
Circuit Descriptionand Troubleshooting:Models: KP-43T70 KP-53N74 KP-48V80
KP-46C70 KP-52S70 KP-53V80KP-48S70 KP-61S70 KP-61V80KP-48S72 KP-53XBR300KP-61XBR300
Prepared by: National Training Department Sony Service Company A Division of Sony Electronics Inc.
Course presented by _____________________________________
Date___________________________________________________
Student Name ___________________________________________
SSEL Service Company
A Division of Sony Electronics Inc.1 Sony Drive
Park Ridge, New Jersey 07656
TVP100100 Printed in U.S.A.
Introduction 1
RA-3 Features 1
RA-3 and RA-2 Similarities 2
RA-3 and RA-4 Similarities 2
RA-3 New Circuitry 2
Power Supply Protection 3
Latch 3
+135 Volt Over Voltage 3
+135 Volt Over Current Protection 3
Standby Unregulated OVP 3
Standby +5 Volt OCP 3
V Model Video Path Block 5
Switching 5
Main Processing 5
P&P Processing 5
OSD 5
YCJ 5
KP-53V80 Video Switching 7
KP-53V80 Video 4 and Video 5 Inputs 7
Composite Video and Y Switching 7
Color Switching 7
Comb Filter (V Models) 9
Table of Contents
8-Bit A/D Converter 9
Picture and Picture (V Models) 11
Main Y Signals 11
Main C Signal 11
Main Decoder and YUV Switch 11
Picture and Picture Controller 11
Video Processing 13
YUV Controller 13
YCJ 13
On Screen Displays 15
Micro OSD 15
V Chip/CC OSD 15
PJ OSD 15
CRT Drive (CG) 17
Tube Bias 17
Ik Return 17
S Model Video Path Block 19
Switching 19
Main Processing 19
PIP Processing 19
OSD 19
YCJ 19
Switching and Comb Filter (S Models) 21
Video Inputs 21
Switching and Comb Filter 21
Picture in Picture (S Model) 23Sub Y Signal 23
Sub C Signal 23
Sub Decoder, PIP Processor and YUV Switch 23
RA-4 vs. RA-4A 25
RA-4A Features 25
“1080I Capable” 26
RA-4 and RA-4A Circuit Differences 26
Video Path Block 27
Inputs 27
Main Video 27
Sub-Video 27
Video Processor 27
DTV Video Processing Block 29
Component Input Selected 29
RGB Inputs Selected 29
DTV Video Processing 31
Circuit Description 31
VD Mute 33
RGB Mute 33
Appendix 1
Self-Diagnostics i
Standby Power Supply iii
Converter Operation iii
Regulation iii
Over Current Protection (OCP) v
Over Voltage Protection (OVP) v
Secondary Output v
Checking Q621 v
Switching Power Supply vii
Primary Rectifier vii
Oscillator vii
Regulation vii
Soft Start ix
Limit ix
Troubleshooting xi
Horizontal Deflection xv
Horizontal Scanning xv
High Voltage Development xvii
Vertical Deflection xxi
Vertical Drive xxi
Protection xxi
Convergence Block xxiii
Convergence xxiii
Auto Focus (Auto Registration) xxiii
Sensor Amp xxv
Auto Focus xxv
Circuit Description xxix
BD Input xxxi
Digital Convergence xxxi
BD Output xxxiii
IC1701 Regi Correction xxxiii
Convergence Out xxxv
Regi Mute xxxv
Convergence Amp xxxv
Appendix 2 - Service Bulletins
1
Introduction
OverviewThe purpose of this manual is to discuss the circuitry in the 1999-2000Sony projection television chassis. These chassis are the RA-3 and RA-4A. Both of these chassis share circuitry with the RA-2 and/or RA-4 chas-sis. There are previous training manuals that cover circuits in these mod-els. The TVP-07 manual covers the RA-2 chassis and the TVP-08 manualcovered the RA-4 chassis. We will include excerpts from these trainingmanuals in the Appendix at the rear of this manual. Please take note thatsome of the component designations may be different between the olderand newer chassis.
RA-3 FeaturesThe following models use the RA-3 chassis:
KP-43T70 KP-53N74 KP-48V80
KP-46C70 KP-53S70 KP-53V80
KP-48S70 KP-61S70 KP-61V80
KP-48S72
Important Note: The book will make reference to two distinct types ofRA-3 chassis, S and V. Since the T, C and N models are similar to the Smodels, we will be referring to all of these models when the term S mod-els is used unless otherwise noted. This is because the C and N modelshave marketing differences and are only sold by certain dealers. The Tmodel is distinctive because it uses the tabletop design instead of thestandard slim line design.
All RA-3 chassis models contain the following features:
Flash Focus System Steady Sound Auto Volume
Advanced Picture Stabilizer Shading Compensation
2 Tuner PIP Velocity Modulation Scanning
Free Layout PIP Dynamic Focus Circuitry
Flash Focus – One button system that aligns the horizontal and verticalcentering of the red, green and blue tubes. This system differs from pre-vious Sony one touch systems in that it does not align the skew of thecolors only the centering.
Advanced Picture Stabilizer - Maintains constant picture quality by re-sponding more quickly during scene changes, especially sudden dark-to-bright transitions, thereby reducing zooming effect, minimizing picture dis-tortion and correcting blooming (poor focus).
Free Layout PIP – Allows the PIP picture to be moved anywhere on thescreen instead of to just the designated corners.
Beside screen size, the table below shows the differences between the N,S, T and V models:
C,N and S T V
Comb Filter 3 Line 3 Line 3D
HighContrastScreen
No Yes Yes
Audio PowerOutput
15Wx2 15Wx2 20Wx2
SurroundSound
Matrix Matrix Tru-Surround
PIP Regular Regular Twin View
CenterSpeakerInput
No No Yes
ComponentVideo Inputs
1 1 2
3 Line Digital Comb Filter – To improve color performance, uses digitalmemory to evaluate three adjacent horizontal scanning lines at a time.
3D Digital Comb Filter – Uses digital memory to compare each horizon-tal line with the line above and below it and also with the correspondinglines in adjacent frames.
2
Matrix Surround Sound – Adds ambience to stereo programs for hometheater like sound.
Tru-Surround Virtual Dolby Surround – Generates lifelike sound fromthe rear speakers using only the stereo pair built into the cabinet. Thissystem uses Dolby Pro Logic to provide a very convincing effect.
Twin View – Sony’s picture and picture feature, which allows two picturesto be displayed side by side. This Twin View system is functionally thesame as the XBR system, but does not display the two pictures in 480Presolution.
RA-3 and RA-2 SimilaritiesThe following are similarities between the RA-2 and RA-3 chassis. TheAppendix at the rear of the book contains excerpts from TVP-07 that de-scribe the operations of these circuits. Keep in mind that componentdesignation and location will be different.
Basic board layout is the same except the Z boards have been re-moved. The yokes have connectors that connect to the CG board.Switching Power SupplyVertical Deflection Circuit is the same, but is now located on the Gboard instead of the A board.The Horizontal, High Voltage and Pin AmplifierSystem Control is similar, but there are some additional lines to dealwith new features such as component video inputs and digital regis-tration. Reset, key scan and EEPROM reading and writing remainthe same.
RA-3 and RA-4 SimilaritiesThe following are similarities between the RA-2 and RA-4 chassis. TheAppendix at the rear of the book contains excerpts from TVP-08 that de-scribe the operations of these circuits. Keep in mind that componentdesignation and location will be different.
The digital registration and auto focus circuits located on the BD boardin the RA-4 chassis are used. They are mounted to the A board in theRA-3 chassis.The RA-3 chassis uses the same digital registration system used inthe RA-4 chassis. Digital registration allows the servicer to adjust theset using course and fine modes. The fine mode uses a point system
that allows 81 different points to be adjusted for each color. The sys-tem differs slightly from the RA-4 chassis because of the addition of acontrol for green vertical skew.The Flash Focus system has been added to the RA-3 chassis. Thissystem is similar to the Auto Focus system found in the RA-4 chassisexcept the RA-3 system only performs auto centering while the RA-4system performed auto centering and skew. The difference lies in theuse of the sensors. The RA-4 system used eight sensors and the RA-3 system only uses four. This is why the auto skew adjustment is notpossible.Convergence AmplifierSelf-Diagnostics similar to the RA-4 chassis is used. The difference isthat the failure signal from each circuit is input to the System ControlIC since the RA-3 chassis does not have an OSD Processor.
RA3 New CircuitryThe following are new circuits that will be covered in this book:
Power supply ProtectionVideo Signal Path – The different video paths for S and V models willbe discussed. The switching, comb filter and PIP circuits are differentbetween S and V models. The OSD and video processing (YCJ) arethe same between various models.CRT drive will be described using the CG board. A discrete amplifieris used instead of the video amplifier IC used in previous models.The Standby Supply is similar to the one in the AA2W direct viewchassis. There is an excerpt from CTV-26 describing the circuit op-eration of this circuit.
3
Power Supply Protection
OverviewThe RA-3 chassis employs over voltage and over current protection forthe +135 volt line. The standby +5 volt line is protected against overvoltage and over current. There is also an 11V LVP/18V OVP protectioncircuit
LatchShut down occurs whenever a condition in one of the protect circuits causesthe Q655 to turn ON. When Q655 turns ON, Q654 also turns ON. Thisdrops the drive voltage to Relay Drive Q652/B, turning it OFF. WhenQ652 turns OFF, the ground return path for the power relay opens andthe unit shuts OFF.
+135 Volt Over VoltageThe +135 volt line is input to the protection circuit through D672 and thento a voltage divider consisting of R661 and R660. The voltage developedacross R660 is applied to IC651/5 Non-inverting input. IC651/6 Invertinginput has 2.5 volts applied to it from the voltage divider consisting of R663and R662. This voltage is divided down by the Standby +5 volt line. If thevoltage at IC651/5 rises above the 2.5-volt reference, then the output atIC651/7 will go HIGH. This High output is then applied to the latch circuitand to the Self-Diagnostic section on the A board. When this occurs, theTimer LED will flash three times.
+135 Volt Over Current ProtectionThe over current protection circuit works by monitoring the voltage dividernetwork that consists of R659, R657 and R654. R654 is connected be-tween the negative side of the +135 volt bridge rectifier and ground. Anyrise in current in the +135 volt supply will cause the voltage across R654to become more negative. This changes the voltage that is input to IC651/2 Inverting input. IC651/3 Non-inverting input is connected to ground. Ifthe voltage at IC651/2 becomes negative, a HIGH will be output at IC651/1. This HIGH output is applied to the latch circuit and also to IC002 Sys-tem Control on the A board for the Self Diagnostic feature. If this occurs,the Timer LED will flash twice.
Standby Unregulated OVPCurrent from T602/9 is rectified by D667 to produce a positive supply atD667/K. This supply voltage is applied to IC655/I and D675/K. D675 is a10-volt zener diode. When the voltage present at the input of IC655reaches around 11.2 volts, D675 will begin to conduct. When this occurs,Q655 will turn ON which activates the latch.
Standby +5 Volt OCPCurrent from T602/9 is rectified by D651 to produce a negative voltage atD651/A. This voltage is connected to the Standby +5 volt line through avoltage divider that includes R686, D664, R688, Q658/B-E and R689. Asmore current is drawn by the circuits on the Standby +5 volt line, thevoltage at D651 becomes more negative. When this voltage is low enough,Q658 will turn ON and activate the latch. D676 is used to enable the softstart circuit during power up or when there is a sudden rise in Standby 5volts.
11V Low Voltage Protection and 18V Over Voltage ProtectionQ657, D669 and associated components make up the 11V LVP and 18VOVP. Normally, D669, a 13V zener, is biased below its zener point and isOFF. A severe drop or loss of the 11V line will cause the zener to breakover and conduct, causing Q657 to turn ON and activating the protectionlatch circuit. In addition, any rise in the 18V line that causes D669 toconduct will also turn ON Q657 and, in turn, the latch circuit.
R685
D669MTZJ13
R684
C678
Q657D688MTZJ-24A
R682R683
+11V
FROMQ652/C
+18V
TOQ655/BLATCH
11V LVP/18V OVP
G BOARD
RELAYDRIVE
4
1/13/00
5
6
2
3
7
1
8
4
8
9
8
74
R665
R664
R663R659
R661
D672
C662
C663
R691
D674
D675MTZJ10B
D663
D661
Q654
R675
Q655
Q658
R690
D680
D676MTZJ-3-9BC680
R686C679
R687
C676
D667
D651
R688D664MTZJ-2-7A
IC655BAO5T
5V REG.
I
G
O
R689
R662
R657
R654
R667
G BOARD
PARTOF T602STB
STANDBY5V
TOQ652/BRELAYDRIVE
OVP
OCP
RELAY
FROM11VLVP/18VOVP
TO RY601 POWER RELAY
+135V
FROMD652/AAND D653/A
STANDBY 5V
RY DRIVEFROMQ652/C
IC651OVP/OCPuPC393C
-
+
-
+
+135V BRIDGENEG.
POWER SUPPLY PROTECTION 11TVP10 1214
PROTECTIONLATCH
CN605
TO CN681A BOARD
R681
R660
TO Q656/B LIMITER
5
V Model Video Path Block
OverviewThe video path in the V model RA-3 chassis is different from that of theRA-2 chassis because of the addition of two component video inputs.
SwitchingThere are three types of inputs in the back of the set. They are compos-ite, S video and component video. The composite signal is input to theswitching circuit and switched to the comb filter. After Y and C separationthe Comb C signal is sent back to the switching circuit. Since a compositesignal was input, this Comb C signal will be switched out and becomeMain C. The Y signal out of the comb filter is input to a switch and, whenselected, becomes Main Y.
If an S video input is used, the Y signal will follow the same path as thecomposite video but will go around the comb filter. It would be selected atthe Y switch for output instead of the Y from the comb filter. The C signalwould be switched directly from the S video input to the Main C path.
If a component input is chosen, the Y input would follow the same path asthe S video Y signal. A separate circuit that outputs these signals directlyto the YUV Switch switches the U and V signals.
The switching circuit also delivers any of the inputs to the Sub Video path.This means that SY, SC and SYUV signals are delivered to the sub videopath.
Main ProcessingTwo separate sources are used for the main video path. They are Main Yand C (if composite/S video) and component video. Main Y or C is ap-plied directly to the YCJ. These inputs will be used if a composite/S videosource is selected. If a component video input is chosen then the MainYUV signals are chosen by the YUV controller and input the YCJ. Keep inmind that this line will also carry the P&P picture.
P&P ProcessingThe P&P processing circuit uses inputs from both the main picture pathand the sub picture path because of the Twin View functions.
The main video path can be from two sources. They are Main Y and C (ifcomposite/S video is used) and component video. If composite/S videoinput is selected for main picture input to P&P, the Main Decoder firstdecodes it to YUV. These signals will be selected by the YUV Switch andinput to the P&P Controller. If component video input is chosen, the Ysignal is applied to the YUV switch along with the UV signals from the UVSwitch. These signals will then be selected by the YUV Switch and inputto the P&P Controller.
The Sub video path also comes from two sources. The sub video pathcontains a decoding and switching network similar to the one found in themain picture path. This decoding and switching network will switch theYUV from the selected source to the P&P Controller.
The P&P Controller outputs compressed YUV signals for its functions. Italso outputs a YUV Switch signal (not shown) that will determine the win-dow size and position. These signals are sent to the YUV Controller,which will select either the P&P signal or the component input signal foroutput to the YCJ.
OSDOn-Screen Displays are generated by three different sources in the RA-3chassis. They are System Control, V Chip/CC and PJ OSD and theyshare a common input to the YCJ. These circuits have a mute controlsystem that keeps them from interfering with each other.
YCJThe YCJ takes the inputs from the Main Y and C paths, the component orP&P from YUV Controller and the OSD RGB inputs. It processes thesesignals and converts them all to RGB drive signals that are output to thethree tubes.
6
1/18/00
CV
C
Y
COMPONENTY
UV4 UV5
Y/CV
C
MY MY
SY
SC
SUVSY
YUV
YUV
Y
UV COMPONENT YUV OR PIP YUV
YUV
MAINYUV
C
YTOTUBES
R
G
B
OSDRGB
Y
V MODELS VIDEO BLOCK 18TVP10
SUB YUV
U BOARD
3DCOMBFILTER
YSWINPUTS
UVSWITCH
YUVSW
P & P
YUVCONTROLLER
SWITCHING
SUBDECODER
MAINDECODER
YCJ
PJED
VCHIP
SYSCON
YSW
MAIN C
UV
Y
YUV
7
KP-53V80 Video Switching
OverviewIn this section we will look at the input-switching path for the KP-53V80.This includes switching of composite, S video and component video in-puts.
KP-53V80 Video 4 and Video 5 InputsThe Video 4 and Video 5 inputs accept component video only. The Yinputs from Video 4 and 5 are routed to IC1702 A/V Switch. The U and Vinputs are sent to IC1703 and IC1704. These ICs switch the U and V toeither the Main or Sub UV paths. You should note here that the Pb inputis called U in the rest of circuitry and that the Pr input is called V.
Composite Video and Y SwitchingComposite video can be input to IC1702 A/V Switch from either THE tuneror video 1,2 or 3 inputs. The selected composite video input is output atIC1702/53. This signal then passes through Q1727 Buffer to J1706 MonitorOut and back into IC1702 at pin 49. When one of the composite videoinputs is chosen, it will be switched to IC1702/56. The composite videosignal is then sent to Q1724 buffer and finally to CN1701/18 which con-nects to CN401 on the A board. When one of the S video or componentvideo inputs is selected, the Y signal from the selected input is switchedto IC1702/56. In this case, a Y signal will be output from Q1724 Buffer toCN1701/18.
Color SwitchingComposite video signals are processed by the Comb Filter on the A board.The Comb Filter separates the Y and C components of the compositevideo signal. The C output from the comb filter is coupled through CN1703/5 to IC1702/51. When a composite input is selected, the Comb C signalwill be switched to IC1702/58. The output from IC1702/58 is passedthrough Q1723 Buffer to CN1701 and the A board. When an S videoinput is selected, the selected signal is output at IC1702/58. The C signalpasses through Q1723 Buffer to CN1701/16.
If Video 4 or Video 5 is selected the Pb and Pr inputs are routed to IC1703and IC1704. The Y component input is switched using IC1702 A/V Switch.The Pb and Pr inputs go to four switches contained in IC1703 and IC1704.The logic level at CN2001/20 SUV SW and CN1701 MUV SW controlsthese switches. These two lines control which signal is sent to the mainor sub UV circuits.
U BOARD
IC1702A/V SWITCH
CXA 1845
15
14
16
21
22
PB
PR
L
R
Y
PB
PR
L
R
Y
J1703
J1704
TO IC1703 + IC1704YUV SWITCH
Y4
L4
R4
Y5
L5
R5
KP53V80 VIDEO 4 AND 5 INPUTS
VIDEO 4IN
VIDEO 5IN
AUDIO
AUDIO
20
8
1/18/00
1
25
7
60
29
11
53
27
9
15
21
56
49
BUFFER
51
58
3
5
115
1412
86
97
163
12
63
17
32
47
45
Q1725,1728BUFFER 18
TV V IN
Y1Y2
Y3Y4Y5
S VIDEO
CN1701
CN1703CN2001
CN1701
V1
V2V3V6SUB TUN
COMPONENTINPUTS
C1C2
C3
PBPR
PB
PR
VIDEO 4
VIDEO 5
Q1724BUFFER
Q1723BUFFER
32
31
SDA
SCL
17
20
1
5
3
18
16
10
9
5
VOUT1
MAIN COMP V/Y
MAIN C
COMB C
SUB Y
SUB C
SUB U
SUB V
MAIN U
SUB V
MUV SW
IC1702A/V
SWITCHCXA1845
IC1704YUV SWITCHNJM 2283M
IC1703YUV SWITCHNJM 2533M
Q1726,1729BUFFER
Q1731,1734BUFFER
Q1732,1735BUFFER
KP53V80 VIDEO SWITCHING 3TVP10 1204
U BOARD
S VIDEO
MONITOROUTJ1706
TO CN401A BOARD
TO CN201A BOARD
TO CN004A BOARD
TO CN401A BOARD
MAIN V
9
Comb Filter (V Models)
OverviewThe digital 3D Comb Filter is used to separate the Y and C signals con-tained in the composite video signal. IC203 D/A Converter, IC204 3DComb Filter and IC202 4MB EDO Memory are used to accomplish this.
IC203 8-Bit A/D ConverterBefore the composite signal is input to IC204 3D Comb Filter, IC203 ADCdigitizes it. The composite video signal is input at IC203/4 from the Ybuffer circuit. In addition to the video signal input, IC203 ADC needs aclock and clamp pulse input. The clock input is a 4fsc (14.28 MHz) sinewave signal, which is sent from IC204/75 ALTF to IC203/24 CLK. Theclamp pulse is sent from IC204/61 to IC203/6 PCL. This signal is at the Hrate. The digital output from IC203 ADC is output from pins 13 – 17 and20 – 22 to IC204 3D Comb Filter.
IC204 3D Comb FilterThe data from IC203 ADC is input to IC204/67-74 DYC02 – DYC09. Thisdata is synchronized to IC204/76 CSI, the composite sync input, and alsoby IC204/50 FSCI. The input at IC204/76 is the composite sync inputfrom the main Y buffer and controls the timing generator inside of IC2043D Comb Filter. IC204/50 FSCI receives a 3.58 MHz signal, which origi-nates at IC205/57. IC205 is the YCJ. This signal controls the systemclock internal to IC204 3D Comb Filter.
Once the digitized video data is received by IC204 3D Comb Filter, it iswritten into IC204 internal EDO memory controller. The EDO control readsand writes data into and out of IC202 Frame Memory and also controlsthe addressing, write enable and refreshing of the frame memory. Data isread in and out between IC204/13-28 and IC202/2-5, 7-10, 39-36 and 34-31. Addressing is done between IC204/9-2 and 99 and IC202/16-19 and26-22. The write enable signal is sent from IC204/11 MWE to IC202/13WE. The memory controller inside IC204 writes data to the locationsaddressed while WE is LOW. IC204/12 MOE is the output enable lineand allows IC204 3D Comb filter to read data from it by IC202 3D FrameMemory. This line is connected to IC202/27 OE.
IC202 Frame Memory is four Meg of EDO memory. Since IC202 FrameMemory is EDO type memory, it needs to be refreshed constantly. This isdone using the RAS (Row Address Strobe) and CAS (Column AddressStrobe) lines. IC204/10 MCAS outputs a CAS signal to IC202/28 and 29UCAS and LCAS. IC204/98 MRAS is output to IC202/14 RAS. Theselines are always active and keep the memory constantly refreshed.
The comb filter uses the memory controller for three different purposes.The first is to feed signals that are delayed by 1H and 2H into the line (2D)comb filter. The second is to feed signals that are delayed by 1H and 526H into the frame (3D) comb filter. The third section is the motion detectorblock that looks at all of the signals and determines if there is motion.This circuit is connected to a mixer that outputs either the output from theline comb filter if there is motion, or the output from the frame comb filterif no motion is detected.
After the filtering is complete, the separate Y and C components are inputto noise reduction circuits. Noise is subtracted out of the signals and thenthey are ready to be output. Analog Y is output from IC204/84 AYO to thefilter network consisting of FL202, Q203 and Q207. The Y signal is thenpassed through buffers Q211 and Q214. This signal is then sent to IC1410Y Switch. IC1410 Y S witch is used to select either the Y signal from the3D comb filter or the Y signal that is input from an S video or componentvideo input. IC002/30 Killer controls this switching. IC002 (not shown) isthe System Control IC. The main Y signal is sent to IC1402/34 MainDecoder Y In for PIP processing, to IC1404 YUV Switch for componentPIP processing and to IC1407 YUV Controller for main picture process-ing.
The C signal is output from IC204/83 ACO to the filter network FL201,Q202 and Q208. It is then sent through buffers Q209 and Q213. Thissignal is sent to the switching circuit on the U board. It is switched back toCN401/16 Main C. The Main C signal is then sent to IC1402/32 (notshown) Main Decoder C In through buffer Q1403 to be used for PIP. TheMain C signal is also sent to IC206/5 (not shown) YCJ C In for the mainpicture.
10
1/18/00
MAIN V/Y
MAIN C
18
1413
27
28
29
2 31
5 34
7 36
10 39
6
24
4
11
12
10
98
16
Q201,204INVERTER
76
60
59
61
75
Q228BUFFER
Q226,227PEEKING
Q1403BUFFER
50 83
5
Q211,214BUFFER
22
20
17
13
67
74
28
13
16
19
22
26
9
2
99
TO IC1402/32 MAIN DECODER/C IN
TO IC206/64YCJ/C IN
IC1410Y
SWITCH
FROM UBOARDCN1701
CN401
MAIN C
MAIN Y
IC2043D
COMBFILTER
uPC64O81
MRAS
X1
AYO
MAO
MA8
WEOE
LCAS
UCASSDA
SCL
SDA
SCL
RAS
I01
I016
VIN
DB1
DB8
CLKPCL
ALTESTO
CSI
IC203A/D
CONVERTERuPC659
DYC02
DYC09
MIO0
MIO15
AO
A8
IC202 4MB EDOMSM514265C
TOIC1402/34CVBS/Y IN
FL202,Q203,207
B.P.F.
FSCOUTFROMIC206/57YCJ
KILLERFROMIC002/30
CN201
FSC1 ACO
COMB FILTER (V MODELS) 4TVP10 1200
84
3
1
72
Q210BUFFER
Q206,212BUFFER
30
FL203,Q215,216
B.P.F
FL201,Q202,208B.P.F
Q209,213BUFFER
COMB CTO CN1703U BOARD
A BOARD
11
Picture and Picture (V Models)
OverviewThe V model RA-3 chassis has features for PIP and P & P. The P & Pfeature is also unknown as Twin View. Since this unit has the P & Pfeature, the signals from both the main picture path and the sub picturepath are input to the P & P controller. The output from the P & P controllercan be used for Twin View or normal PIP.
Main Y SignalsThe Main Y signal from IC1410/7 is split to four places. They are:
IC1407/19 YUV Controller TV IN for main picture.Q1406 Sync separator to IC1402 Main Decoder for decoder sync.IC1402/34 Main Decoder Y In for P & P.IC1404 YUV Switch for when a component input is selected as themain picture
Main C SignalThe Main C signal is input to IC1402/32. This signal will be used alongwith the Y signal to create component video signals.
Main Decoder and YUV SwitchIC1402 Main Decoder decodes the Y and C signals. The decoded sig-nals YUV are output from IC1402/18, 19 and 20 respectively.
These signals are then input to IC1404/2, 12 and 5. IC1402 has anotherset of YUV signals input at pins 1, 13 and 3. These signals are the MainY signal. The U and V signals come from CN401/1 and 3. This connectoris connected to the U board and couples the MUV and SUV signals fromthe Video 4 and Video 5 component inputs. IC1404/9, 10 and 11 areconnected to IC1409/4 DVD SW. IC1409 is a D/A Converter that outputseither a High or a Low depending on which composite/S video input orcomponent input is used for the main picture. The selected YUV signalsare output at IC1404/15, 14 and 4. These signals are input back intoIC1402 Main Decoder at pins 11, 12 and 13. These signals are passedthrough an auto pedestal adjusting circuit and output at IC1402/8, 7 and6. These signals are then sent to IC1405 P & P Controller.
Picture and Picture ControllerThe main picture YUV is input to IC1405/10, 6 and 8. The Sub picturesignals goes through a similar decoder and YUV Switch and are input toIC1405/71, 75 and 73.
IC1405 is a picture-and-picture controller. It contains ADCs, reductioncircuitry, memory control, display control and DACs. It is capable of show-ing two pictures of equal size side by side or free position PIP.
The built-in memory controller of IC1405 P & P Controller is used to oper-ate IC1401 V RAM. This 2 Meg of V RAM is used to produce the child orTwin View pictures. IC1405/40 SC is used to clock the data into the RAM.This signal looks similar to the DFB signal, which changes according tothe window size selected. IC1405/31 DT is the data transfer output to theV RAM. IC1405/47 is the write enable line. IC1405/48 and 49 are theCAS and RAS lines used to refresh the memory.
IC1405/86, 90 and 88 are the respective YUV outputs for PIP & P and P.These signals look like component video, but are reduced in time. Thismeans that they do not use the full 1/60th of a second that would be usedby a normal signal. The time that the signal appears is relative to the sizeof the PIP window. IC1405/93 DFB is the signal that will be used to deter-mine the size and position of the PIP window. One of the waveformsbelow shows what the DFB signal looks like when P & P is selected. Theother shows the DFB signal when a 1/9 PIP window is selected.
12
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8
11
31
34
3
6
36
39
25
22
19
15
32
39
23
30
50
58
10
6
17
86
90
88
93
2
7
13
14
7340
31
47
49
48
Q1409, 1410, 1412BUFFER
71
75
64
61
60
8
7
14
26
29
11
12
13
1
34
38
39
32
18
19
20
15
14
4
2
12
5
1
13
3
6
37
36
Q1422YUV SW.
9
10
11
Q1406SYNCSEP
Q1402BUFFER
MVSYNC6 8
SUB YUV AND SUB SYNCFROM IC1403
MAIN U FROM CN401/3
MAIN V FROM CN401/1
MBLK FROM IC002/46
DVDSW FROM IC1409/4
YFROMIC1410/7Y SW.
CFROMQ1403BUFFER
SDA
SCL
SDA
SCL
V SYNC
HSYNC
CIN
Y OUT
U OUT
V OUT
X1401 503kHz
CVBS/YIN
X14023.58MHz
MY
MUMV
DY
DU
DV
DFB
DAO0
DAO7
DA17
DA10
AD0
AD8
SDASDA
SCLSCL
SCDT
WE
RASCAS
SCDT
WE
RASCAS
YIN
UIN
VINDYIN
YOUT
UOUTVOUT
DUIN
DVIN
INH
DVDSW
IC1404YUV SWBU4053
IC14012MVRAM
IC1405P&P
CONTROLLERSAB 9076 H
SY
SU
SV
SVSYNC
P-YTO IC1407/1
B-YTO IC1407/3
R-YTO IC1407/2
TO IC1407/19 YUV CONTROLLER/TV IN
IC1402 MAINDECODERCXA2019A
PICTURE AND PICTURE (V MODELS)5TVP10 1201
YUV SW.TO IC1407/6YUV CONTROLLERAND IC206/5 YCJ
RY
RURV
XNTSC
APC
VTIM
RY IN
RU IN
RV IN
CERA
A BOARD
W101
W108
S101
S108
A0
A8
27
13
Video Processing
OverviewThe following section covers the video processing section of the RA-3chassis. This drawing on the following page is a simplified schematicfrom the KP-53V80. It is nearly identical to the schematic for the S mod-els.
This circuit creates main picture RGB signals from either the Y and Csignals from a composite, S video or tuner input, or YUV inputs from themain component video path. It also combines the PIP with the main pic-ture if PIP is selected.
YUV ControllerIC1407 YUV Controller has three functions. They are:
Switch the appropriate external YUV input to the YCJ.Switch the Main Y input to the TV out line for processing by the YCJ.Adjust the sub color and sub hue of the U and V signals.
There are two sets of YUV inputs to IC1407 YUV Controller. They arefrom IC1405 PIP Controller and from the component video (DVD) inputs.The PIP inputs at IC1407/1, 3 and 2 are selected when the signal fromIC1409/1 Full DVD is HIGH, allowing the signal from IC1405/93 DFB tocontrol the switching at IC1407/6 YUV SW. When the output from IC1409/1 Full DVD is LOW, it disables the signal from IC1405/93 DFB. Thisplaces a low on IC1407/6 and the inputs at pins 21, 22 and 23 are se-lected. The selected signal is output from IC1407/8, 9 and 10.
The Main Y input is from either a composite/S video input or a componentinput. This signal is input to IC1407/23 DVD Y and IC1407/19 TV In. Ifthe main Y is from a composite/S video input, then the TV Out signal willbe used for the main picture and for sync at the YCJ. If the main Y signalinput to IC1407 YUV Controller is from the component input, it will beused by the YCJ for sync only. The Y Out at IC1407/8 would be used forthe picture.
The inputs at IC1407/16 Color and IC1407/17 Hue are DC voltages thatcontrol the level of Sub Color and Sub Hue for the PIP picture. Thesevoltage levels were preset at the factory and should not need adjustment.However, if necessary they can be changed by adjusting UVSC (Color)and UVSH (Hue) in the service mode.
YCJHere we will be discussing the following three functions of IC206 YCJ:
Process the Main Y and C input and output them as RGB.Process the YUV inputs from IC1407 YUV Controller and output RGBsignals for either a full picture from a component video input or a childpicture from a PIP input.Output an FSC signal to be used as a reference by the comb filter.
The main Y and C signals are input to IC206 YCJ at pins 63 and 64respectively. The C signal is demodulated to its color difference signalsB-Y (U) and R-Y (V). These YUV signals are referred to as “internal”.
These internal YUV signals developed from the Y and C inputs then go toa switch controlled from the input at IC206/5 YUV SW. This line switchesthe internal YUV or the external YUV from the YUV Controller onto thenext stage of processing. If the external YUV inputs at IC206/7, 8 and 10originated from a component video input, IC206/5 would be two volts anda Full DVD picture will be displayed. If the external input were from thePIP, there would be a waveform present at IC206/5. This would insertthese inputs into the main picture to be output from IC206/20, 24 and 26as RGB. Q220, Q219 and Q218 buffer these signals. After buffering,these signals are output to the CG board via CN204. The R and B out-puts will be routed to their C board from the CG board.
IC206 YCJ outputs a 3.58 MHz signal at pin 57. It is created using X202.This signal is used as a clock by the 3D Comb Filter in V models.
14
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7
8
64
23
19
13
18
6
8
9
Q1424TV BUFFER
P-YDY FROM IC1405/86
57
Q1403 SYNCBUFFER
P+P/DFB FROMIC1405/ 93
Q1414, 1416LEVEL SHIFT
63
55
12
5
4
3
10 10
20
24
26
27
9
7
5
1
6
7
TO CGBOARDCN731
CN003CHECKCONNECTOR
FSC1TO IC204/50COMB FILTER
Q220BUFFER
Q219BUFFER
Q218BUFFER
TOV CHIP
BGP
SDA
SCL
SDA
SCL
PB-Y
PR-Y
DVD B-Y
MAIN CFROM IC1702/58
DU FROM IC1405/90
DV FROM IC1405/88
MAIN U FROMCN401/3
MAIN V FROMCN401/1
MAIN Y FROMQ1402
MAIN Y SW.FROM IC1409/7
FULL DVDFROM IC1409/1
COLOR FROM IC1409/5
HUE FROM IC1409/6
DVD R-Y
DVD Y
TV IN
DL YSW
YSW
COLOR
HUE
YOUT
RYOUT
BYOUT
TVOUT
CLAMP
EY IN
ERY IN
EBY IN
C IN
Y IN
CN204
ROUT
GOUT
BOUT
IKIN
IC206YCJ
CXA2147IC1407YUV CONT.
CXA2039
16
17
FSCOUT
Q1418BUFFER 1
Q1420BUFFER
3
Q1419BUFFER
2
22
21
Q1422YUVSW
A BOARD
59
X202
5
YUVSW
15
On Screen Displays
OverviewOn Screen Displays are generated by three different sources in the RA-3 chassis. They are called Micro, V Chip/CC and PJ OSD. The MicroOSD produces the source (channel) display and Program Palette (cus-tomer menu). The V Chip/CC OSD displays V chip rating informationand can blank the picture if the rating for a program violates the settingsin the Parental Control Menu. CC information is displayed when CC Onis selected using the remote control and the received signal contains CCinformation. The PJ OSD is used during the flash focus routine andwhen PJE adjustments are selected in the Service Mode. These threeOSDs cannot be input to the YCJ at the same time. Therefore there is amute system in place to blank each OSD at the appropriate times.
Micro OSDThe Micro OSD is created by IC002 System Control. It contains infor-mation such as channel number; video input source and the programpalette menu. IC002 System Control creates RGB for these differenton-screen displays. Q002, Q008 and Q009 buffer the RGB signals.After buffering, the RGB signals are input to IC206/14, 15 and 16. TheYS and YM lines are used to place the OSD in the RGB outputs andmute the V Chip/CC OSD.
The YS line is used to select the size and position of the OSD and theYM line is used to determine the level of shading. Here shading refers tothe amount the video level is reduced beneath the OSD. This is evidentin the Program Palette Menu when the video can be seen in the back-ground while the menu is superimposed over it. The YS signal is inputfrom IC002/36 to IC206/13. The YM signal is output from IC002/37 toIC206/12. The main OSD can be muted using Q011, Q012 and Q013.These mute transistors are controlled by IC002/35 Micro I. Main OSDwill be muted when the PJ OSD is in operation and also while IC1601Main V Chip/CC is being displayed.
V Chip/CC OSDIC1601 Main V Chip/CC creates this OSD. It outputs RGB that shows therating of the program selected. It will also blank the screen and show alock if the selected program is above the rating selected in the ParentalControl Menu. If the CC option is turned ON using the remote control,then the CC text will be displayed at the bottom of the screen.
The RGB signals are output at IC1601/18, 2 and 3. They pass throughbuffers Q010, Q014 and Q015 and are then input to IC206/14, 15 and 16.Q018 through Q023 are mute transistors that are controlled by the YSand YM lines from IC002 System Control IC.
PJ OSDThe PJ OSD is used to produce the RGB output during the flash focusroutine. It also is the OSD used during the PJE Service Mode. Thedifference between the main OSD and PJ OSD in service mode is that themain OSD is green and the PJ OSD is white.
The PJ OSD is output from two sources in the PJED circuit (not shown).RGB, YM and YS are directly input to IC206 YCJ. There are separatemute lines for each of the RGB sources in the PJED (not shown). See theappendix for more information on how the PJ OSD is created.
16
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Q002BUFFER
Q016BUFFER
Q017BUFFER
Q1061BUFFER
Q1601BUFFER
1317
7
18
2
3
12
16
15
14
IC1601MAIN V
CHIP/CC28622912
SSC
Q011Q013
Q012
Q021 Q023
Q022
Q020 Q018
Q019
RE-RRE-GRE-B
RE-YMRE-YS
YFROMQ1402MAIN YBUFFER VIDEO
R
G
B
BOX
1514SDASCL
PJ OSDFROM ABOARDPJED
BLOCK
RIN
GIN
BIN
YM
YS
IC206YCJ
CXA2147
Q008BUFFER
Q009BUFFER
Q010BUFFER
Q014BUFFER
Q015BUFFER
OSD (ALL MODELS) 7TVP10 1201
MICRO R FROM IC002/32
MICRO G FROM IC002/33
MICRO B FROM IC002/34
MICRO I FROM IC002/35
OSD YS FROM IC002/36
DISP YM FROMIC002/37
ROUT 20
24
26
GOUT
BOUT
TOCN731CBBOARDVIACN204
A BOARD
SCL
SDA
17
CRT Drive (CG)
OverviewThe section discusses the CRT drive using the CG board. The CG boardis similar to the CR and CB boards that drive the red and blue tubes.These boards use a discrete transistor circuit to drive the tube cathode.In addition to drive, each C board contains a circuit that monitors cathodecurrent and converts it to a voltage. This voltage will be used in a loopbetween the YCJ and the CRT. We will also discuss the other inputs thatare used to bias the tube.
CRT DriveThe output from the YCJ (not shown) is input to CN731/7 on the CGboard. When this signal is input to Q731/B, the transistor begins to con-duct. As current flows through Q731/C-E junction, current also begins toflow through Q722/B-E. Q722 is a common base amplifier and it passesthe signal through its C-E junction. This signal is then sent to Q733/B.Q733 is a current amplifier that drives the cathode of the tube. WhenQ733 conducts, a voltage divider is formed between R739 and R736, andR741, Q733 and R743. As Q733 conducts harder, there is less voltagepresent at the cathode of the tube. When the voltage level of the signalfrom Q733/E goes lower, the tube is driven harder, making the picturebrighter. D732, D733, D734 and C735 are present to prevent damage ifthe tube should arc.
Tube BiasIn addition to high voltage, the CRTs need other biasing to properly dis-play a picture. First they need a heater voltage, which is developed by theFBT (not shown) on the G board. It is input to the G board at CN503/6and 7. From there it is split to the CR and CB boards. The heater isneeded to heat the cathode so that it can emit electrons. If it is missing,the cathode will not emit electrons and consequently there would be nopicture.
The G1 input on the tube is a control grid that is used for shading. Eachof the tubes has a signal applied to G1 that makes the picture darker
during certain portions of the picture. If this shading input is missing, youmay see an imbalance in color on either the right or left-hand sides of thescreen.
G2 is also a control grid used to limit the acceleration of electrons as theytravel through the neck of the tube. These changes in the acceleration ofthe beam change the picture brightness. Each color has a G2 control thatis preset at the factory.
There is an input for the focus grid on each tube. This input is from theelectrical focus control VR on the focus assembly. It should be set usinga dot pattern for optimum focus.
IK ReturnAll Sony projection TVs employ an AKB (Auto Cathode Balance) circuit toautomate the white balance (black balance) by forming a loop betweenthe YCJ and the CRT. This loop compensates for losses in cathode cur-rent due to aging.
The YCJ (not shown) outputs three reference pulses, each 1H long, thatare delayed by 1H from each other for each field. The sequence for thesepulses is Red, Green and Blue. These pulses cannot be seen on thescreen since they occur in the over-scan region. When these pulsesdrive the tubes, current is monitored and converted to a voltage. Thisvoltage is input to a window comparator whose output is used to adjustthe drive level for each color.
R743 is used to monitor the tube current on the CG board. As Q733draws more current, there will be a rise in the voltage drop across R743.There are similar resistors to R743 on the CR and CB boards. All threepulses are combined on the CG board. All three boards contain a block-ing diode similar to D735. These pulses are input to Q734 Buffer andthen to CN731/1 which is connected to the A board. The IK return signalis then input to the YCJ (not shown). If a problem should occur anywherein the CRT drive or tube biasing circuits that causes one of the color’s IKreturn pulse to be incorrect, the picture will be blanked. This is indicatedby the Self-Diagnostics as the Standby LED flashing five times.
18
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7
1
3
1
D736
4
1110
9
8
7
65
1
1
7
6
97
6
6
7
F
G1G2
G1kH
H G1 G1
FROMFOCUSBLOCK
C732
R732 G2
SG732
SG731
Q733
R741
R742
L731
R736R739
+200V
D732
C735
CN731
FROMA BD.CN204
R736
C734
R737R746
Q734
R747
D735
R743
CN732 IkR
IkB
9V
CN737
TO FOCUSBLOCK
C737 R744
CN736
CN735
CN734
TO G BOARDCN503
CG BOARD
9
CRT DRIVE (CG) 10TVP10 1213
1
R733Q731R735
R753
CLK
C733
D731
Q722
D733 D734
CN733
G
IK
TO CRBOARD CN702
TO CB BOARDCN762
19
S Model Video Path Block
OverviewThe video path in the S model RA-3 chassis is different from that of theRA-2 chassis because of the addition of a component video input.
SwitchingThere are three types of inputs located at the rear of the set. They arecomposite, S video and component video. The composite signal is inputto the switching circuit and switched to the comb filter. After Y and Cseparation, the Comb Y and C signals are sent back to the switchingcircuit. Since a composite signal was input, this Comb Y and C will beswitched out and become Main Y and C.
If an S video input is used, the Y and C signal will be switched directly tothe Main Y and C outputs. If a component input were chosen, the compo-nent Y signal would follow the same path as the S video Y signal, i.e., itwould be switched directly to the Main Y path.
The switching circuit also delivers any of the inputs to the Sub Video path.This means that SY, SC and SYUV signals are delivered to the sub videopath.
Main ProcessingTwo separate sources are used for the main video path. They are Main Yand C or component video. Main Y or C is applied directly to the YCJ.These inputs will be used if a composite/S video source is selected. If acomponent video input is chosen, then the Main YUV signals are chosenby the YUV controller and input to the YCJ. Keep in mind that these lineswill also carry the PIP picture.
PIP ProcessingThe PIP processing circuit uses inputs from only the sub picture path.The main video path can be from two sources. They are Main Y and C orcomponent video. If composite/S video input is selected for sub pictureinput to PIP, it is first decoded to YUV by the Sub Decoder and applied tothe YUV switch. If a component video input is chosen, the Y signal isapplied to the YUV switch along with the UV signals from the componentinputs. These signals will then be selected by the YUV Switch and inputto the PIP Processor.
The PIP Processor outputs compressed YUV signals. It also outputs aYUV Switch signal that will determine the window size and position. Thesesignals are sent to the YUV Controller, which will select either the PIPsignal or the component input signal for output to the YCJ. The PIP Pro-cessor also outputs M H Sync to the Y Switch. The Y switch selects eitherthe MY or M H Sync inputs. MY is selected for normal and PIP functions.M H Sync is selected when the user selects Auto Program or FavoriteChannel function. When this sync signal is switched into the YCJ, it isplaced on a DC level that causes a gray screen to be seen in place of themain picture.
OSDOn Screen Displays are generated by three different sources in the RA-3chassis. They are System Control, V Chip/CC and PJ OSD and theyshare a common input to the YCJ. These circuits have a mute controlsystem that keeps them from interfering with each other.
YCJThe YCJ takes the inputs from the Main Y and C paths, the component orPIP from YUV Controller and the OSD RGB inputs. It processes thesesignals and converts them all to RGB drive signals, which are output tothe three tubes.
20
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MAINVCHIP
PJED SYSCON
COMBFILTER
CV
C
Y
SWITCHING
MONITOR OUT
CV
C
MC
RGB
RGB
RGB
YUVCONTROLLERYUV
SWYUV YUV YUV YUV YUV
SUB DECODER
YCJ
R
G
B
TOCBOARDS
PIPORCOMP.
SYNC TODEFLECTION
PIP
MY
YYSW
UV COMPONENTY
SC SY
OSD
C
M H SYNC
MY
Y
S MODELS VIDEO BLOCK 17TVP10
INPUTS
SUB UV
MAIN UV
YUV SW
21
Switching and Comb Filter (S Models)
OverviewThis section discusses the inputs to the S model RA-3 chassis. The Smodels have two inputs for composite/S Video and one shared input thataccepts composite, S video and component video. These signals areswitched and if composite video is input, it is sent to the comb filter. Thecomb filter separates the Y and C signals and sends them to the A/Vswitch. The A/V switch switches the comb Y or component Y signals tothe main Y path. The component U and V signals are switched by IC1903.
Video InputsThe Video 1 and 2 inputs accept composite and S video inputs. If an Svideo cable is plugged in, then the composite video input is disabled. Thisis because when the switch in the S video connector is closed, a line onIC1101 A/V Switch is grounded. The Video 3 input also contains a com-ponent input. If Video 3 is selected and there is a cable plugged intoJ1106 Pr, then the Video 3 composite and S video inputs are disabled.This is because the switch in J1106 activates the Video 4 input. This willswitch the Y from the component input to the main Y path. IC1903 YUVSwitch switches the color components.
Switching and Comb FilterThe composite video inputs are input to IC1101 A/V Switch. Whicheverinput is chosen is output at IC1101/41. This signal is sent to Q1103 andQ1104 Buffer and then the filter network consisting of Q1701, FL1701,Q1702 and Q1703. After filtering, the signal is input to IC1702 CombFilter. There is also a 3.58 MHz signal input to IC1702/11 CK In fromIC206 YCJ. The comb filter separates the Y and C signals in the compos-ite video signal. The C signal is output from IC1702/23 C Out to a filternetwork consisting of Q1704, FL1702, Q1707 and Q1708. This signal isthen sent to IC1101/43. The Y signal is output from IC1702/25 Y Out to afilter network consisting of Q1705, FL1703, Q1706 and Q1709. This sig-nal is then sent to IC1101/45. These signals are switched through IC1101A/V Switch and become Main Y and Main C.
If the switch from the S video input is closed, the internal switch in IC1101changes position and switches the Y and C from the S video input to theoutputs at IC1101/37 and 39. If the component video input is selected,the component Y is switched from the Y4 input to IC1101/39.
IC1101 is also capable of switching any one of the input to the Sub Y andC Out pins 56 and 58.
3 41 2
IC1101A/V SWITCH
CXA 1845
19
17
21
15
16
18
24
28
J1101
VIDEO 3 IN
S VIDEO
VIDEO
L (MONO)
R
AUDIO
Y
PB
PR
J1106
C3
Y3
SSW-3
V3
L3
R3
Y4
SSW-4
TO IC1903YUV SWITCH
KP53S70 VIDEO 3 INPUT
34
35
A BOARD
SDA
SCL
22
1/14/00SWITCHING AND COMB FILTER (S MODELS)
8TVP10 1207
8
1
15
41
10
3
17 45
12
43
37
58
Q1705, FL1703Q1706, Q1709
Q1102BUFFER
56
IC1702COMB FILTER
TC90A53F
23 25
Q1704, FL1702Q1707, Q1708
CKIN
ADIN
YOUTCOUT
MAIN VOUT
YOUT2
YIN2
CIN2
COUT2
SYOUT
SCOUT
MTV V
V1
V2
V3
STV V6
Y1
Y2
Y3
Y4C1
C2
C3
IC1101AV SWITCHCXA2079Q
MAIN Y TO IC1901/19 & 23 YUVCONTROLLER/TVIN+DVD Y
MAIN C TO IC206/64 YCJ/CIN
TO IC1902/30 SUB DECODER/CIN
TO IC1903/1YUV SWITCH/DYIN, IC1902/34 SUB DECODER/YINAND IC1602SUB V CHIP
FSC OUT FROM IC206/57TO J1105 MONITOR OUT
YUV MUTE FROM Q1110
FROM MAIN TUNER
FROM J1102
FROM CN1702/5
FROM J1101
FROM SUB TUNER
S VIDEOINPUTS
Q1701, FL1701Q1702, Q1703
Q1103, 1104BUFFER
15
19
60
24
39
63
COMPONENT Y
S VIDEOINPUTS
34
35
SDA
SCL
41CV
11
23
Picture in Picture (S Model)
OverviewThe PIP circuit is capable of taking any of the three types of inputs andcompressing them. The compressed output is sent to the YCJ to beplaced into the main picture. Only the sub input signals are needed for Smodels, unlike the V models which required sub and main picture inputs.The component video input can also be processed here for display as achild picture.
Sub Y SignalThe sub Y signal from IC1101 A/V Switch is split to three different places.They are:
Through Q1914 Y Buffer for component when a component input isselected for the main or sub picture.IC1602 Sub V Chip to determine if the child picture should be dis-played in the PIP window.IC1902 Sub Decoder to decode the Y and C signals. Y is also usedfor H and V sync.
Sub Decoder, PIP Processor and YUV SwitchIC1902 Sub Decoder decodes the SY and SC signals. The decoded Yand C signals, now YUV, are output from IC1902/18, 19 and 20 respec-tively.
These signals are then input to IC11903/2, 12 and 5. IC1902 has anotherset of YUV signals input at pins 1, 13 and 3. The Y signal is the SY signal.The Sub U and V signals come from the Video 3 component input atJ1106. IC1903/9, 10 and 11 are connected to IC1904/3 DVD SW. IC1904is a D/A Converter that outputs a voltage level dependent on the data itreceives. This voltage level selects which input is used for the sub pic-ture. The selected YUV signals are output at IC1903/15, 14 and 4 toIC1905/28, 30 and 32.
IC1905 is the PIP Processor. It digitizes and compresses the input sig-nals. It then converts the compressed signal back to analog and outputsYUV at pins 8, 9 and 7. These signals are input back into IC1902 SubDecoder at pins 11, 12 and 13. They are passed through an auto pedes-tal circuit and output at IC1902/8, 7 and 6. IC1905 also outputs two con-trol signals, M H Sync and SEL. The M H Sync signal will be used tocreate a gray screen during Auto Program and Favorite Channel func-tions. The SEL line becomes the YUV Switch input to the YCJ and YUVController.Sub C Signal
The Sub C signal is input through Q1906 Buffer to IC1902/32 C In. Thissignal will be decoded to its component form.
24
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28
30
32
21
12
8
9
7
Q1915BUFFER
11
12
13
201918
15
14
4
5
Q1917Y AMP
3
22
122
11109
Q1920V BUFFER
38
29
26
1
CVBS/Y IN
8
7
6
TO IC1901/1
Q1908BUFFER
32
3934
Q1914Y BUFFER
13 1
37
36
4
3
CIN
Q1904SUB Y BUFFER
Q1905BUFFER
Q1907BUFFER
Q1903BUFFER
FROM J1106COMPONENT
INPUT
PB
PR
SY OUT 1FROM IC1101/56
DVD SW 2FROMIC1904/3
RY IN
RU IN
RV IN
RY OUT
RU OUT
RV OUT
XNTSC
APCCERA
SDA
SCL
VSYNC
H SYNC
SDA
SCL
VOUTUOUTYOUT
X19023.58MHz
X1901503.5kHz
VOUTUOUT
YOUT
DVDSW
DV IN
DYIN
DU IN
YOUT
UOUT
VOUT
SDA
SCL
SDA
SCL
Y IN
U IN
V INX IN
XQ
SEL
V INU INY IN
SUB YTOIC602SUB V CHIP
TO IC1901/6YUV SW.
TO IC1901/3
TO IC1901/2
IC1902SUB
DECODERCXA2019
IC1905 PIP PROCESSOR SDA9288
PICTURE IN PICTURE (S MODELS) 9TVP10 1206
IC1903YUV SWITCH
BU4053
Q1906SUB C BUFFER
SC OUT 1FROMIC1101/58
Q1916Y BUFFER
Q1918BUFFER
Y
U
V
25
RA-4 vs. RA-4A
OverviewThis section discusses the similarities and differences between the RA-4and the new RA-4A chassis. The new chassis is nearly identical in fea-tures and circuitry to the RA-4 and the key differences will be discussed inthis manual. Please obtain a copy of TVP-08 for detailed circuit descrip-tions of the circuits not covered in this book. The part number for theTVP-08 training manual is TVP080299. An electronic version can be foundat http://service.sony.sel.com.
RA-4A FeaturesThe KP-53XBR300 and KP-61XBR300 are the models that use the RA-4A chassis. Screen size is the only difference between the two models.They share the following features with the previous RA-4 models:
• Advanced Pro-Optic System – Sony technology that allows full cor-ner to corner focusing.
• New Extended Definition CRT – Allows corner to corner focusing tobe increased by 25% over last year’s model.
• MICROFOCUS Lens System• Digital Reality Creation (DRC) – DRC uses line doubling and pat-
tern recognition algorithms to take the NTSC signal to a near HDTVequivalent.
• Auto Focus– Allows the setting of V and H center and skew by thecustomer at the touch of a button. This system differs from the oneused by RA-3 because it does centering and skew.
• Full Digital Convergence – Allows the servicer to converge the setin the coarse and fine modes. The fine mode uses a point to pointsystem for adjusting. It is the same system used in the RA-3 chassis.
• High Performance Video Processor• 3D Digital Comb Filter• Brightview Dual Component Screen – The screen contains a Thin
Film Fresnel that brightens and sharpens the picture, and a Fine PitchLenticular screen that achieves higher resolution by using black stripesto increase contrast.
• Built-in High Contrast Screen• First Surface Mirror• Advanced Velocity Modulation• Advanced High Voltage Regulation – Eliminates distortion and fo-
cus fluctuations that occur when changes in brightness levels causechanges in the high voltage.
• Noise Reduction• Shading Compensation – Eliminates color shift and hot spots that
can occur due to the angle of the picture tubes to the mirror.• Wideband Video Amplifier• Multi Image Driver – Digital-editing technology that provides versatil-
ity in controlling on-screen images. Used in Picture and Picture andChannel Index modes.
• Twin View Picture-in-Picture – Allows for viewing two pictures si-multaneously and the ability to expand either image up to double itsnormal size.
• Free Layout Picture-in-Picture – Allows the PIP window to be placedanywhere on the screen.
• XDS (Extended Data Service) – Receives data information servicesthat some stations may broadcast. This data includes time, stationcall letters, etc.
• Dolby Pro Logic Surround Sound• Center speaker input for use with a separate Dolby Pro Logic A/
V Receiver
26
The following features are new to the RA-4A chassis and are not found onthe RA-4 chassis:
“1080I Capable”Enables you to display 1080I, 480P and 480I digital TV formats. Theset does not accept 720P format. 480I signals are upgraded to 960Iby DRC.The 480P signal can be displayed two different ways by changing theAspect Ratio in the Set Up menu: V Compressed, 16:9; or normal,4:3.These signals can be input to the Video 5 input only. Component orRGB with sync inputs are accepted using phono jacks. Not compat-ible with computers 5 BNC connectors.The Video 5 input cannot use the MID circuit; therefore, PIP and P&Pfunctions cannot use Video 5.
Parental ControlEnables or disables the V chip rating system to block programs that mightbe inappropriate for younger viewers.
RA-4 and RA-4A Circuit DifferencesThe following differences will be discussed in this manual:
Video Path – The new video path will be discussed using an overallvideo block, a DTV Video Processing block and DTV Video Process-ing section which shows the IC and pin numbers that the DTV videopath uses.Addition of V chip circuitry. The Main CPU controls the main picture VChip. There is a separate Sub video V Chip. This will be covered inthe video block section.VD Mute circuit – Due to the fact that this set displays a true 16:9picture in a cabinet with a 4:3 aspect ratio, the IK reference pulsesthat are output during every field need to be hidden. If correction wasnot made, these lines would be visible at the top of a 16:9 picture.This circuit takes the IK reference pulses and CC data and puts themin the normal 4:3 overscan area by placing a pulse into the verticaldrive signal.
The following are minor circuit differences that will not be covered in thismanual:
The component values in the H deflection circuit have been changedbecause displaying 1080I input requires a different scan rate. Thetwo different scan rates are 31.5 kHz for DRC, MID, 480I and 480P,and 33 kHz, which is used for 1080I video.There are now three separate banks of NVM for three separate regis-tration modes. These modes are 1080I, 960I (Normal DRC picture)and 480P 16:9 Aspect Ratio. The set automatically selects the regis-ter bank of whichever signal is input. This is not covered because theadjustments remain the same for each mode.The pincushion correction circuit has been changed for greater effi-ciency. It is similar to the HV Regulation Control circuit used in theRA-4 chassis.New Picture tubes are used but are functionally the same.The 3D Comb Filter is identical but now resides on the BA board alone.The BA board plugs into the A board.The Shading circuit is different due to CRT burn countermeasuresinstalled because of the use of the 16:9 aspect ratio on a unit with a4:3 screen. These countermeasures are proprietary at this point andwill not be discussed.The BR and BD boards are functionally the same, but the circuitry isslightly different. These boards plug into the A board and are replace-able. The pin out of their connectors remains the same.
27
Video Path Block
InputsThe two tuner outputs and the four composite/S video signals that enterthe unit are input into IC515 A/V Switch. IC515 A/V Switch switches thesevideo signals to three different paths. The first is the main video path,next is the sub video path and last is the select output (not shown). Theselect output is used to send a composite version of an input to any com-posite or S video input to an output jack on the rear panel. Any compos-ite/S video input to is selectable in the setup menu. The default setting isto output the main video.
The Video 4 component inputs are input to IC1403 Main YUV Switch.The Video 5 DTV inputs are input to IC511 Video Processor. They areswitched through IC511 Video Processor and input to IC1403 Main YUVSelect. IC511 Video Processor also directly outputs Video 5 480P and1080I as RGB to the tubes.
Main VideoThe main video path is used to carry composite/S Video to IC2402 3DComb Filter. If a composite signal is used, it is output to IC2402 3D CombFilter. If an S Video input is used, then the Y signal uses the same path asthe composite input. The C signal is output from IC515 A/V Switch toIC2402 3D Comb Filter.
IC2402 3D Comb Filter is used to separate Y and C signals from a com-posite signal input. If a Y/C signal is input, then IC2402 3D Comb Filterwill perform noise reduction and video processing functions. The C signalis output to IC1305 Main Chroma Decoder. The Y signal is output toIC1307 YUV Switch where it is switched through to IC1305 Main ChromaDecoder.
IC1305 Main Chroma Decoder takes the Y and C input signals and con-verts these signals to component video. These become the main YUVsignals are then input to IC1307 YUV Switch.
IC1307 YUV Switch switches between the main YUV signals and the in-put it receives from IC1403 Main YUV Select. Whichever Y signal isselected is output to IC1008 Main CPU for V Chip/CC. The V Chip/CCData is returned to IC1307 to be output as part of the main YUV signal.
The outputs from IC1307 YUV Switch are then input to the BR board(DRC) and the BM board (MID). The BR board outputs 960I signals,which are the main video signals and are then input to IC511 Video Pro-cessor. The BM board is used for PIP and Twin View functions and itsoutput is a 480P format. If the Video 5 DTV Input is 480I, it will follow thevideo path out of IC1307 through the BR board and output as 960I toIC511 Video Processor.
Sub-VideoThe sub-video path is used to carry sub-video to the BM board where it isconverted for PIP and Twin-View functions. Note: The Video 5 DTVInput cannot be used for sub video. A composite signal is input toIC515 A/V Switch and output to CM501 Glass Comb Filter and then inputback to IC515 A/V Switch as Y and C. If the signal were an S Video input,it would pass directly to the Y and C outputs of IC515 A/V Switch.
The C signal is input to IC1301 Sub Chroma Decoder while the Y signal isinput to IC1302 Sub YUV Switch and then switched to IC1301 Sub ChromaDecoder. IC1301 Sub Chroma Decoder takes the Y and C input signalsand converts these signals to component video. These sub Y, U and Vsignals are then input to IC1302 Sub YUV Switch.
IC1302 Sub YUV Switch is used to select between the sub YUV inputsand the YUV input from the Video 4 component input. It also outputs theSub Y signal to IC1401 Sub V Chip. Sub-video OSD from the BM boardis input to the sub YUV signal. The output of IC1302 Sub YUV Switch isoutput as YUV into the BM board for use with PIP and Twin View func-tions. The signals from the BM board are input to IC511 Video Processor.
IC511 Video ProcessorThe IC511 Video Processor is used to switch or insert the appropriatesignals to its RGB output. These signals are the main YUV, sub YUV,OSD RGB, PJED OSD RGB signals and DTV YUV. These signals areconverted to R, G and B to be output to the video amplifiers on each of theC boards.
28
1/20/00
IC515A/V SWITCH
TU501MAIN
TUNER
TU502SUB
TUNER
COMPOSITEAND S VIDEO
1 - 4
CM501GLASSCOMB
SUB
YC
IC1301SUB
CHROMADECODER
IC1401SUB VCHIP
SUB CYUV
IC1302YUV SWPIP OSD
MIX
SUB YSUB Y
MAIN Y/COMP
MAINC
IC1305MAIN
CHROMADECODER
IC1307YUV SWCCD MIX
C
BRBOARD
YUV
IC1008MAINCPU
IC24023D COMBFILTER
MAIN YMAIN Y
YUV
BMBOARD
CCD + V CHIP OSD
Y FOR V CHIP
RGBBUFFER
IC511VIDEO
PROCESSOR
IC1004OSD
PROCESSOR
VIDEO 5DTV
INPUT
DTV YUV
RGB
MAINYUV
PIPYUV
CVFORPIPOSDYUV
RGB
RGBTOTUBES
VIDEO 4COMPONENT
RA-4A VIDEO PATH BLOCK 14TVP10
BA BOARD
IC1403MAIN YUVSELECT
RGB
PJEDOSD
29
DTV Video Processing Block
OverviewThis section will discuss how the DTV signals are processed. This in-cludes video path V Chip/CC processing, sync path and signal formatdetection.
The RA-4A chassis accepts two types of DTV inputs, component and RGBwith sync. There are three component inputs, Y, Pb (U) and Pr (V). Thesync is contained in the Y signal. There are five inputs for RGB. They areR, G, B, HD and VD. The RGB and Y, Pb and Pr share the same jack.The user must select which type of input they are using in the setup menu.If the color appears wrong, ask the customer to make sure that menusetting is the same type as the input.
Component Input SelectedIf the DTV signal input is component video and Y, Pb, Pr is selected in thesetup menu, the set will work as follows. The Video inputs are sent di-rectly to IC511 Video Processor. These signals are output from IC511Video Processor back into itself and to IC1403 Main YUV Switch. The Ysignal is also sent to the internal Intelligent Sync Separator in IC511. It iscalled intelligent because it determines which sync signal will be outputfrom it. If HD and VD from the DTV Sync inputs are detected, then theyare switched out to IC1008 Main CPU by default. If there is no VD or HDinput detected, but the Y input contains sync, then the sync will be sepa-rated from the Y and output to IC1008 Main CPU. The Main CPU usesthe sync input to determine the format of the incoming signal.
If IC1008 Main CPU determines that a 480P or 1080I signal has beeninput, the following occurs. The YUV signals that were input back intoIC511 are processed and output as RGB to the tubes. The H and V syncfrom the Y signal is separated and output to the deflection circuits. The Ysignal input with U and V signals input to IC1403 Main YUV Select isswitched through to IC1303. IC1403 selects this signal because of the ODTV input received from IC1008 Main CPU. The signal is passed byIC1303 to IC1008 Main CPU. This signal is used for V Chip/CC. TheMain CPU also outputs the name of the format through its OSD lines so itis displayed for the first few seconds after the input type is detected.
If a 480I signal is detected, the signal will not be directly output at IC511’sRGB outputs. Instead it will follow the path through IC1403 to IC1307.Here it joins the main video path and is output to the DRC circuit. How-ever, its sync signals are output to the deflection circuits from IC511.
If the Main CPU detects a 720P signal, the following will occur. The screenwill dim and the words “This signal is not available” will be displayed.IC511 Video Processor will not output the RGB to the tubes or the sync tothe deflection circuits. IC1008 Main CPU will output a command on theI2C bus that will instruct the OSD CPU to output a Low on the O 720P line.This line signals IC1307 to disable its DTV input and causes IC1303 toselect the input from the Y path shown.
RGB Inputs SelectedIf the customer inputs RGB, HD and VD, and RGB is selected in the setup menu, the video signals will be processed as explained previously.The sync signals, which are input separately, are output from the Intelli-gent Sync Separator instead of the sync from the Y so that IC1008 MainCPU can determine what video format has been input.
30
1/20/00
V4YUV
INPUT
IC1403MAIN YUVSELECT
IC1307MAIN YUV
SW
IC1303SW
IC1008MAIN CPU
DTVSYNC
V5DTV
INPUT
IC511VIDEO PROCESSOR
YUV
H + V SYNCTO DEFLECTIONCIRCUITS
TO TUBES
12 H SYNCO720PFROMOSD CPUIC1009/61
TO IC515FOR AUDIOSWITCHING
IVPODTV
VIN
Y
Y Y
DTV VIDEO PROCESSING BLOCK 16TVP10
YUV
Y
480ITOBR BOARD
YUV
31
DTV Video Processing
OverviewThis section discusses the video path for the DTV inputs. It is designed toaid you in troubleshooting by providing you the IC pin numbers that carrythe video signals.
Circuit DescriptionJ501 in the rear of the set has a green input labeled Y/G, a blue inputlabeled Pb/B, and a red input labeled Pr/R. These is a dual input connec-tor which accepts both component and/or RGB input. The user deter-mines which type of input is expected in the set up menu. If the wrongtype is selected, the color of the picture will be wrong.
Regardless of which type of signals are input, they will be sent to IC511/5,4 and 3. These signals are processed for correct color and output atIC511/76 SEL Y Out, IC511/77 SEL CB Out and IC511/78 SEL CR Out.These signals are split to two ICs. First they are input back into IC511/75SEL Y IN, IC511/74 SEL CB In and IC511/73 SEL CR In respectively. Ifthe input signals were 1080I or 480P, they would be converted to RGBand output to the tubes at IC511/35 R Out, IC511/37 G Out and IC511/39B Out.
The outputs from IC511/76, 77 and 78 are also input to IC1403 at pins 12,5 and 2. IC1403 is a switching IC that switches between the YUV, whichcame from the Video 5 DTV input, and the inputs from Video 4. Thesesignals are input at IC1403 pins 3, 1 and 13. The inputs selected aredependent upon the inputs at IC1403 pins 9, 10 and 11. If the input tothese pins is Low, the DTV inputs are selected and if the inputs are High,then the Video 4 component inputs are selected. In this case the inputwould be Low since we want to select the Video 5 DTV inputs. The DTVYUV signals are then output from IC1403/4, 15 and 14.
These signals are input to IC1307/7, 6 and 5 for two reasons. Firstly, ifthe signals input to Video 5 are 480I format, they need to be switched tothe main video path for DRC processing. Remember the normal pictureon this set is a 960I signal from DRC. Secondly, the Y signal needs to beswitched to IC1307/22. If we continue to follow this path, we can see thatthe signal is sent to IC1303 SW. It will be selected anytime a DTV signalis input, except when the signal is 720P format. It is sent to Main CPU VIn for V Chip/CC for the accepted formats. The switching of IC1303 iscontrolled by its input at pin 2. This signal comes from IC1009/61 O720P. When a 720P signal is input, the switch in IC1303 changes posi-tion and switches the signal in from the Y/G input. The same control linealso disables the outputs of IC1307 Main YUV Switch.
32
1/21/00
IC511VIDEO PROCESSOR
CXA2101AQ
5
4
3
76
77
78
75
74
73
35
37
39
SELYOUTIN2VIN2CBIN2CR
SELCBOUTSELCROUT
SELYINSELCBINSELCRIN
ROUT
GOUTBOUT
FROMDTVINJ501
Y/GPB/BPR/R
BUFFER
BUFFERBUFFER
135
DTV VIDEO PROCESSING
BUFFERQ1308, 1309
IC1307MAIN YUV SW
CXA2119
7
6
5
22
IC1403MAIN YUVSELECT
MC14053BF
3
1
13
4
15
14
9 10 11 25
J503 YUV4INPUT 5 2 12
Q1420
O DTVFROMOC1008/3
IC1303SW
NJM2533
12
37
TO IC1008/22MAIN CPU/VINFOR VCHIPO 720 P FROMIC1009/61
CN503
TO CN7101CR BOARD
15TVP10
Q1312
33
VD Mute
OverviewDue to the fact that this set displays a true 16:9 picture in a cabinet with a4:3 aspect ratio, the IK reference pulses and CC data contained in everyfield need to be hidden. The VD Mute circuit does this. If correction werenot made, these lines would be visible at the top of a 16:9 picture. Thiscircuit takes the IK reference pulses and CC data and puts them into thenormal 4:3 overscan area when they are occurring by placing a pulse intothe vertical drive signal. Inputting the HBLK and VBLK into a series of twoprogrammable counters does this. These counters are set up so that thepulse output is equivalent to 11 horizontal scanning lines. This pulse isused to mute the V Drive signal.
VD MuteSince this circuit only needs to be active when a 16:9 picture is beingdisplayed, an enable is necessary to allow the counters to count. Thissignal is sent from IC1009/59 V Comp. IC1609 and IC1608 both have anenable input that is tied to Deflection 5V at pin 10 ENP. This voltage mustbe present for the circuit to operate.
The HBLK line is input to IC1609/2 CLR. This input appears to be forClear, but there is actually an error in the service manual. This line isactually the CLK input but we will continue to call it CLR to avoid confu-sion between this book and the service manual. The HBLK signal will be33.7kHz when a 1080I signal is input and 31.5kHz if a 480P signal isinput. The VTIM signal that is input to IC1609/9 Load is always 60Hz.These signals are always input to IC1609 so when the V Comp line goesHIGH, the circuit begins to operate. IC1609/15 RCO is the carry outputand will be LOW for the first 14H of the VTIM signal. Its output is invertedby IC1623 and input to IC1609/7 ENT, which is used to keep the outputsfrom changing state. IC1609/11 QD is LOW for the first 7H of the VTIMsignal and HIGH for the rest.
The signal from IC1609/15 RCO is input to IC1608/9 Load. The signalsfrom IC1609/11 are input to IC1608/1 /CLR. /CLR disables the IC1608outputs when it is LOW. Therefore for the first 7H, the output at IC1608/12 will be LOW. When IC1608/1 goes HIGH, the outputs are enabled and
the signal at IC1608/12 goes HIGH. This is because when the /CLR inputis HIGH and the Load input is LOW, the output at Q2 will be the samestate as the C input, which is at IC1608/5. This pin is tied to 5 volts;therefore, the output from IC1608/12 is HIGH. This output stays HIGH for7H for this reason. When the Load input goes HIGH, the output continuesto remain HIGH for another 4H. This is because IC1608/11 Q3 output isinverted and input to IC1608/7 ENT. When the Load input is HIGH andthe ENT input is LOW, the output does not change state. When the ENTline returns to a HIGH, then the output at IC1608/12 goes LOW. Thisgives us the 11H pulse necessary to hide the IK and CC Data lines.
When the signal from IC1608/12 is LOW, both Q1631 and Q1629 areOFF. When these transistors are OFF, this circuit has no effect on the VDrive signal. When signal from IC1608/12 goes HIGH, then Q1631 andQ1629 both turn ON. Q1631 mutes the V Drive directly by placing C1651near ground potential. Q1629 turns ON, allowing current to flow throughQ1621 B-E through D1634 to ground. This action causes Q1630 to turnON. This will mute the V Drive signal by placing C1647 close to groundpotential.
RGB MuteThe 4H pulse that is output from IC1608/7 is used to mute the RGB sig-nals at the end of the 11H VD Mute. This is necessary because as thebeam begins to travel back to the top of the 16:9 picture, we do not wantto see any retrace lines that might occur if video were to start at this point.Therefore this 4H pulse mutes the RGB signals to the picture tubes.
V Out20v 5 ms
IC16082v 5 ms
34
1/24/00
2
9
15
7
111
3456
2
12
1
3
4
5
6
9
1 7
HBLK (HP)FROMCN509/9
VDSP/VTMVBLKFROMIC512/36
OSD-CPUO VCOMPFROMIC1009/59
CLR
LOAD
/CLR
IC1609TC74HC163AFBLKPULSECHANGE
RCO
ENT
ENP
CLR
LOAD
Q2
IC1608TC74HC163AFBLKPULSECHANGE
DEF5V
10
10
C1648
C1650
C1651
R1667
Q1629R1664
R1665
R1676
R1677Q1630
Q1621
R1662
C1649
C1647
TOIC1625ANDGATEFOR SCP
TOIC518/5VDDRIVEAMP IN
V SAWAMP OUTFROMIC514/1
VD MUTE 13TVP10
Q1631
ENP
ABCD
AB
D
C
IC1623
D1634/CLR
R1678
DEFLECTION 5V
R1661
7
11Q3
TO RGBMUTE
IC1623
APPENDIX 1
i
Self-Diagnostics
OverviewThe RA-4 chassis employs a Self-Diagnostic system that uses the TimerLED and an on screen menu to help indicate where the problem with theset has occurred. You will generally have to use the flashing LEDs sincethe set will be shut down. AC power must be disconnected in order to turnthe set off once shutdown has occurred.
When a failure occurs, all of the circuits covered by the Self-Diagnostics,except AKB, send a signal to the OSD CPU. The OSD CPU sends datato the Main CPU that indicates how many times the Timer LED will flash.The AKB circuit located in the Video Processor IC sends data over theI2C bus directly to the Main CPU. In addition, each circuit, except AKBand High Voltage, send a signal to the latch circuit to shut the set downwhen failure occurs.
•EXAMPLE
<Diagnosis Items>
• +B overcurrent
• +B overvoltage
• Vertical deflection stop
< FRONT PANEL >
TIMER/STANDBY indicator
The number of times the LED blinks may correspond to that shown in thefollowing table:
<Number of Blinks>
2 times
3 times
4 times
Lamp OFF : 3.0 seconds
Lamp ON : 0.3 seconds
Lamp OFF : 0.3 seconds
If the problem is intermittent and you can get the set to operate, you candisplay a menu showing the number of times failures have occurred. Thisis done by pressing the following sequence of buttons on the remote.
Display Channel 5 Vol - Power
The display will look as follows.
SELF CHECK
2 : +B OCP XX
2 : +B OCP XX 3 : +B OVP XX 4 : V STOP XX 5 : AKB XX 6 : H STOP XX 7 : HV XX 8 : AUDIO XX 9 : WDT XX
XX the range of values for number of operations is 00-99.For 99 or higher there is no count up and the numberremainsat 99.Diagnosis
Results
* : XX the range of values for number of operations is 00-99. For 99 or higher there is no count upand the number remains at 99.
Diagnosis Item Standby/sleep lamp,Number of Blinks
Self-diagnosisscreen display,Diagnosis Item Results
•Power not ON Not lit+B OCP detection LED blinks 2 times 2 : +B OCP XX+B OVP detection LED blinks 3 times 3 : +B OVP XXV detection LED blinks 4 times 4 : V STOP XXAKB detection LED blinks 5 times 5 : AKB XXH detection LED blinks 6 times 6 : H STOP XXHV abnormality detection LED blinks 7 times 7 : HV XXAudio abnormality detection LED blinks 8 times 8 : AUDIO XXWDT (Syscon) LED blinks 9 times 9 : WDT XX
ii
iii
Q621/D - 50 mv, 10 us Q621/G - 1 V, 10 us
Q621/S - 1 V, 10 us
Standby Power Supply
OverviewThe standby power supply is a switching power supply used to createStandby 5V. The Standby 5V line is used to power the Tuning Micon andEEPROM and any other circuits which need power when the set is OFF.
Converter OperationOperation of the Standby power supply begins when the set is plugged in.The AC line voltage is applied across the standby power supply. The AClow side is ground for this circuit. The AC high side is applied to a halfwave rectifier consisting of D621 and D622. Two diodes are used so thatthere will be protection should one of them fail. This voltage is then ap-plied to T621/1 SRT Input through R639. R639 is a fusible resistor usedfor current limiting and failure protection. It will open if the standby switch-ing circuit draws excessive current. Please note that the board has T621SBT silk-screened on it. This differs from the service manual, which callsT621 SRT.
When the voltage is applied to T621/1 SRT Input, current flows throughthe winding and R631 to Q621/G. Q621 Converter is a FET with addedprotection. When a positive voltage is applied to the gate, it begins toconduct drain to source. This reduces the voltage at T621/3 to close tozero. Normally this would reduce the voltage at Q621/G, but a voltage issupplied to the gate through R632 and C630 from T621/4. This voltage isinduced into the secondary winding of T621/4 when current flows throughthe winding between T621/1 and T621/3. The voltage is not permanentdue to C630. As C630 charges, it reduces the voltage at Q621/G. Oncethis voltage falls below a certain threshold, Q621 Converter turns OFF.
Once Q621 Converter turns OFF, all polarities are reversed. This rever-sal of polarity helps speed up turn OFF of Q621. D623, along with C631and R640, form a snubber network (voltage clamp). This network clampsexcessive voltage overshoot caused by the collapsing magnetic field ofT621 SRT and returns the excessive voltage to C629. When the fieldcollapses fully, current begins to flow through T621/1 and 3.
The waveforms below show what will be seen at Q621.
RegulationChanging the frequency of the switching regulates the output voltage atthe secondary winding comprised of T621/8 and 9. Taking a sample volt-age from T621/4 and applying it to rectifiers D624 and D625 does this. Asthis voltage rises and falls, the rectified voltage is applied to Q622/B throughR634. When Q622 begins to conduct, it lowers the voltage at Q621/Gand changes the switching frequency.
The changing frequency will change the amount of voltage coupled to thesecondary winding consisting of T621/8 and 9. If the load on the second-ary output increases, the frequency of switching will decrease. This bringsthe frequency of the converter closer to the optimum operating frequencyof T621 SRT. Moving closer to this optimum frequency causes morevoltage to be provided at T621/9. The opposite occurs when the load onthe supply decreases. This causes the frequency of operation to be in-creased and the amount of voltage coupled to T621/9 to be decreased.The supply typically operates at 45 kHz when the set is OFF and at about30 kHz when the set is operating. The incoming line voltage also effectsthe frequency of switching operation.
iv
FB621
D621
D622FROMT601/1AC HiSIDE
R6394.7 OHMS
R640 C631
D623
Q6212SK2845
R635
C634
C629
R637FROMR623&R664 ACLo SIDE
R631
R636
Q622PROT. C699
C630 R632
D698
D624
D699MTZ-T-77-15 .
R633
R634
D626RD6.2ESB2
C635
R638
C633
D627
C636
T621SRT
D628
C637
G BOARD
IC6225V REGBAO5T
CN641
C650
I OG
STANDBY+5V TOA BOARDCN1641
TO RY600POWER RELAY
6
5
4
3
2
1
11
10
9
8
STANDBY SUPPLY3 CTV26 1187
10
D
D625S
7.2VDC
TO Q646/EBACKUP
12/28/99
v
Over Current Protection (OCP)Monitoring the voltage across R637 is used for over current protection.This voltage is representative of the amount of current flowing throughQ621 Converter since it is in series with the transistor. If this voltageshould rise to .6 volts, it will cause Q622 to turn ON. If Q622 were to turnON, it would shunt Q621/G voltage to ground. This would cause Q621Converter to stop conducting.
Over Voltage Protection (OVP)Over voltage protection is done by rectifying the voltage at T621/6 withD627. This voltage is filtered by C636 and applied to D626 through R638.If this voltage should rise above 6.2 volts, D626 begins to conduct. Whenits conduction allows Q622 Protect to turn ON, over voltage protection isemployed. Q622 Protect turns ON and grounds Q621/G, which stops theconverter from switching.
D699 is also used for OVP. The signal from T621/4 is rectified by D698.This creates a negative voltage across C699. If this negative voltagebecomes great enough, D699 conducts and the Q621/G voltage is broughtlower.
Secondary OutputThe power coupled through T621 SRT places a voltage on T621/9 that,when rectified and filtered by D628 and C637, is 7.2 volts. This voltage isconstant due to the regulation circuit on the primary side of T621 SRT.This 7.2 volts is applied to Q646/E for backup during the start of regula-tion by the regular power supply.
It is also applied to IC622 5-Volt Regulator, which regulates its output to 5volts. This 5 volts is sent to CN641/10 which connects to the A board andpowers the Tuning Micon and other circuits. It is also applied to RY600Power Relay.
Checking Q621Testing a MOSFET device is simple. The leads show infinite resistanceto each other except for drain to source in one direction because of thepresence of a protection diode.
To prove the device is functional:
1. Connect the negative lead of the ohmmeter to the SOURCE lead.2. Touch the ohmmeter positive lead to the gate, to pre-charge it.3. Connect the ohmmeter positive lead to the DRAIN. If the device is
good you will get a resistance reading of about 400-1k ohms.Some DVMs do not produce enough DC voltage in the ohms mode. Thediode check mode can be used with these models. When using the diodemode, a low voltage drop is shown after pre-charging the gate.
vi
FB621
D621
D622FROMT601/1AC HiSIDE
R6394.7 OHMS
R640 C631
D623
Q6212SK2845
R635
C634
C629
R637FROMR623&R664 ACLo SIDE
R631
R636
Q622PROT. C699
C630 R632
D698
D624
D699MTZ-T-77-15 .
R633
R634
D626RD6.2ESB2
C635
R638
C633
D627
C636
T621SRT
D628
C637
G BOARD
IC6225V REGBAO5T
CN641
C650
I OG
STANDBY+5V TOA BOARDCN1641
TO RY600POWER RELAY
6
5
4
3
2
1
11
10
9
8
STANDBY SUPPLY3 CTV26 1187
10
D
D625S
7.2VDC
TO Q646/EBACKUP
12/28/99
vii
Switching Power Supply -Primary RectifierWhen the set is turned ON System Control IC001/62 places a high onthe base of Q652 Relay Drive. Q652 turns ON and provides the groundreturn path for Power Relay RY601. With the relay closed, AC is ap-plied to a voltage doubler circuit comprised of bridge rectifier, D602 andtwo capacitors, C607 and C608. This produces 300V at R608 withrespect to Hot Ground .
IC601The switching transistors in previous power supply circuits have beenreplaced by an IC in this chassis. Basically this IC is two transistorsfabricated on the same piece of silicon. This gives us the advantage ofhaving the gain and other electrical characteristics matched. In additionthere is a zener diode and a regular diode across the base emitterjunction for protection purposes.
OscillatorIC601-1, C615, C618 and the winding between T604/4 and 5 form onesection of the oscillator for the switching regulator. IC601-2, C616, C617and the winding on T604 between pins 2 and 3 form the other leg. T604is the Power Regulating Transformer (PRT). The arrangement of thecircuit can be considered a “Dual Tank Oscillator”. The operating fre-quency is determined by the two LC circuits: C618, and the T604 wind-ing between pins 4 and 5; C617, and theT604 winding between pins 2and 3. IC601-1 and IC601-2 share in producing the oscillator signal.IC601-2 is ON during the positive half, and IC601-1 is ON during thenegative half. The oscillator frequency is 97kHz when the TV producesa white raster, and at 103kHz with a black raster.
Start UpThe current path for initial start-up of the oscillator is through IC601-2,through the winding of pins 2 and 1 of T604, the winding of pins 6 and 5of T605 and then through C621. When current flows through this path amagnetic field is created in the windings of T604. This field continues togrow until C621 is fully charged. After C621 is fully charged the mag-netic fields begin to collapse. This induces a voltage at T604/3 that thatturns OFF IC601-2 through C616 and R613. While this is occurring avoltage is induced at T604/4 that turns IC601-1 ON. When this occurs itprovides a discharge path for C621. Once C621 is discharged it allowsthe whole cycle to repeat itself.
As the circuit oscillates it produces a 300Vp-p waveform at Power InputTransformer T605/6. This waveform is induced into the secondarywindings of the T605, producing all of the secondary voltages.
RegulationThe power supply is regulated by the control winding of PRT T604/7 and8, in the following manner:
An increase in voltage across the control winding will reduce the induc-tance of T604 therefore increasing the oscillator frequency. When theoscillator frequency increases it moves further away from the resonantfrequency of T605, reducing the voltage at the secondary outputs. Theopposite occurs when the voltage across pins 7 and 8 decreases.
A correction voltage is produced by IC651/4 which varies inverselyproportional to the 135V line. Pin 8 of the transformer control winding isconnected to the correction voltage The other leg of the control winding(pin 7) is connected to the +18V line by D660. The voltage differentialacross the control winding causes a dc current to flow through thewinding.
viii
ix
Switching Power SupplyRegulation (cont’d)The frequency of the power supply is dependent on the load that it sees.When the picture brightness increases the load increases which lowersthe voltage across T604/7 and 8. When this occurs the frequency of theoscillator decreases which allows T605 to supply more current to thesecondary windings which keeps the 135V line from lowering in voltage.Since the 135V line is the only one regulated there will be about a +/-5% variation in the other supply voltages.
The following chart shows what occurs with different loads on thesupply. Note that the oscillator frequency changes but the 135V lineremains constant.
Location White Raster No Input
V across pins 7+8/T604 2.58V 2.73V
Freq. ,at IC601/E2 97Khz 103Khz
V at CN653 135V 135V
Soft StartThe soft start circuit prevents discharged capacitors on the secondarylines from drawing excessive current during power “start up” and short-ing the oscillator transistors. The soft start circuit brings the secondaryvoltages up slowly.
At power ON, C666, which is discharged, has a 0V potential at its +terminal. This biases Q654 ON, via R696. With this transistor ON, itallows standby 12V from Q651/E to be applied across pins 7 and 8 ofT604. This increases the oscillator frequency and reduces efficiency.Therefore, the start up secondary voltages will be reduced considerably.The Standby 12V is switched through Q651 when Q652 Relay Driveturns ON.
As soon as a secondary voltage is produced, C666 starts charging. Thiscauses the voltage at the positive capacitor terminal to rise, causingQ654 to decrease conduction, less dc current flows through the trans-former control winding; the oscillator frequency decreases, and thesecondary voltage increases further.
C666 continues to charge and the secondary voltages continue to riseuntil the capacitor charges to the point that its voltage potential is thesame as Q654/E, at this point the transistor stops conducting allowingIC651 to control the regulation process.
LimitLimit transistor has two functions:
• It acts as a non latching voltage limiter.
• It is a soft start reset. It discharges C666 when the unit is turnedOFF, preparing it for the next turn ON.
Voltage LimiterZener D664 is a 24V zener that is connected between Q656/B and the18V line. During normal operation, the potential across the zener islower than the zener voltage. Therefore, the zener is OFF and cannotsupply a base voltage to Q656 therefore Q656 will be OFF. Should adefect cause the 18V line to rise above 24V the zener diode breaks overand applies bias to Q656/B, turning it ON. This turns Q654 ON, thevoltage across the transformer control winding increases (T604/8 dropsto 3.7V) and the oscillator frequency increases. The end result is adecrease in transformer efficiency and a drop in the secondary voltages.
Soft Start ResetRelay RY601 is powered by 12V produced by the Standby power supplyand the relay is turned ON by Q652.
Q652 is OFF when the unit is turned OFF. This removes the groundpath from the relay, opening it up. It also allows the 12V from the relayto flow through the relay coil, through R693, to Q656/B. This turns thetransistor ON, and discharges C666.
x
xi
Troubleshooting
In cases of power supply failure it is often necessary to isolate thepower supply from the rest of the circuit. This cannot be done with theset using full AC power. An additional problem with the RA-2 chassis isthat the power supply section is on the same board with other circuitsand cannot be completely isolated. However the biggest concern in thisprocess is the +135V line. It can be isolated by removing CN653.CN653 is a loop through connector for the +135V line located on the Gboard.
The following tables can help you in isolating whether you have a powersupply problem or another problem. These voltages were taken by firstshorting pins 3 and 4 on RY601 and slowly bringing up the AC linevoltage using a variable AC power supply. There are three tables thatshow the power supply voltages at various stages of unloading. Thefirst is with the supply fully unloaded which means the connectorsbetween the A and G boards are disconnected and CN653 has beenremoved. The second table was made with the A and G boards discon-nected but CN653 is in place. The third table was made with everythingconnected. It is very important when bringing the set up slow that theAC input voltage not be brought above 50Vac. Also anytime you havefound IC601 shorted or R608 open you should follow the above proce-dure.
RA-2 Chassis Power Supply Output Voltages - CN653 and A Board UnpluggedPrim ary (Gnd = D602 neg end) Secondary (Gnd = Ground rail on G Board)
VariableAC Input
OscillatorVoltage
OscillatorFrequenc
y
135 30 15 -15 11 5 -5 Standby 12V
20Vac 50 Vp-p 72 kHz 48.7V 14.5V 5.0V -3.6V 4.5V 2-1V -.35V 2.7V30Vac 70 Vp-p 84 kHz 63.0V 18.5V 5.8V -3.7V 5.8V 2.5V -.60V 4.6V40Vac 90 Vp-p 100 kHz 63.2V 20.0V 6.3V -3.8V 6.1V 2.8V -.80V 7.2V50Vac 120 Vp-p 117 kHz 69.0V 22.2V 6.8V -3.8V 6.9V 3.0V -.90V 9.1V
RA-2 Chassis Power Supply Output Voltages - CN653 plugged in and A Board UnpluggedPrim ary (Gnd = D602 neg end) Secondary (Gnd = Ground rail on G Board)
VariableAC Input
OscillatorVoltage
OscillatorFrequenc
y
135 30 15 -15 11 5 -5 Standby 12V
20Vac 50 Vp-p 72 kHz 40.0V 12.1V 5.0V -3.6V 4.1V 1.9V -.2V 2.5V30Vac 70 Vp-p 84 kHz 48.0V 15.2V 5.8V -3.8V 5.1V 2.4V -.7V 4.7V40Vac 90 Vp-p 100 kHz 50.6V 16.0V 6.8V -3.9V 5.2V 2.7V -.9V 7.0V50Vac 120 Vp-p 117 kHz 54.8V 17.7V 6.6V -4.0V 5.8V 2.9V -1.0V 9.3V
RA-2 Chassis Power Supply Output Voltages -Everything ConnectedPrim ary (Gnd = D602 neg end) Secondary (Gnd = Ground rail on G Board)
VariableAC Input
OscillatorVoltage
OscillatorFrequenc
y
135 30 15 -15 11 5 -5 Standby 12V
20Vac 45 Vp-p 72 kHz 38.0V 7.3V 4.4V -3.3V 3.1V 1.6V -.20V 2.4V30Vac 70 Vp-p 84 kHz 44.5V 8.3V 4.8V -3.6V 3.5V 2.1V -.50V 3.5V40Vac 92 Vp-p 104 kHz 46.3V 8.8V 5.0V -3.7V 3.8V 2.3V -.80V 4.5V50Vac 118 Vp-p 124 kHz 49.2V 9.2V 5.3V -3.6V 4.1V 2.4V -1.0V 5.6V
xii
xiii
L601
T605/1T604/1
IC651
IC653
CN653/1IC655
RY601
T603/1
3 4
Hot Ground
TVP07GBPS
xiv
IC655
CN653 CN507
IC652
IC653
IC601
R608
TVP07GPSTOP
xv
Horizontal DeflectionOverviewThe horizontal deflection circuit has two main functions:
• Control horizontal scanning of the CRT beams.
• Along with the flyback transformer create high voltage for the picturetubes.
Horizontal ScanningThere are 3 circuits used to control Horizontal beam scan:
• Horizontal Drive
• Pincushion
• Centering
Horizontal DriveWhen +9V line is applied to the Y/C Jungle IC301 X304 begins tooscillate. This is a 32fh signal that is used as a reference for the hori-zontal oscillator inside the Y/C Jungle. When the Y/C Jungle IC confirmscommunication with System Control IC001 it begins to output 8vp-phorizontal drive pulses at pin 35. (See Waveform “A”)
These pulses are input to the base of Q501 and then a 90 vp-p signal isoutput at the collector and applied to T501 the Horizontal Drive Trans-former. (See Waveform “B”)
T501 induces a 12 vp-p signal onto its secondary which is connected tothe base of Q502 Horizontal Output. (See Waveform “C”)
Q502 and associated components amplify and waveshape the signal sothat 1000 vp-p spikes are output and applied to the yokes and FlybackTransformer T504.
Also a sample of this pulse is sent back to the Y/C JungleIC301/36 HP/Hoff. This pulse is compared to the reference created by X304 for phasecorrection of the horizontal oscillator. The HP pulse is also sent to IC001System Control for OSD positioning and IC802 Wave Generator. (SeeWaveform “D”)
PincushionThe purpose of the pincushion circuit is to correct for deflection distor-tion. This distortion occurs because of the yokes inability to create alinear beam scan. The result would be a picture bowed at the sides, topand bottom. We compensate for this problem by using pincushioncorrection circuits. Pincushion correction for horizontal scanning in thisset is described below.
Pincushion correction is achieved by modulating the horizontal scancurrent with a vertical parabola. The resulting signal causes the hori-zontal scan current to be least at the top of the raster, but to graduallyincrease to maximum as the beam reaches the vertical center of thescreen. As the beam continues to move towards the bottom of thescreen, the horizontal scan current gradually decreases. The result is araster with straight sides.
“A”2v5ms
“B”1v50us
“C”1v5ms
“D”5v50us
xvi
xviiIn the RA-2 chassis a vertical parabola signal is output from IC301/31 toIC501/9. (See Waveform “A”)
At IC501 H pulses at pin 8 are pulse width modulated by the verticalparabola signal at pin 9. The result is output to and amplified by Q505.
When the above signal (Waveform ‘B”) is applied to T502 PMT andT503 HLT it controls the return path of the horizontal yokes by inducinga voltage that causes more or less current to flow in accordance withthe waveform. This keeps the sides of the picture straight.
CenteringIt should be noted here that centering of the horizontal yokes is done byusing one of the secondary coils of FBT T504 and attaching its centertap to the return of the Green yoke. The other windings are connectedthrough rectifiers to the other yokes. Horizontal centering is necessarybecause the red and blue tubes are at opposite angles to the screen inreference to the green tube which is straight. Therefore by applying DCvoltages of opposite polarities with reference to the center tap we arecentering red and blue to green. If you place the negative lead of yourDVM to pin 8 of T504 FBT and the positive lead on D514 Cathode orD515 anode you should read +4V and -4V respectively.
“A”2v5ms
“B”1v5ms
High Voltage DevelopmentHigh voltage is developed by taking the horizontal output pulses and ap-plying them to the Flyback Transformer T504. The Flyback TransformerT504 steps up the horizontal pulses and rectifies them. This produces31Kv at its output. This voltage goes to the high voltage block where it isdistributed to the three picture tubes.
This is where the RA-2 chassis differs from the previous Sony projectiontelevision sets. This chassis has no high voltage regulation. However therehave been various steps taken to compensate for this fact.
xvii
xix
CN502
CN503
CN504
Q505
CN653
Q501Q502 TVP)&GBVT
xx
T501/1
T502/1 Q505
L505/1
CN504/1CN502/1
T504
CN503/1
Q502
Q501
TVP07GBHV
xxi
VERTICAL DEFLECTIONVertical DriveIC301 Y/C Jungle contains a vertical oscillator whose frequency is deter-mined by C323 which is connected to IC301/33. This oscillator is used tocreate the drive signal for vertical deflection. It free-runs at approximately60Hz to maintain a raster under no signal conditions. When a video signalis present it is locked to the video’s vertical sync pulse which is input atIC301/43.
IC301 Y/C Jungle uses the vertical oscillator to generate two vertical drivesignals which are output at pins 29 and 30. These signals are sawtoothwaves and are 180 degrees out of phase. They are shown in Figures 1and 2. These signals are then input to IC1501 V Out where they are am-plified and output to the vertical yokes. You also notice that IC301 pins 29and 30 are input to the Vertical Zooming Amp IC1502. There they aremultiplied with a sample of the ABL signal. This is done to compensate forvertical size changes due to lack of high voltage regulation. The outputsfrom IC1502 are then summed with the vertical drive signals at VerticalOutput IC1501/1 and 7. The vertical drive signal output from pin 5 is about55Vp-p. This is possible because IC1501 contains a voltage boost circuit.IC1501/3 is used as a flyback supply and boost the positive supply on theoutput to 45V. A sample of this pulse is used to create VP. The outputsignal swings from -10V to 45V. The vertical drive signal is then sentthrough L1501 to the three deflection coils via CN1501.The coils are con-nected in series. The return path to ground for the signal is through TH1501,R1501 and R1518. The return signal also applies negative feedback tothe input via C1524, C1502 and R1506.
ProtectionSince a loss of vertical deflection will damage the CRTs, protection is pro-vided in the event of deflection loss. Since there is no return of VP to theY/C Jungle we need another way to blank the set if we lose vertical deflec-tion. Since the VP pulse does go back to System Control IC001 to controldata timing this line is used. When the VP pulse is not present at IC001the data and clock signals between System Control and the Y/C Jungleare incorrect. Any time there is no communication on the data bus be-tween System Control IC001 and the Y/C Jungle IC301, System Controlcycles the power relay line pin 62 OFF and ON. Therefore any failure thatcauses loss of Vertical deflection will cause the set to continuously powerOFF and ON.
xxii
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Convergence Block
OverviewThe convergence circuits are used to adjust all three colors so that theyare all “laid on top of each other”. This is performed by sending signals tosub deflection coils that are located on each of the three yokes. This isdone in the RA-4 chassis using Sony’s new digital convergence circuit.To accomplish this, this circuit uses what is called the PJED (ProjectionEngine Digital). The PJED performs two functions. It allows the factoryor servicer to converge the set, and also allows the customer to AutoFocus the set. The Auto Focus button optimally adjusts the center andskew controls.
ConvergenceConvergence in this set is much different than in previous chassis. It is adigital system that uses a coarse mode to “rough” in the picture, and thena fine mode to allow 81 different points to be adjusted for each colorwithout affecting the rest of the picture. You will find this system to bemuch simpler and intuitive than the previous system.
This system operates by allowing the servicer to interface with the PJEDusing the remote. Remote commands are received by the Main CPU andsent to the PJED over the main I²C bus. Once the CPU of the PJEDreceives these commands, it sends data through its own I²C bus, referredto as the P Bus, to an IC which outputs the correct waveforms. Thesewaveforms are output to the Sub Deflection amplifiers and applied to thesub yokes.
Auto Focus (Auto Registration)The Auto Focus button on the front of the set allows the customer toadjust the skew and centering of the three colors at the touch of a button.When Auto Focus is selected, the PJED OSD sends out signals, whichare sent through a level compensation circuit to the video processor to bedisplayed on the screen. The patterns displayed on the screen are re-ceived by a number of sensors located around the outside of the screen.These sensors output a current proportional to the amount of light re-ceived. The level compensation circuit was used earlier because the sen-sors are not equally sensitive to different colors of light. The output fromthe sensors is input to a current to voltage converter. The signal from theI/V Converter is input to a peak detect circuit whose output is sent to an A/D converter in the PJED. While this process is going on, the PJED ischanging the waveforms to the sub deflection circuit. This varies theintensity of the light that strikes the sensors. The CPU will determinewhen the output from the sensors equals the stored values of the opti-mum picture. This means that it does not optimize the picture by itself,but looks in memory for the stored value. This value is set at the factoryor by a servicer who presses the Auto Focus button in the service mode.
xxiv
xxv
Sensor Amp
OverviewThe sensor amplifier is used when the customer or servicer presses theAuto Focus button. It amplifies the signal from the sensors and outputsthe signal to the D/A converter on the BD board.
Auto FocusThe Auto Focus system works by adjusting centering and skew conver-gence data to receive a memorized optimum level. The servicer can setthis level by performing the Auto Focus function in the Service Mode.This means that the system does not pick a new optimum value when thecustomer uses it but rather changes centering and skew adjustment datato get an optimum sensor reading. The drawing below shows the positionof the sensors around the screen.
5
3
0
2
7
4
1
6
SCREEN
0 : UPPER SENSOR
1 : LEFT SENSOR
2 : RIGHT SENSOR
3 : LOWER SENSOR
4 : UL SENSOR
5 : UR SENSOR
6 : LL SENSOR
7 : LR SENSOR
When Auto Focus button is pressed Pattern A and B are output in suc-cession over top of the sensors. Pattern A is offset to the left of thesensor and Pattern B is output to the right of the sensor.
PHOTO SENSOR
PHOTO SENSOR
a
L
PATTERN A
PATTERN B
AA + B
aL
=
[ OVER VIEW ]1. MEASUREMENT PRINCIPAL
xxvi
Varying the input to the convergence amplifiers changes the pattern. Thetable below shows that the A and B patterns are output while the conver-gence data is changed. The changing of this data changes the conver-gence amplifiers input. The X axis shows the changing of the conver-gence data and the Y axis shows the value of the data output by thesensor amplifier. The optimum value of the data is shown where thecurves cross. This data is memorized if the Auto Focus button is pressedin the Service Mode. When the customer uses the Auto Focus button thesystem will change the convergence data to receive the optimum value atthe A/D converter.
2501000
900
800
700
600
500
400
300
200
100
00 10 20 30 40 50 60
200
150
100
50
0
A
A
A + B
B
0.5mm
BV CENT
mes
rat
io
A/D
dat
a
mes_data0mes_data1mes_rati
main
YES
YES
NO NO
Initial settings
H.SIZE enlargement
Dark current measurement
G VCENT alignment, SKEW measurement
R VCENT, VSKEW alignment
B VCENT, VSKEW alignment
H.SIZE return & V SIZE enlargement
Dark current measurement
G HCENT, HSKEW alignment
R HCENT, HSKEW alignment
B HCENT, HSKEW alignment
VSIZE return
Did error occur? Was error first time?
Write alignment value in NVM Write user value in NVM
END
Flag clearAD timing, Pattern display position setting
xxvii
The flowchart on the previous page shows the sequence of operations forthe Auto Focus operation. The first operation is to set the initial settings.Then the H size is changed. This is done because the sensors are out-side of the screen. After the H size is enlarged, a dark current measure-ment is performed. This means that a reading of the sensors is takenwith output from the tube in order to establish a room brightness offset.This measurement is subtracted from the readings taken later. After theV centering and skew adjustments are performed for each color, the Hsize is returned to normal and the V size is enlarged. A dark currentmeasurement is taken again and then H centering and skew adjustmentsare done. When these adjustments are complete, V size is returned tonormal. If an error occurred, the process will be repeated. If the error isreturned a second time then an error code is given.
START
YES
YES
YES
NO
NO
NO
END
Measure 2V+2V
ROUGH STEP
ADJUST
CENTFINE STEP
ADJUST
SKEWFINE STEP
ADJUST
Measure 4V+4V
Measure 4V+4V
Did CENT & SKEW measurement exceed
center point?
4STEP change in CENT, SKEW
Did CENT measurement exceed center point?
1STEP change in CENT
Did SKEW measurement exceed center point?
1STEP change in SKEW
The flowchart below left shows the steps taken during the adjustmentportion of the previous flowchart. As these adjustments are performed,the convergence data values for centering and skew are changed foreach color. This data is measured until the data center point or optimumvalue is measured. When this point is reached the system moves on tothe next step. If an error occurs the cycle repeats. If an error occurs thesecond time then it puts an error code on the screen.
The error system works slightly differently in the Service Mode. If an erroroccurs while running Auto Focus in the Service Mode, an error will bedisplayed immediately instead of repeating the adjustment and displayingthe error when completely finished. An error like the one below shows thetype of error that would occur if the sensor 1 received a low output levelfor blue.
ERROR CODE 10
ERROR
SENSOR NUMBER
R. G. B
E 11 B E 11 B
* Error code will be displayed on center of screen for 3 seconds.
xxviii
The following table shows the errors that may occur. You should note here that if the green tube is replaced it is very important that the green yoke beplaced so there is no tilt. If it is not placed correctly, a repetitive “80” can occur.
* 60, 70 or 80 appears only in Service Mode.* In case of multiple error, last error is displayed.(EXAMPLE)11B : Left sensor Blue level low. (Left sensor circuit may be faulty.)61R : “ RED CENT H ” offset overflow. (“ PWM2 ” may be required adjusting.)
00 No Error10 Sensor Output Level Low * Check wiring, beam position, sensor.20 Sensor Output Level High * Check OP-amp circuit.30 Adjustment Loop Counter Overflow 0 : “ CENT V ”
1 : “ CENT H ”2 : “ SKEW V ”3 : “ SKEW H ”
40 Regi Data Overflow Same as Loop Counter Overflow50 Regi Data Overflow Same as Loop Counter Overflow60 Offset Overflow Same as Loop Counter Overflow
* Check beam position. If need, adjust “ PWM2 ” for H error,“ V CENT (main) for V error.
* “ PWM2 ” is usually 34 or 36.70 Offset Overdrow Same as Counter Overflow
* Check beam position. If need, adjust “ PWM2 ” for H error,“ V CENT (main) for V error.
80 Green “ V SKEW ” too tilt * Adjust Green beam righ or left sensopr, or Green DY tilt.
ERRORDISCRIPTION NOTECODE
[ERROR CODE LIST]
xxix
Circuit DescriptionThe sensor amplifier is responsible for taking the amount of light receivedby the sensors and outputting a DC value to the PJED CPU to representthe amount of light received. The optimal value achieved is memorizedduring the Auto Focus function in the Service Mode.
As the patterns of flashing light are seen on the screen, the outputs of thesensors are input to the A board at CN524, CN525 and CN501. Thesesensors are applied to IC1601 and IC1604. These ICs are current tovoltage converters. They are required because the sensors output a cur-rent proportional to the amount of light they receive.
The outputs from IC1601 and IC1604 are output to peak hold circuits.These circuits consist of IC1605 and IC1606 and buffer transistors Q1609through Q1616. To ensure precise measurements, each sensor also hasits own reset line that grounds the peak hold circuit every vertical blankingpulse. The top, left, right and bottom sensors’ outputs are applied directlyto the BD board. The four corner sensors are applied to a switch. Theswitch is necessary because the PJED CPU only has six A/D inputs. Sincewe do not need to use the corner left and right sensors at the same time,they are switched. Pulses from CN1701/12 from the BD board are re-sponsible for switching the sensors. The two sensors selected then havetheir outputs applied to the PJED CPU.
5
3
0
2
7
4
1
6
SCREEN
0 : UPPER SENSOR
1 : LEFT SENSOR
2 : RIGHT SENSOR
3 : LOWER SENSOR
4 : UL SENSOR
5 : UR SENSOR
6 : LL SENSOR
7 : LR SENSOR
The picture above shows the sensor locations by number. The followingare the formulas used to perform the centering and skew adjustments.
V Center = 1+2
V Skew = 1-2
H Center = 0+3+(1+2)/2
H Skew = 0-3+(4+5-6-7)/4
xxx
xxxi
BD Input
OverviewThe BD Input circuit is used to control the waveforms that will be output bythe BD Output circuit. It also controls the Auto Focus by generating anOSD signal and receiving the sensor’s input while adjusting the conver-gence data to vary the output waveforms. This circuit determines whatthe convergence data was when the optimal signal is received from thesensors.
Digital ConvergenceThis set uses Sony’s new digital convergence system. This system con-tains two types of adjustments. They are classified as rough and fineadjustments. These adjustments are done in the PJED mode of the Ser-vice Mode. This mode uses a built in pattern generator so the servicerdoes not need to carry one.
Rough AdjustmentsThe rough adjustments are just like some of the adjustments used in theprevious Sony projection sets. It uses the major adjustments in the oldsystem. The table below shows which adjustments are available for eachcolor in the rough mode.
SUB DEFLECTION ADJUSTMENT ITEMAdjustment O : Yes – : No
Display Adjustment itemAdjustment type
GH GV RH RV BH BV
CENT CENT O O O O O O
SKEW SKEW O – O O O O
SIZE SIZE O O O O O O
LIN LIN – – O – O –
KEY KEY – – – O – O
PIN PIN – O – O – O
Centering - Changing the centering control causes all of the horizontallines to move away from the center at the same rate. It is the first adjust-ment that should be made when aligning convergence.
Skew – Changing the skew data tilts the picture on its vertical or horizon-tal axis.
Size - The effect of the horizontal size control is to change the box widthfrom the center outwards.
Linearity - The linearity control changes the linearity or the width of theboxes on the left side of center as compared to the right. While changingthe linearity control, if the box width on the right side were getting smallerthe box width on the left side would be getting larger.
Key – The key control is used to adjust keystone distortion. It works bytilting the left side of the line towards the top while tilting the lines on theright side towards the bottom.
Pin – The pincushion control is used to adjust pincushion distortion out ofthe picture. Pincushion causes the top and bottom of the picture to bow inopposite directions.
Fine AdjustmentsOnce you have gotten the best picture you can by using the rough mode,you can adjust the rest of the picture using the fine mode. When the finemode is selected a cursor appears on the screen. This cursor can bemoved to anyone of 81 different points. These points are reached bymoving the cursor in steps around in the vortex pattern shown below. Allthe points are at intersections of the horizontal and vertical lines of theself-generated crosshatch pattern.
The cursor color can be changed to any of the three colors. When youadjust a point you select the point and the color of the cursor. Then byusing the joystick on the remote you can move the point inside the cursorup, down, left or right. You repeat this process for all the points that needto be adjusted.
xxxii
xxxiii
BD Output
OverviewThe BD Output takes the digital outputs from IC1707 Regi Correction andconverts them to analog signals which are then output from the BD boardto the Convergence Amps on the D board. (Not shown)
IC1707 Regi CorrectionIC1707 Regi Correction receives sync and data signals that allow it tooutput the correct waveforms to control the convergence of the three tubes.These signals are output in digital format along with BCLK (Bit Clock) andWCLK (Word Clock). The HBLK is output from IC1707/26 for use as acompensation signal for blue to reduce corner distortions. There are sixdigital data streams output from IC1707 Regi Correction to the D/A Con-verters.
The Red Vertical Output is input to IC719/14 RSI and IC715/14 RSI. Theanalog signals are output from pin 6 of each of these ICs. They arecombined and input to IC1705/2. IC1705 is a filter amplifier which willoutput the RV signal to CN523 on the A board.
The Red Horizontal Output is input to IC719/15 LSI and IC713/14 RSI.The analog signals are output from IC719/11 and IC713/6, combined andinput to IC1702/2. IC1702 is a filter amplifier outputs the RH signal toCN523 on the A board.
The Green Vertical Output is input to IC714/14 RSI and IC720/14 RSI.The analog signals are output from pin 6 of each of these ICs. They arecombined and input to IC1708/2. IC1708 is a filter amplifier which outputsthe GV signal to CN523 on the A board.
The Green Horizontal Output is input to IC714/15 LSI and IC720/15 LSI.The analog signals are output from IC714/11 and IC713/11. They arecombined and input to IC1706/2. IC1706 is a filter amplifier which outputsthe GH signal to CN523 on the A board.
The Blue Vertical Output is input to IC721/14 RSI and IC724/15 LSI. Theanalog signals are output from IC1721/6 and IC1724/11. These two sig-nals differ because the LRCK signal of IC1724 is not the WCLK as it is inIC1721. The different signal is used to compensate for corner distortionproblems. These different outputs are still combined and input to IC1710/2. IC1710 is a filter amplifier which outputs the BV signal to CN523 on theA board.
The Blue Horizontal Output is input to IC721/15 LSI and IC713/15 LSI.The analog signals are output from IC721/11 and IC713/11, combinedand input to IC1709/2. IC1709 is a filter amplifier which outputsx the BHsignal to CN523 on the A board.
xxxiv
xxxv
Convergence Out
OverviewThe Convergence Out circuit amplifies the horizontal and vertical conver-gence signals that are output by the BD Output circuit for each color. Thecircuit below shows the IC5005 Convergence Amp. IC5006 is anotherConvergence Amp. It is not shown here because its circuitry is identicalto the IC5005 circuit.
Regi MuteWhen the set is first turned ON, a Regi Mute signal is required becausethe BD board outputs a High signal from the six convergence outputs forthree seconds. If all Highs were output from the BD board simultaneously,it would probably result in a problem on the +/- 22 volt lines.
When the set is initially turned on, a LOW is output from the BD board tothe A board. The A board transfers this LOW through CN5011/8 to the Dboard. This LOW is applied to the base of Q5024, keeping it OFF. IfQ5024 is OFF, then Q5025 and Q5027 are also OFF. This causes IC5005/12 and 13 Mute to be 0 volts. This will mute IC5005 and it will not outputany signals. After three seconds the Regi Mute output will go HIGH. Thiscauses Q5024 to turn ON. This will cause Q5025 and Q5027 to turn ON.This places –19 volts on IC5005/12 and 13 which enables the outputs ofIC5005.
Convergence AmpIC5005 Convergence Amp contains three amplifiers. Each of these am-plifiers contains two inputs, a Non-inverting and Inverting, and one out-put. If we look at the first amplifier inside IC5005 we see that the verticalgreen signal is input to IC5005/4 Non-inverting Input. It is output fromIC5005/22 through PS5006 to the Green Vertical Sub Yoke. The signalpasses through the yoke and is returned to IC5005/5 Inverting Input viaR5017. The other two amplifiers in IC5005 work exactly like the circuitdescribed above.
xxxvi
APPENDIX 2
i
Model:KP-43T70, KP-46C70, KP-48S70, KP-48S72, KP-48V80, KP-53N74,KP-53S70, KP-53V80, KP-61S70, KP-61V80 No. 430
Subject: Dark Screen, Picture Is Barely Visible. Date: December 3, 1999
Symptom:(1321) The screen is extremely dark and the picture is barely visible. This symptom may be
caused by a defective Q801.
Solution: If the problem is caused by a defective Q801 replace it with a new type and changethe value of R830, R849, R850, and R851 as shown in the following table.
REF FORMER NEW
DESCRIPTION PART NUMBER DESCRIPTION PART NUMBER
Q801 TRANSISTOR,2SD601A
8-729-422-26 TRANSISTOR,DTC144EKA
8-729-027-59
R830 RESISTOR,100 OHM, CHIP
1-216-025-91 RESISTOR,470 OHM, CHIP
1-216-041-91
R849 RESISTOR,100 OHM, CHIP
1-216-025-91 RESISTOR,470 OHM, CHIP
1-216-041-91
R850 RESISTOR,100 OHM, CHIP
1-216-025-91 RESISTOR,470 OHM, CHIP
1-216-041-91
R851 RESISTOR,100 OHM, CHIP
1-216-025-91 RESISTOR,470 OHM, CHIP
1-216-041-91
See next page for A-board component mounting locations.
csv-1
Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: F. Medeiros PRINTED IN USA
ii
Q801
R830
R849
R851
R850
KP-43T70 Service Manual Page 83.KP-48V80 Service Manual Page 88.
A-board Mounting DiagramCoordinates J-2.
IC805
iii
Model: KP-43T70, KP-46C70, KP-48S70, KP-48S72KP-53N74, KP-53S70, KP-48V80, KP-53V80KP-61S70, KP-61V80, KP-53XBR200KP-61XBR200, KP-53XBR300
No. 440R1
Subject: Up Date of the NVM Jig Instruction ManualChassis List
Date: January 5, 2000
Symptom:(XXXX) If the need should arise that a circuit board needs to be replaced, It might contain an EEPROM. Ifthe EEPROM data is not written into the EEPROM of the replacement board all the service or customeradjustments will be lost.Example: Convergence adjustments. This will then require additional time to re-converge a projection TV.
DATA information retrieval is especially important for the models covered in the SAYS program, sincethe turn around time is of the utmost importance.
Solution: Please refer to the list below for the EEPROM used in the different chassis. Alsorefer to the NVM Instruction Manual for operating instructions.
CSV-1Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Rear ProjectionModels
Model ChassisType
CPUBoard
CPU Ref. # CPU Reset pin#
EEPROMIC Ref. #
DIPSwitch
#1
DIPSwitch
#2
DIPSwitch
#3
DIPSwitch #4
KWP-65HD1 DR-1 A IC1008 9 IC5703 ON OFF OFF OFFDR-1 A IC1008 9 IC1007 ON OFF OFF OFFDR-1 BD IC1703 9 IC1704 ON OFF OFF OFFDR-1 BM IC009 9 IC005 ON OFF OFF OFF
KP41T15 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP41T25 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP46S15 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP46S17 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP46S25 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP46V25 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP46V35 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP53S15 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP53S17 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP53S25 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP53V25 RA-1 M IC002 36 IC003 * OFF OFF OFF OFF
iv
Model ChassisType
CPUBoard
CPU Ref. # CPU Reset pin#
EEPROMIC Ref. #
DIPSwitch
#1
DIPSwitch
#2
DIPSwitch
#3
DIPSwitch #4
KP53V35 RA1 M IC002 36 IC003 * OFF OFF OFF OFFKP53XBR45 RA-1 AB IC7001 36 IC7003 OFF OFF OFF OFF
RA-1 M IC3000 36 IC3002 OFF OFF OFF OFFRA-1 X Not applicable Not applicable IC5004 OFF OFF ON ON
KP61V25 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP61V35 RA-1 M IC002 36 IC003 * OFF OFF OFF OFFKP61XBR48 RA-1 AB IC7001 36 IC7003 OFF OFF OFF OFF
RA-1 M IC3000 36 IC3002 OFF OFF OFF OFFRA-1 X Not applicable Not applicable IC5004 OFF OFF ON ON
KP46C36 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP41T35 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP41T65 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP46C65 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP48S35 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP48S65 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP48V45 RA-2 A IC001 15 IC007 OFF OFF OFF OFF
KP53S35 RA-2 A IC001 15 IC007 OFF OFF OFF OFF
KP53S65 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP53V45 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP61S35 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP61S65 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP61V45 RA-2 A IC001 15 IC007 OFF OFF OFF OFFKP48V75 RA-2A A IC001 15 IC007 OFF OFF OFF OFFKP53V75 RA-2A A IC001 15 IC007 OFF OFF OFF OFFKP61V75 RA-2A A IC001 15 IC007 OFF OFF OFF OFF
KP43T70 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP46C70 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP48S70 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP48S72 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP53N74 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP53S70 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP48V80 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP53V80 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
vModel Chassis
TypeCPU
BoardCPU Ref. # CPU Reset pin
#EEPROMIC Ref. #
DIPSwitch
#1
DIPSwitch
#2
DIPSwitch
#3
DIPSwitch #4
KP-61S70 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP61V80 RA-3 A IC002 12 (I OSC) IC004 OFF OFF OFF OFFRA-3 A IC805 55 (WR PROT) IC810 ON OFF ON ON
KP53XBR200 RA-4 A IC1008 55 (WR PROT) IC1007 OFF OFF ON ONRA-4 BM IC009 55 (WR PROT) IC005 OFF OFF ON ONRA-4 BD IC1703 55 (WR PROT) IC1704 ON OFF ON ON
KP61XBR200 RA-4 A IC1008 55 (WR PROT) IC1007 OFF OFF ON ONRA-4 BM IC009 55 (WR PROT) IC005 OFF OFF ON ONRA-4 BD IC1703 55 (WR PROT) IC1704 ON OFF ON ON
KP53XBR300 RA-4A A IC1008 55 (WR PROT) IC1007 OFF OFF ON ONRA-4A BM IC009 55 (WR PROT) IC005 OFF OFF ON ONRA-4A BD IC1703 55 (WR PROT) IC1704 ON OFF ON ON
*This model uses two EEPROM Ics (IC003 and IC005). Connecting the jig to IC003 will also read or write fromIC005 at the same time. They do not have to be read/written separately because they share common data andclock lines.
vi
Direct ViewModels
Model ChassisType
CPUBoard
CPURef. #
CPU Resetpin #
EEPROMIC Ref. #
DIPSwitch
#1
DIPSwitch
#2
DIPSwitch
#3
DIPSwitch
#4
KV27S10 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27S15 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27TS29 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27TS32 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27TS36 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27TW28 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27TW77 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27TW78 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27V10 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27V15 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27V55 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27XBR37 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32S10 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32S12 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32S15 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32S16 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32TS36 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32TS46 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32TW67 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32TW68 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32TW77 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32TW78 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32V15 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32V16 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV32XBR37 AA-1 M IC101 36 IC102 OFF OFF OFF OFFKV27XBR45 AA-1A M IC101 36 IC102 OFF OFF OFF OFFKV32XBR45 AA-1A M IC101 36 IC102 OFF OFF OFF OFFKV32XBR85 AA-1A M IC101 36 IC102 OFF OFF OFF OFFKV27S20 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV27S25 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV27S35 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV27V20 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV27V25 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV27V35 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV32S20 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV32S25 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV32S35 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV32TW25 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV32V25 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV32V35 AA-2 A IC001 15 IC002 OFF OFF OFF OFFKV3500 AA-2 A IC001 15 IC002 OFF OFF OFF OFF
viiModel Chassis
TypeCPU
BoardCPU
Ref. #CPU Reset
pin #EEPROMIC Ref. #
DIPSwitch
#1
DIPSwitch
#2
DIPSwitch
#3
DIPSwitch
#4KV27FV15 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV32FS10 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV32FV15 AA2W A IC001 15 IC002 OFF OFF OFF OFFKV32XBR250 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV36FS10 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV36FV15 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV36XBR250 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV13TR28 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13TR28 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13TR29 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13V50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13V50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20M10 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TR23 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TR23 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TS29 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TS29 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TS32 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TS50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20V50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20V50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13M10 BA-2 A IC101 30 IC102 OFF OFF OFF OFFKV20S10 BA-2 A IC101 30 IC102 OFF OFF OFF OFFKV20S11 BA-2 A IC101 30 IC102 OFF OFF OFF OFFKV13M20 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV13M30 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV13M31 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV20M20 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV20S20 BA3 A IC001 30 IC003 OFF OFF OFF OFF
viii
Model ChassisType
CPUBoard
CPURef. #
CPU Resetpin #
EEPROMIC Ref. #
DIPSwitch
#1
DIPSwitch
#2
DIPSwitch
#3
DIPSwitch
#4KV27FV15 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV32FS10 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV32FV15 AA2W A IC001 15 IC002 OFF OFF OFF OFFKV32XBR250 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV36FS10 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV36FV15 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV36XBR250 AA-2W A IC001 15 IC002 OFF OFF OFF OFFKV13TR28 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13TR28 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13TR29 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13V50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13V50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20M10 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TR23 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TR23 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TS29 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TS29 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TS32 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20TS50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20V50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV20V50 BA-1 A IC101 36 IC102 OFF OFF OFF OFFKV13M10 BA-2 A IC101 30 IC102 OFF OFF OFF OFFKV20S10 BA-2 A IC101 30 IC102 OFF OFF OFF OFFKV20S11 BA-2 A IC101 30 IC102 OFF OFF OFF OFFKV13M20 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV13M30 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV13M31 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV20M20 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV20S20 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV20S21 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV20S30 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV20V60 BA3 A IC001 30 IC003 OFF OFF OFF OFFKV13M40 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV13M50 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV13M51 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV20M40 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV20S40 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV20S41 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV20V80 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV27S40 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV27S45 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV27S65 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV27V40 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV27V45 BA-4 A IC001 30 IC003 OFF OFF OFF OFF
ixModel Chassis
TypeCPU
BoardCPU
Ref. #CPU Reset
pin #EEPROMIC Ref. #
DIPSwitch
#1
DIPSwitch
#2
DIPSwitch
#3
DIPSwitch
#4KV27V65 BA-4 A IC001 30 IC003 OFF OFF OFF OFFKV20FV10 BA-4C A IC001 30 IC003 OFF OFF OFF OFFKV24FV10 BA-4C A IC001 30 IC003 OFF OFF OFF OFFKV13M42 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV13M52 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV13M53 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV-20M42 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV20S42 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV20S43 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV27S42 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV27S46 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV27S66 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV27V42 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV27V66 BA-4D A IC001 30 IC003 OFF OFF OFF OFFKV9PT50 BN1 A IC101 36 IC102 OFF OFF OFF OFFKV9PT60 BN1 A IC101 36 IC102 OFF OFF OFF OFFKV13VM40 CN-141 MA IC1701 43 IC1705 OFF OFF ON ONKV13VM41 CN-141 MA IC1701 43 IC1705 OFF OFF ON ONKV20VM40 CN-141 MA IC1701 43 IC1705 OFF OFF ON ONKV20VS40 CN-141 MA IC1701 43 IC1705 OFF OFF ON ONKV32XBR100 DA1 AB IC7001 36 IC7003 OFF OFF OFF OFF
DA1 M IC0001 36 IC0004 OFF OFF OFF OFFDA1 X Not
applicable
Notapplicable
IC5004 OFF OFF ON ON
KW34HD1 HA-1 B IC3251 12 IC3252 OFF OFF OFF OFFHA-1 M & B IC3251 12 IC1304 OFF OFF OFF OFFHA-1 V IC527 30 IC526 OFF OFF OFF OFF
KV13VM20 None MA IC501 35 IC502 OFF OFF OFF OFFKV13VM21 None MA IC501 35 IC502 OFF OFF OFF OFFKV13VM30 None MA IC16 35 IC15 OFF OFF OFF OFFKV13VM31 None MA IC16 35 IC15 OFF OFF OFF OFFKV20VM20 None MA IC501 35 IC502 OFF OFF OFF OFFKV20VM30 None MA IC16 35 IC15 OFF OFF OFF OFF
x
Model: KV-27FV15, KV-32FS10, KV-36FS10KV-32FV15, KV-36FV15, KV-32XBR250KV-36XBR250
No. 441
Subject: S-Link, IR Headphone, OSD, and 3D CombFilter Mis-Operation
Date: November 22, 1999
Symptom:(172X) The following Symptoms may occur:
1. S-LinK: When the TV detects the S-Link signal in stand-by mode. TV issupposed to automatically turn on and select appropriate video input. It does turnon, but it does not select the appropriate input.
2. OSD: When customer tries to enter password for V-chip in Spanish menu,customer will see additional unnecessary letters Pr preceding correct OSD.
3. IR Headphone: In XBR models only. When customer swaps audio of mainpicture and PIP picture, customer can hear the audio of PIP picture even when itis supposed to be blocked.
4. 3D Comb Filter: In XBR model only, when customer changes video input from Sto composite, customer can see a Black & White picture, less than one second,then color returns.
Solution: If the customer should complain of the following symptoms please do the following:
27 inch models:
1. In the service Mode record on paper the following register information in both RF & Video mode:VP SHUE RF Data ______ Video Data:_______VP SCOL RF Data_______ Video Data:________VP SSHP RF Data_______ Video Data_________
2. 1) Replace the CPU (IC001)2) Enter the service Mode using the remote. Then press 8 then Enter. This will reset the CPU, turning the set off then back on automatically.3) Re-enter the Service Mode.4) In the RF mode replace the data in the SHUE, SCOL, & SSHP with the recorded data from the original CPU.5) In the Video mode replace the data in the SHUE, SCOL, & SSHP with the recorded data from the original CPU.6) Change the Data of ID7 from 0 to 2.7) Write the new data into the CPU using the remote press the Mute then Enter key.
32/36 Non XBR Models:
csv-1
Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: Uchida, K. PRINTED IN USA
xi32/36 Non XBR Models:
1. In the service Mode record on paper the following register information in both RF & Video mode:VP SSHP RF Data ______ Video Data:_______DA 2COL RF Data ______ Video Data:_______DA 2SHU RF Data ______ Video Data:________
2. 1) Replace the CPU (IC001)2) Enter the service Mode using the remote. Then press “8” then “Enter.” This will reset the CPU, turning the set off then back on automatically.3) Re-enter the Service Mode.4) In the RF mode replace the data in the 2SHU, 2COL, & SSHP with the recorded data from the original CPU.5) In the Video mode replace the data in the 2SHU, 2COL, & SSHP with the recorded data from the original CPU.6) Change the Data of ID7 from 0 to 2.7) Write the new data into the CPU using the remote press the “Mute” then “Enter” key.
32/36 XBR models:
1. In the service Mode record on paper the following register information in both RF & Video mode:VP SSHP RF Data ______ Video Data:_______DA 2COL RF Data ______ Video Data:_______DA 2SHU RF Data ______ Video Data:_______
2. 1) Replace the CPU (IC001)2) Enter the service Mode using the remote. Then press “8” then “Enter.” This will reset the CPU, turning the set off then back on automatically.3) Re-enter the Service Mode.4) In the RF mode replace the data in the 2SHU, 2COL, & SSHP with the recorded data from the original CPU.5) In the Video mode replace the data in the 2SHU, 2COL, & SSHP with the recorded data from the original CPU.6) Change the Data of ID7 from 9 to 11.7) Write the new data into the CPU using the remote press the “Mute” then “Enter” key.
Model Ref Former New Part Number
KV-27FV15 IC001 CXP85856A-029S CXP85856A-035S 8-752-911-19
KV-32FS10 IC001 CXP85856A-024Q CXP85856A-035S 8-752-911-19
KV-36FS10 IC001 CXP85856A-024Q CXP85856A-035S 8-752-911-19
KV-32FV15 IC001 CXP85856A-024Q CXP85856A-035S 8-752-911-19
KV-36FV15 IC001 CXP85856A-024Q CXP85856A-035S 8-752-911-19
KV-32XBR250
IC001 CXP85856A-024Q CXP85856A-035S 8-752-911-19
KV-36XBR250
IC001 CXP85856A-024Q CXP85856A-035S 8-752-911-19
xii
Model: KP-53XBR300, KP-61XBR300No. 442
Subject: Picture Blinks Or Jitters Briefly; "VIDEO 5"And "DTV FORMAT: 480p" OR "DTV FORMAT:1080i" Appears On The Screen.
Date: December 1, 1999
Symptom:(F310) While watching a progressive-scan (480p) DVD movie through the Video 5 input, the
picture blinks or jitters briefly, and the on-screen display shows "VIDEO 5" in the topleft corner and "480p" in the bottom left corner. The problem is most likely to occurwhen large changes in brightness occur suddenly. A 1080i signal input to the Video 5input might also cause this problem to occur, and the bottom left corner would show"DTV FORMAT: 1080i".
Solution: If the customer complains of this problem, change the value of R600 and R698 on theA-board as shown in the following table.
REF FORMER NEW
DESCRIPTION PART NUMBER DESCRIPTION PART NUMBER
R600 RESISTOR,CHIP,
470 OHM
1-216-041-91 RESISTOR,CHIP,
1K
1-216-049-91
R698 RESISTOR,CHIP,
1K
1-216-049-91 RESISTOR,CHIP,4.7K
1-216-065-91
csv-1
Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: F. Medeiros-PJA PRINTED IN USA
IC511
Q552 R600
R698
A-board Mounting DiagramService manual page 86,coordinates E-9 (shownhere rotated -180°)
xiii
Model: KP-43T70, KP-46C70, KP-48S70, KP-48S72KP-48V80, KP-53N74, KP-53S70, KP-53V80KP-61S70, KP-61V80
No. 443
Subject: Bright Picture Followed By Shut-down.Q706, Q733, Or Q764 May Be Damaged.
Date: December 1, 1999
Symptom:(1322) The picture goes bright then the set shuts-down.
Solution: If the customer should complain of the symptom above please replace three sparkgaps with the new type below. The CR, CG, and CB board might have one or moreof the following transistors fail: Q706, Q733, or Q764, so check them and replace anythat are found to be defective.
REF FORMER NEW
DESCRIPTION PARTNUMBER
DESCRIPTION PART NUMBER
SG702(CR BOARD)
SPARK GAP 1-519-422-11 SPARK GAP 1-517-729-31
SG732(CG BOARD)
SPARK GAP 1-519-422-11 SPARK GAP 1-517-729-31
SG762(CB BOARD)
SPARK GAP 1-519-422-11 SPARK GAP 1-517-729-31
Q706(CR BOARD)
TRANSISTOR,2SA1091-O
8-729-200-17 SAME ASFORMER PART
Q733(CG BOARD)
TRANSISTOR,2SA1091-O
8-729-200-17 SAME ASFORMER PART
Q764(CB BOARD)
TRANSISTOR,2SA1091-O
8-729-200-17 SAME ASFORMER PART
csv-1
Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: h. Iguchi PRINTED IN USA
xiv
Model: KP-43T70, KP-46C70, KP-48S70KP-48S72, KP-53N74, KP-53S70, KP-61S70 No. 446R1
Subject: Part Number CorrectionReference No. 253, 254, 255
Date: January 18, 2000
Symptom:(xxxx) The CRT part number listed on pages 106 and 130 of the Service Manual for Ref #
253, 254, and 255 is incorrect.
Solution: Please note the correct part number as shown below.
MODELS REF DESCRIPTION PART NUMBER
INCORRECT CORRECT
43T7046C70
253254255
CRT (R)CRT (G)CRT (B)
8-733-571-158-733-570-158-733-574-15
8-733-571-058-733-570-058-733-574-05
48S7048S72
253254255
CRT (R)CRT (G)CRT (B)
8-733-572-158-733-570-158-733-575-15
8-733-572-058-733-570-058-733-575-05
53S70S/N
90XXX.
253254255
CRT (R)CRT (G)CRT (B)
A-1501-526-AA-1501-522-AA-1501-527-A
53S70S/N
95XXX
253254255
CRT (R)CRT (G)CRT (B)
8-733-572-058-733-570-058-733-575-05
53N74 253254255
CRT (R)CRT (G)CRT (B)
8-733-572-158-733-570-158-733-575-15
8-733-572-058-733-570-058-733-575-05
61S70 253254255
CRT (R)CRT (G)CRT (B)
8-733-573-158-733-570-158-733-576-15
8-733-573-058-733-570-058-733-576-05
Note: Two types of CRTs are used in the KP-53S70. These CRT are not interchangeable.The CRT used will depend on the serial number. If the serial number begins with 90then use the P/N beginning with A . If the serial number begins with 95 then use theCRT P/N beginning with 8 .
csv-1Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: FPR-U1675 PRINTED IN USA
xv
Model: KP-43T70, KP-46C70, KP-48S70, KP-48S72KP-53N74, KP-53S70, KP-48V80, KP-53V80KP-61S70, KP-61V80, KP-53XBR200KP-61XBR200, KP-53XBR300
No. 449
Subject: NVM User Manual Rev.2 Date: January 20, 2000
Symptom:(xxxx) The NVM Jig User Manual was updated, to Revision 2.
Solution: Revision 2 of the NVM Manual is below. This Non Volatile Memory jig allows theservicer to read and write adjustment information from an EEPROM. This isespecially useful when a board from a projection TV containing the convergenceinformation is replaced. If the memory chip is not changed or read the entire unitwould have to be re-converged from scratch.
The part number for the NVM Jig is T-935-010-91 (List price is $160.00)
HARDWARE
Green LED: Read light indicator
Yellow LED: Write light indicator
Red LED: Power light indicator
Read Switch: Toggle push button Switch for Reading from Target NVM
Write Switch: Toggle push button Switch for Writing to Target NVM
Toggle switch: Power switch
Connector: RJ45 connector for both the SOIC and DIP cables
Test clip provided for connection to the RST pin on the Microcontroller.
9VB: 9 Volt Battery
SOIC Connector: For use with NVM chips that are Surface Mount
DIP Connector: For use with NVM chips that are Through Hole.
CSV-1Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: M. Strum PRINTED IN USA
xvi
SETTING THE DIP SWITCH
Pins 1 and 2 will be dedicated to selecting between RA-4 XBR models and all other models due to NVM differ-ences.
Pins 3 and 4 will be dedicated to allowing pull up resistors for the target NVM chip if the chip is not getting poweron board.
There are diagrams for these selections located on page 5 of this manual.
CONNECTION TO THE NVM CHIP
For the prototype, the following color wires should be connected to the following pins:
PIN1 A0 BLUE/WHITEPIN2 A1 BLUEPIN3 A2 GROUNDING WIRE FOR RESET PINPIN4 GND ORANGE/WHITEPIN5 SDA BROWN/WHITEPIN6 SCL BROWNPIN7 WP GREENPIN8 VCC GREEN/WHITE
Plug in bus connector headshell and select first bus by moving switch in the up position, second bus is selected byplacing switch in the down position. +5 volts and gnd are supplied by the jig for power and signal setting purposes.
PLEASE NOTE:
Power and GND are provided from the JIG.
The RESET pin on the Microcontroller will need to be tied LOW. A test clip is provided on the connector for thispurpose.
There is a special note at the end of the manual for RA-3 suffix 12 & 13, RA-4 XBR models.
The READ and WRITE should take only a maximum of 12 seconds.
The RA-4 XBR BD Board will take approximately 10 Seconds.
READ
To read from the NVM chip on the original board, clip the test clip to the NVM chip and pressthe read key. The NVM JIG will read contents of the original memory and program the JIGmemory with this information, the read (green) LED will then light up until the next key press.
xviiWRITE
To write to the new board, after reading from the original board, clip the test clip to the newNVM chip and press the write key once. When the JIG has completed the write, the yellowLED will light.
ERROR INDICATION
If the JIG encounters a problem with communication to the NVM chip (i.e. noacknowledgement on the line that a chip is there), the power LED will blink.
If there is an error indication ensure that the connector is attached properly.
That the Microprocessor on the board is disabled.
Try added or subtracting the pullup resistors on pins 3 and 4 of the DIP switch.
Turn the unit on and then back off again and try reading again.
♦ This error will occur when the NVM has not acknowledged any of the addresses for ourNVMs. These addresses range from A0 hex to AE hex.
♦ When communication has been interrupted between the JIG and NVM
♦ And when the data does not compare properly between the JIG and Target NVM.
AFTER GETTING AN ERROR INDICATION
Press one of the keys once for a duration of approximately second. This will take you out ofthe blinking RED LED mode and a solid RED LED will again light. At this point you are back atthe starting point and may press either Write or Read buttons.
POWER DOWN
If the unit is powered for a period of time equal or greater than 5 minutes the JIG will powerdown. By turning the unit off and then back on again, you may restart your process.
xviii
DIP SWITCH
1 AND 2 designated for XBR toggle.
3 AND 4 designated for pull up resistors connected with the I2C lines.
SHIP TO MODE DIP (Regular NVM mode, NO pullups)
RA-4 XBR BD board NVM MODE, PULLUPS
REGULAR NVM MODE, PULLUPS FOR BOTH SCL AND SDAThis option will be needed for A board and BM board on RA-4 XBR.As well as for NVMs on earlier models that require pullups.
NOTES
If you press either key the software will start the process of either writing or reading.
RA-4 XBR OPTIONS
With the RA4 you will need to ground the WP lines.
BD Board pin 55 IC1703 PJED-CPU
A Board pin 55 IC1008 Main CPU
BM Board Grounding 55 IC1009
Pull ups will be needed with the RA-4 model on all boards. There are no pullups closeto the NVM chip on any of the boards.
On earlier models of Rear Projection you will still need to Ground the RESETline of the Microcontrollers.
1 2 3 4
OFF OFF OFF OFF
1 2 3 4
ON OFF ON ON
1 2 3 4
OFF OFF ON ON
xixRA-3 suffix 12 & 13 OPTIONS
With the RA3 PJED NVM you will need to ground the WP line pin 55 IC805 PJED-CPU andsupply +5 from the NVM reader/writer to pin 41 and 58 IC805 PJED-CPU.
With the RA3 Main CPU NVM you will need to ground the CPU crystal pin 12 IC002 MainCPU. Also it will be necessary to use the NVM reader/writer +5 supply for +5 standby pin 41IC002 Main CPU.
xx
Model: KP-53N74, KP-53S70, KP-61S70No. 451
Subject: Reference Numbers Are Pointing To TheWrong Screens
Date: January 5, 2000
Symptom:(XXXX) The reference numbers 102, 103, and 104 on page 103 of the Service Manual are
pointing to the wrong screens.
Solution: Please see the table below for the correct screen Ref., Description, and Part Number.
Model Ref. Description Part Number
KP-53N74 102 Contrast Screen 4-071-582-11
KP-53N74KP-53S70
103 Fresnel Screen 4-070-602-01
KP-61S70 103 Fresnel Screen 4-066-082-01
KP-53N74 104 Lenticular Screen 4-064-343-11
KP-53S70 104 Lenticular Screen 4-063-555-01
KP-61S70 104 Lenticular Screen 4-070-283-01
csv-1
Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: FPR-U1759 PRINTED IN USA
xxi
Model: KP-46C70, KP-48S70, KP-48S72No. 453
Subject: Reference Numbers Are Pointing To TheWrong Screens
Date: January 5, 2000
Symptom:(XXXX) The reference numbers 52, 53, and 54 on page 102 of the Service Manual are
pointing to the wrong screens.
Solution: Please see the table below for the correct screen Ref., Description, and Part Number.
Model Ref. Description Part Number
KP-48S72 52 Contrast Screen 4-064-651-01
KP-46C70 53 Fresnel Screen 4-057-324-02
KP-48S70KP-48S72
53 Fresnel Screen 4-058-455-02
KP-46C70 54 Lenticular Screen 4-063-603-01
KP-48S70 54 Lenticular Screen 4-063-566-01
KP-48S72 54 Lenticular Screen 4-070-235-01
csv-1
Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: FPR-U1759 PRINTED IN USA
xxii
Model: KP-43T70 No. 454Subject: Reference Numbers Are Pointing To The
Wrong ScreensDate: January 6, 2000
Symptom:(XXXX) The reference numbers 2, 3, and 4 on page 101 of the Service Manual are pointing to
the wrong screens.
Solution: Please see the table below for the correct screen Ref., Description, and Part Number.
Model Ref. Description Part Number
KP-43T70 2 Contrast Screen 4-070-286-01
KP-43T70 3 Fresnel Screen 4-070-285-11
KP-43T70 4 Lenticular Screen 4-070-284-11
CSV-1Sony Service CompanyNational Technical ServicesA Division of Sony Electronics Inc.Park Ridge, New Jersey 07656
CONFIDENTIALService BulletinTV Products
SONY
Reference: FPR-U1759 PRINTED IN USA
