Trends in Development of Breakthrough Technologies in 2001-2010, Investment Volumes

8/14/2019 Trends in Development of Breakthrough Technologies in 2001-2010, Investment Volumes

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2004

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Trends in development of breakthrough technologies in 2001-2010,investment volumes for their implementation and market capacity forecast

Investments,KK USD

1,2-0,8 0,8-0,5 0,5-0,35 0,35-0,252001-2003 2004-2005 2006-2007 2008-2010

INVESTMENTS, TARGET ACCORDING TO THE GOVERNMENT

PROGRAM (197,8 KK USD)

INVESTMENTS, REAL AND EXPECTED (197,8 KK USD)

MARKET CAPACITY, billion USD

Market capacity,billion USD

210

500

450

400

350300

250

200

150

100

50

0

100

90

80

70

60

50

40

30

20

10

0

85

23

78

2620

53

315

15

95405

122


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2004

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Design rules for semiconductor products and sales share in

the world market

90%

90%

70%

40%

30%

20%

20%

10%

10%

30%

60%

70%

80%

80%

0 20 40 60 80 100

1

>1


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2004

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Life cycle ofmicroelectronicproducts

Salesvolumes

25-40% 15-25% below 10%

Lifecyclestages

drop2-3years

maturity3-5 years

growth1 year

Introduction1-2 years

research,design/development

Introduction

Costs

Fundamentalinvestigation,design andresearch

EquipmentTechnologiesProducts

Profitability

PRODUCTION

World tendency in the

market development

depending on minimal

design rules

Minimal size of

element

Production volumes

in years, $x109


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2004

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What do we know about our

competitors

Started in 1990

200 mm 9 factories150 mm 10 factories125 mm 4 factories100 mm 5 factoriesTotal: 28 factories

Assembly

IC production 10 companies

(Motorola, AMP, Fairchild, Hitachi, IRM, Lute, NEC,

Samsung, Sony, ST, Toshiba)

in 6 cities (Suzhou, Shanghai, Tiaujin, Beijing, Wuxi,Shenzhen)

1.2 kk USD in 2003, and 15.35 kk USD by 2010, that made

44% of the world output

China

SMIC 1300 K w/year 11 K w/year

Grace 1000 K w/year 83 K w/year

Hua Hay NEC 700 K w/year 58 K w/year

Otres 400 K w/year 92 K w/year

Total 4100 K w/year 340 K w/year

Production

volumes


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5What do we know about our

competitors

RUSSIA

Estimated market capacity -

500-800 kk USD

Integrals ICs6-9%

Domestic ICs

10-15%

Russian ICs

Import ICs

Joint-stock company Angstrem

Manufacturing capacities :

- CMOS, BiCMOS and MOS ICs with 1.5-2.0 m design rules on

100 mm wafers,

- LSI and VLSI on CMOS and BiCMOS technologies with 0.8 - 1.2

m design rules on 150 mm wafers.

Perspective - project FAB-2: production of ICs with 0.25-0.35m

design rules on 200 mm wafers.

Joint-stock company Micron

Manufacturing capacities :

- IC on CMOS, BiCMOS and MOS technologies with 1.5-

2.0 m design rules on 100 mm wafers

Perspective - project Set up of modern fabs for

production of competitive microelectronic products

based on advanced technologies" : wafer fabs with 0.5-

0.35 m design rules on 200 mm wafers

Research Institution of System

Analysis of the Russian Academy ofScience

Research Institution of System Analysis of the Russian

Academy of Science has the capacities for production of

ICs with 0.35 m design rules on 150 mm wafers with

up to 500 w/month output)


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Our advantages

over competitors

orientation to development of several basic technological processes (CMOS, bipolar,BiCMOS) and not to one or two processes as usually

clean technological module for production of ICs with 0.8 m design rules

design center (Belmicrosystems Design Center) equipped with modern design anddevelopment equipment and able to develop ICs and technological processes with submicron

design rules

reserve and experience in basic technological operations based on fundamental researches

cheap skilled labor and specialists

certification of Quality System for compliance with the requirements of InternationalStandards ISO 9000

cheap land and energy

favorable tax policy


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Problem description

Morally and physically obsolete equipment

Low efficiency

Limited technological potentials

Reduction of occupied market segment

Necessity of engineering infrastructure and clean rooms for0.35 m design rules.

Setting up the production of ICs with 0.35 m design rules.

Results

Solutions


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Project realization

Project constituents:Production line modernization (engineering structures,

clean rooms, etc.);

Technology transfer (route, list of technological

operations, list of equipment, technical requirements forVLSI design/development);

Delivery of set of special process and check and

measurement equipment;

Personnel trainingProduction set up


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1. Selection of silicon VLSI BiCMOS type with 0,5 m design rules.

2. Determination of the minimal required and sufficient list of

technological operations.3. Determination of the minimal required and sufficient list of specialprocess equipment and check and measurement equipment.

4. The same items like items1,2,3, but for VLSI CMOS with 0,35 m designrules.

5. Purchasing special process equipment and check and measurementequipment.

6. Delivery, installation and start-up of special process equipment andcheck and measurement equipment.

7. Preparation of Module 7 clean rooms.

8. Appraisal of Module 7:constructions: walls, ceilings, floors,vibrocharacterization,air preparation: conditioners, filters, recycle system, inspection,control and monitoring system,water preparation: DI water, recycled water, drinking water, etc.

drains, cleaning system,gas,power,vacuum,Totally 20 power supply units of REM factory.

9. Development and implementation of basic technology.

10. Design/development and manufacture of products.

11. Selection and training of personnel.

12. Promotion of products in the market.

Problems to be solved for the objective achievement


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Project realization options

A Li


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DEVELOPMENT OF NEW TECHNOLOGIES development of technologies by own means

100% cost (20,6 kk USD) 100% development duration (57 months)purchasing the unlicensed technology from a group of foreign specialists under a special contract

107% cost (22 kk USD) 46% development duration (26 months)

OptionsActions1. Financial and technical agreement2. Technology transfer2. Development of a preliminary route, list of operations,set of equipment

4. IC design and foundry-orders for pilot lots

3. Purchase and delivery of the equipment set4. Installation, start-up, acceptance according to OEMs

specification

5. Personnel training during technological operations

6. Development of test matrix design and technology

7. Test matrix production production line technological

start-up

8. Research, analysis, extraction of spice parameters of test

matrix element base

9. Development of structure and technology of the 1 st IC

10. Manufacture of engineering lot of the 1 st IC

11. Research, analysis, extraction of spice parameters of

commercial IC element base, structure and technology

correction (iteration 1)

12. Manufacture of commercial IC engineering lot

13. Commercial IC testing (3000 h)

14. Testing at customers site (23000 h)

15. Start-up of premass (mass)production

0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60

Loan repayment start Loan repayment start

1 2 3 4

1 purchasing the technological process: description,

route, design rules,spice-parameters2 technological process

preparation3 introduction and testing4 technological support


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Full Process Transfer Schedule

1. Finalization of technicalannex

2.Transfer of documentation

3.Equipment procurement

4.Personnel training

5.Design of transfer vehicle

6.Validation of process steps

7.Validation of modules

8.Full process integrationProcess Acceptance

9.Transfer support +aftercare

Activity Preparation phase Implementationphase

partner

Integral

partner

partner Integral

Integral + partner

Integral

Transfer support Aftercare

Ramp-up

Integral + partner

Integral + partner


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1. Appraisal of Module 7 and Module 8 clean rooms and utilities made by

Siemens Industrial Building Consultants GmbH:

the possibility of setting up the production on CMOS technology with

0.35 m design rule was confirmed;

the complete list of works aimed at modernization of engineering

systems, including the clean rooms construction, equipment and utilitieswas determined;

the cost of works for Module 7 and Module 8 was evaluated.

2. The appraisal of financial and economical status of State-owned

enterprise Semiconductor devices Factory as for 01.10.2003 was made

by Joint-stock company CONSULTAUDIT:

financial and economical status of the enterprise is considered to besatisfactory;

in general the enterprise is solvent and financially stable.

EXTERNAL APPRAISAL OF THE PROJECT


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REQUIRED SPECIAL PROCESS EQUIPMENT

/ Operation E quipm ent type Com pany, country

Number of

equipmentunits Unit price, k $ Cost, k $

1 P ho to li th og r ap hy

1.1 Coat/develop D N S80A D ainnipponscreen,Japan 1 588 588

1.2 Step/align N SR 2205i14E2 Nikon, Japan 1 1450 1450

2 P la sm a e tc h

2.1 Nitride, Poly etch TCP 9400 LamResearch,USA 1 400 400

2 .2 P la sm aasher M A TR IX 1108 M atrix,USA 1 300 300

2.3 Oxide etch TCP 9500 LamResearch,USA 2 450 900

2.4 M etal etch TCP 9600 LamResearch,USA 2 500 1000

3 I mp la nt at io n Precision 9500xR AppliedMaterials,USA 1 1000 1000

4 O xida tion, diffusion, anneal Alpha 8S TEL,Japan 7 250 1750

5 RTP AG 8800 M etron Technology, USA 1 180 1806 M e ta l s pu tt er in g

6.1 Conductive and barrier layers sputteringAM TEndura 5500 AppliedMaterials,USA 1 700 700

6.2 W-CV D andetchback P-5000 AppliedMaterials,USA 1 800 800

7 D ep ositio n

7.1 Nitride LPCV D Alpha 8S TEL,Japan 1 250 250

7.2 Poly LPC VD Alpha 8S TEL,Japan 1 250 250

7.3 BPSG deposition W J TEO S 999 W atkins-JonsonCompany,U SA 1 200 200

8

8.1 RCA cleaning FSIM ercury M P FSIInternational,U SA 1 400 4008.2 Etchin g, nitridestripping DN S W S820 D ainnipponscreen,Japan 1 300 300

8.3 Photoresist stripping FSIM ercury M P FSIInternational,U SA 1 400 400

8.4 PERP stripping/organic SST Semitool,Great Britain 1 400 400

A mount 27 11268

Equipment type, producer and the equipment cost shall be clarified while signing the contract


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REQUIRED CHECK AND MEASUREMENT EQUIPMENT

1.

Wafer inspection (f2. Dimension control (Equipment type, producer and the equipment cost shall be clarified while signing the contract


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Our potentials

200 mm 5000 wafers/month150 mm 7500 wafers/month100 mm 50000 wafers/month

Total:10500 wafers/month

All factories of Integral"

200 mm wafers


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2004

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Economics

Market of State-owned Enterprise

Semiconductor Devices Factory

telecommunications - 1.37 kk USD/year (India)

watch/clock and melody IC (the year 2005) - 6-8 kk USD/year

calculator IC - 2-3 kk USD/year

analog, logic ICs, microcontrollers, memory ICs sales activation and

market expansion

computer IC restoring the relations with the companies of Russian defense

establishments, obtaining the status of independent supplier of specific ICs

according to own technical specifications

net income shall make 11 - 15 kk USD

net profit makes 5 - 6 kk USD


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Forecast of financial and economic activity

Project realization will allow to speed up the turnover of floating assets of the

company by 41 day. The total growth of net floating assets will make 14845 k USD

(including current activity of the company - 275 k USD in 2004 at the cost of the

project realization in the period from 2005 till 2011 - 14507 k USD).

Except the growth of net floating capital the own funding sources are as follows:

accumulated depreciation fund makes 4638 k USD and the current depreciation in

2004 makes 1158 k USD ( 204 k USD will be spent for the project realization in 2005) .

Reserve resource of own funds for the project realization means demand balance on

bank accounts of the company on 01.01.2004 to the sum of 42 k USD.

The sum of net income (net profit + depreciation) within the period involved will

increase from 2469 k USD in 2004 up to 13110 k USD in 2001.The project can be realized, since the sum of accumulated money balance is positive

for every year of the project realization. The total sum of the accumulated balance

will make 17024 k USD with the growth in 2011.


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..

2003 2004 2005 2006 2007 2008 2009 2010 2011 2012

1. . -

2.

3.

.$ 132384. , ,, ,-

5. -,

, .$:

.$ 120006.

.$ 7200 1440 1440 1412 1243 915 555 195 -7.

. $ 12000 500 2500 3000 3000 3000 -8.

1.Making decision.

Business plan development

2.Development the

required equipment and

suppliers

3. Preparation of the area

for the equipment

installation

4. Purchasing and deliveryof the equipment, customs

payment, installation

5. Developing of production

capabilities, increase of

production capacities

6. Obtaining the loan

7. Loan interest repayment

8. Loan repayment

K

K

K

K

Schedule of the project realizationStages of the project

realisation

Mes.

unitTotal

Total, Mil.$


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2004

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" 200 0.5 (1000./ ) 0.35 (1000./ )"

1 21 2 3 4 5 6 7 8 9 10 11 12 1 2 3

1

1.1 1.2 1.3 . 1.4 SPICE-1.5 1.6 1.7 " "1.8 " "

2

2.1 2.2

2.3 2.4 2.5

3

4

4.1 4.2 4.3 4.4

5

6 7, 8 , 9 101112 13

Projectschedule Setting up a production line of CMOS IC on 200 mm wafers with 0.5 m design rule (4000 wafers/month)and pilot line of CMOS IC with 0.35 m design rule (1000 wafers/month)

1. Technology transfer

1.1 Process flow transfer1.2 Equipment set transfer

1.3 Technical documentation transfer

1.4 SPICE parameters transfer

1.5 Design rules transfer

1.6 Training provided by the supplier

1.7 Technology transfer kit translation

1.8 Technology transfer kit study

2. Equipment purchase2.1 Contract signing

2.2 Transportation

2.3 Installation2.4 Start up

2.5 Personnel training on operations of equipment

3. English language courses

4. Module 7 construction and upgrading4.1 Foundation

4.2 DI water

4.3 Gases

4.4 Microclimate

5. Purchase of wafers for equipment start up

6. Purchase of spare parts7. Selection of IC, technical specs for design

8. Development of technology and construction

9. Technical start up of the process stages

10. Formation of the blocks

11. Formation of the whole route

12. Pilot lot start up

13. Making the reticles


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, . .

0

2000

4000

6000

8000

10000

12000

14000

2004 2005 2006 2007 2008 2009 2010 2011 2012

..

1. -

2.

Expenditures schedule, K$

1. Own means - total2. Foreign loans from commercial bancs

Years

K$


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,

. USD

0

2000

4000

6000

8000

10000

12000

14000

16000

2005 2006 2007 2008 2009 2010 2011 2012

.

US

Debts repayment at state -owned enterprise semiconductor Devices Factory, K$

Primary debt sum

Loan debt

Interest and primary debt sum

Interest and primary debt repayments

Primary debt repayments

Years

K$


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Questions

Documents

Trends in Development of Breakthrough Technologies in 2001-2010, Investment Volumes