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Digital Building Blocks
Lecture 8 review:
• Step function input to RC first-order circuits
• R-L first-order circuits
• Close/open switch in first order circuits
• Rectangular pulse input to first order circuits
Today: (13)
• Digital Building Blocks
• Logic Blocks
• Flips-Flips
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Transients in First Order Circuits
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Several Rules with Circuits• Rule 1
– The voltage across a capacitor cannot change instantaneously– i = C dv/dt
• Rule 2– The current through an inductor cannot change instantaneously– v = L di/dt
• Rule 3– In the dc steady state the current through a capacitor is zero.
• Rule 4– In the dc steady state the voltage across an inductor is zero.
Quantity that cannot be discontinuous voltage currentQuantity that is zero in the dc steady state current voltage
C L In summary:
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Transient of first order circuits (FOC)
• Step response ofR-L or R-C circuits?• General form of the response:
Vout(t)= A + Be-t/τ
for t>0
where A and B aresome constants, τ isthe time constant depends
on the value of R-L or R-C.
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RC circuits• Find the transient (step) response of the RC circuit as shown
v1(t) = 0 for t<0 = V for t >0
Write nodal equation (KCL) at the + terminal:
�GW
GY����YRXW� =−−
&5
WYWRXW
���
���
GW
GY�
RXWWY
5&WY
5&RXW
=+Which can be rewritten as:
Recall the solution will have the form: τW
RXW%H$WY
−+=��
Can substitute (2) into (1) and determine A and B and τ
(1)
(2)
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RC Circuits (continue)
95&
H5&
%
5&
$H
WW �% �� =++− −− ττ
τ
���
���
GW
GY�
RXWWY
5&WY
5&RXW
=+
τW
RXW%H$WY
−+=��Substitute
into
becomes (let v1(t)=V, for t>0)
Can be rewritten as: �% � =
−+
− − τ
τW
H5&
%
5&
9
5&
$
Which can be satisfied if: �=
−
5&
9
5&
$ �� =
− − τ
τW
H%
5&
%
and
9$ = 5&=τ τW
RXW%H$WY
−+=��B=? Use
Recall rule 1(voltage can not change instantaneously):
�������
�
=−=+=+=+−
RXWRXWY%$%H$Y τ ⇒B=-A
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RC Circuits (continue)
5&
W
RXW9H9WY
−−=��
����� 5&
W
RXWH9WY
−−=
Notice the second termstarts from V and exponentially decay to 0.It will never reach 0, butapproach to 0 asymptotically.
As a result, vout starts from 0 and asymptotically approachto V.
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THE BASIC INDUCTOR CIRCUIT
�−YL�W� 5
/
Y;
L
KVL: 5L%XW Y5LGW
LG/Y ;LL =+=
9�
Y�W�
WW �
�L���JLYHQ�IRU W62/1YGW
YG
5
/Y ;
;L =>+=
L
W
5
9�
5
/
�H��5
9L 5�/
W�
−−=
�W
�9
5
/
;Y
�
�H��9Y 5�/W
�;
−−=
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• Write a node equation or loop equation• Substitute the general solution
into the node/loop equation to obtain the A/B/τ unknowns.• Use the initial condition of circuit (and rule 1/2) to obtain the third equation.• Thus, you have 3 equations and 3 unknowns
RC Circuits (continue)
τW
RXW%H$WY
−+=��
Steps to find the step-input response of a first order circuit:
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Open/Close switch in FOC• Typically these switches are not mechanical switch asshown, but electronic switch (e.g. transistor).
In the circuit above, the switch is closed for all time t<0 (left)and open t > 0 (right circuit). What is vout(t) at t < 0 and t > 0?
t<0, (steady state)from rule 4, vout(t) =0 ⇒iL=V0/R1 (why?)
From rule 2 (current can not change inst.): iL(0-)=iL(0+) = V0/R1
When t>0, the voltage source is dropped (see ckt in the right)
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Open/Close switch in FOC (continue)
• When t>0, the voltage source is dropped• From L circuit equation: • From KVL:
GW
GL/WY
/
RXW=��
/
RXWL
5
Y −=�
(-ve because current thru the resistor is opposite of iL.)substitute the second eq. to the first.
�� �
=+5/
Y
GW
GYRXWRXW
substitute the general first order solution into this eq.τW
RXW%H$WY
−+=��
���� ��� 5/W
RXW%HWY
−=
B can be found by setting vout(0+) = - iLR2 (from eq. @) = - V0R2/R1
(@)
iL=V0/R1 (from the previous page)
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Open/Close switch in FOC (continue)
����
�
�� ��� 5/W
RXWH
5
95WY
−−=
���� ��� 5/W
RXW%HWY
−= iL=V0/R1 vout(0+) = - iLR2
⇒
and and
The plot on the right show the output Vout.
∴Notice, it is possible to raise R2 to be very large, thus, vout could be very large proportionally. In automobile spark plug, 12v from the battery can be raised to thousand of volt using this technique.
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Response to a rectangular pulseWe learn to analyze first order circuit response to stepinput. What about rectangular pulse? (digital signal is morelike rectangular pulse than step function!)
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Response to a rectangular pulse (continue)
It is possible to break the rectangular pulse into 2 step functions as below:
The rectangular function = step function (v1) + delayed step function (v2) with a negative coeff.
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Response to a rectangular pulse (continue)
• The circuit on the right wasexcited by a rectangular functionVin(t). The Vout is shown in theplot below.
Vout,1 is response to V1(previous slide)Vout,2 is response to V2
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Response to a rectangular pulse (continue)
3 regions: t<0, 0<t<T, T<t, where T is the delay between v1 and v2.
Effect of τ (RC),the time constant?
Notice in LR circuit, τ is L/R
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DIGITAL CIRCUIT EXAMPLE(Memory cell is read like this in DRAM)
For simplicity, let CC = CB.If VC = V0, t < 0.
Find VC(t), i(t), energydissipated in R.
�W =
&9 && %&
5
�
−
initiallyuncharged
�&&IRU4RILRQ�FRQVHUYDW9�
���99���9
%&�&�&==∞=+
%&
&
%&
%& &&LI�
&5�
&&
&&5�´ ==
+=
W�τ
0
0.2
0.4
0.6
0.8
1
0 1 2 3 4 5
VC
/ V0
0
0.2
0.4
0.6
0.8
1
0 1 2 3 4 5
curr
ent (
fract
ion
of V
o/R
)
W�τ ��
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Summary• Transient response is the behavior of a circuit in response to a changein input. The transient response dies away in time. What is left afterthe transient has died away is steady state response.• Voltage across a capacitor can NOT change suddenly. The current thruan inductor can not change suddenly.• In dc steady state, the current thru a capacitor and the voltage across ainductor must be zero.• For first order circuits, transient voltages and currents are of the form
A + B e -t/τ, τ is the time constant. A and t are found by substituting theA + B e -t/τ into the circuit equation (node/loop equations). The B is foundfrom the initial condition.• The response to a rectangular pulse is the sum of response to positive andnegative going step inputs. The form of the output pulse depends on whether the duration of the input pulse (T) is long or short compared with the time constant τ.
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The RC Circuit to Study
• R represents total resistance (wire plus whatever drives theinput node)
Input node Output node
ground
R
C
• C represents the total capacitance from node to the outside world (from devices, nearby wires, ground etc)
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time
Vin
0
V1
RC RESPONSE
• Vout cannot “jump” like Vin. Why not?
Input node Output node
ground
R
C
Case 1 – Capacitor uncharged: Apply voltage step
) Because an instantaneous change in a capacitor voltage wouldrequire instantaneous increase in energy stored (! CV²), that is,infinite power.
• Vout approaches its final value asymptotically,
) That is, Vout → V1 as t → ∞.
9RXW
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RC RESPONSE: Case 1 (cont.)
time
Vou
t
0
V1
time
Vou
t
00
V1
τ
Input node Output node
ground
R
C
time
Vin
00
V1
Exact form of Vout?Equation for Vout: Do you remembergeneral form?
�H��99 �W�RXW
τ−−=
"
([SRQHQWLDO�
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RC RESPONSE: Case 1 (cont.)
• What is τ?
time
Vin
0
V1
tim e
Vou
t
0
V 1
τ
– If C is bigger, it takes longer (τ↑).– If R is bigger, it takes longer (τ↑)."Thus, τ is proportional to RC.
) In fact, τ = RC !
# Thus, ��� �
�
5&W
RXWH99
−−=
�H��99 �W
�RXW
τ−−=
9LQ
5
9RXW
&L&
L5
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RC RESPONSE: Case 1 (cont.)�H��99WKDW3URRI 5&�W
�RXW
−−=
9LQ
5
9RXW
&L&
L5
ODZ�FH�FDSDFLWDQL
ODZ�V�2KP
&
GW
G9&
5
99L
RXW
RXWLQ
5
=
−=
�LL%XW&5
=
�99�5&
�
GW
G9
GW
G9&
5
997KXV�
RXWLQ
RXW
RXWRXWLQ
−=
=−
RU
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RC RESPONSE Case 1 (cont.)�5&�WH��
�9
RXW9WKDW3URRI −−=
+==
==
�WDW�RXW
9DQG
FRQVWDQW�
9LQ
9%XW
I claim that the solution to thisfirst-order linear differentialequation is:
�5&�WH���
9RXW
9 −−=
We have: )out
Vin
(VRC1
dtout
dV−= Proof by substitution:
and
2.�WDW�9RXW
+==
�������
���5&�
9��
���
5&WH995&
5&WH
RXW9
LQ9
5&GW
RXWG9
−−−=−
↓
−=
�� � �
?
?
5&WH5&
95&WH ���
5&�
9 −=−FOHDUO\
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RC RESPONSE (cont.)
*HQHUDOL]DWLRQ
Vin switches at t = 0; then for any time interval t > 0, in which Vin is aconstant, Vout is always of the form: 5&�W
RXW%H$9
−+=
We determine A and B from the initial voltage on C, and thevalue of Vin. Assume Vin “switches” at t=0 from Vco to V1:
YROWDJHLQLWLDO99�WDW)LUVW�&R&
≡=) Thus,
&R9%$ =+
�&99�WDV →∞→
) Thus,�&R
99% −=⇒�
9$ =
9LQ
5
9RXW
&L&
L5
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ExamplesLQ
5
RXW
&�
−9�
W �
VHF����5& =
9�&R9 =
0
2
4
6
8
10
12
0 0.01 0.02 0.03 0.04 0.05
tim e (sec)
Vo
ut A= 10
B= -10
0
2
4
6
8
10
12
0 0.01 0.02 0.03 0.04 0
time (sec)
Vou
t
A= 10B= -5
0
2
4
6
8
10
12
0 0.01 0.02 0.03 0.04 0
time (sec)
Vou
t
A=0B=0
0
2
4
6
8
10
12
0 0.01 0.02 0.03 0.04 0.05
time (sec)
Vou
t
A=0B=5��9 =
���9 =
�&R9 =
5&�W
RXW%H$9
−+=
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HOW TO AVOID ALL MATH!① Sketch waveform (starts at Vco, ends asymptotically at V1, initial
slope intersects at t = RC)② Write equation: 2a. constant term A = limit of V as t → ∞
2b. pre-exponent B = initial value − constant term
LQ
5
RXW
9&R
�
�
−�
5& �� �¤
&
LQ
5
RXW
9&R ��
�
−�
5& ���µVHF
&
W �
-6
-5
-4
-3
-2
-1
0
0 1 2 3 4
time (msec)
Vou
t ��������� WH
RXW9
−−−=
����W
H��RXW
9
−−+=
0123456789
10
0 0.1 0.2 0.3 0.4 0.5
t in microseconds
Vo
ut
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0
1
2
3
4
5
6
0 2 4 6 8
time (microseconds)
Vou
t
LQ
5
RXW
9&R
�9
5& �µ VHF &
W �µVHF
COMPLICATION: Event Happens at t ≠ 0(Solution: Shift reference time to time of event)
Example: switch closes at 1µsec
����
�����
�−×
−−−
=
W
H9
We shift the time axis here by one microsecond, i.e.
imagine a new time coordinate t* = t-1µsec so that
in the new time domain, the event happens at t* = 0
and our standard solution applies. Of course we
replace t* by t -1µsec in the equations and plots. Thus
instead of t* =0 we have t = 1µsec, etc.
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0
1
2
3
4
5
6
0 2 4 6 8 10
tim e (m icroseconds)
Vou
t
2.5 4.5
W ��� �� �¤×
5
9RXW
9&R
�
�
−�9
5& �µVHF &
W �� �¤
COMPLICATION: Event Happens at t ≠ 0(Solution: Shift reference time to time of event)
Example: Switch rises at t = 1µsec,falls at t = 2.5µsec
Thus at t = 2.5µsec, rising voltage reaches
9���@H�>� ����
���������
=− −×−×−−
����
����W�
H�>�9 −×
−−−−=
Solution: during the first rise V obeys:
Now starting at 2.5msec we are
discharging the capacitor so the
form is a falling exponential with
initial value 2.6 V:
����
��������
��� −
−×−−=
[
W
H9
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FINAL EXAMPLE
Your photo flash charges a 1000µF capacitor from a 50V sourcethrough a 2K resistor. If the capacitor is initially uncharged, how longmust you wait for it to reach 95% charged (47.5 V)?
VHF�[W =
0
10
20
30
40
50
0 2 4 6 8 10
time in seconds
Vou
t
V=47.5 a t t = ??
9RXW
9&R
�9
�
−��9 �� �¤ )
�.
By inspection: VR�������W
RH9
−−=
�H��������� �
W�
[
⇒= ���
������� ⇒−=
− [W
H
Solution: VHF���.�5&� =×= −
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Digital Building Blocks
• Logical 1 ≡ 5V • Logical 0 ≡ 0V
(negative logic)
• Logical 1 ≡ 0V • Logical 0 ≡ 5V
There can be different voltage value for different digital circuit device.Logical 1 ≡ 3.3V orLogical 1 ≡ 2V
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So Why Digital?
�For example, why CDROM audio vs vinyl recordings?)
• Digital signals can be transmitted, received, amplified, and re-transmitted with no degradation.
• Binary numbers are a natural method of expressing logical variables.
• Complex logical functions are easily expressed as binary functions(e.g., in control applications … see next page).
• Digital signals are easy to manipulate (as we shall see).
• With digital representation, we can achieve arbitrary levels of “dynamicrange,” that is, the ratio of the largest possible signal to the smallestthan can be distinguished above the background noise
• Digital information is easily and inexpensively stored (in RAM, ROM,EPROM, etc.), again with arbitrary accuracy.
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Digital Blocks
• 2 Types of Digital Blocks– Combination logic blocks (e.g. AND gate) chapter 11.2– Sequential blocks (e.g. Flips Flops) chapter 11.3
• Logic blocks have one/several inputs and one output
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Digital Control Example: Hot Tub Controller
Algorithm: Turn on tub heater if Temp less than desired Temp (T < Tset)and motor is on and key switch to activate hot tub is closed. Supposethere is also a “test switch” which temporarily activates heater whendepressed.
Approach: Series switches : C = key switch, B = relay closed if motor is on,A = bimetallic thermostatic switch. T = Test switch.
Simple Schematic Diagram of Possible Circuit:
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& % $
7
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� �
� �
� �
� �
� �
� �
� �
� �
Evaluation of Logical Expressions with “Truth Tables”
$ % & 7 +
� � � � �
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Truth Table for Heater Algorithm
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Logical Expressions to express Truth Tables
We need a notation for logic expressions.
Standard logic notation and logic gates:
AND: “dot”
OR : “+ sign”
NOT: “bar over symbol for complement” Example: Z = A
With these basic operations we can construct any logicalexpression.
Examples: X = A · B ; Y = A · B · C
Examples: W = A+B ; Z = A+B+C
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Digital Heater Control Example (cont.)
• Logical Statement: H = 1 if A and B and C are 1 or T is 1.
• Remember we use “dot” to designate logical “and” and “+” to designatelogical “or” in switching algebra. So how can we express this as aBoolean Expression?
Logical Expression : To create logical values we will define a closedswitch as “True”, ie boolean 1 (and thus an open switch as 0).
Heater is on (H=1) if (A and B and C are 1) or T is 1
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The Important Logical Functions
The most frequent (i.e. important) logical functions areimplemented as electronic “building blocks” or “gates”.
We already know about AND , OR and NOT What are someothers:
Combination of above: inverted AND = NAND,inverted OR = NOR
And one other basic function is often used: the “EXCLUSIVE OR”… which logically is “or except not and”
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Some Important Logical Functions
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GLIIHU�%$�ZKHQ��RQO\%$
⋅+⊕
H[FHSW
&�%$�RU%$ ⋅⋅⋅
��%$ZKHQ�O\Q�R%$ ==+
LQYHUWHG$RU$RWQ$ −=
��DQGZKHQ�O\�R$% =%$Q
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Logic Gates
These are circuits that accomplish a given logic function such as “OR”. We willshortly see how such circuits are constructed. Each of the basic logic gates has aunique symbol, and there are several additional logic gates that are regarded asimportant enough to have their own symbol. The full set is: AND, OR, NOT,NAND, NOR, and EXCLUSIVE OR.
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125
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%& $�%
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The basic gates in Digital Electronics
2 input OR gate. 3 input OR gate
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The basic gates in Digital Electronics
• 3 input AND gate •3 input NAND (NOT-AND) gate
•NOT/INVERSE/COMPLEMENT
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The basic gates in Digital Electronics
• NOR (NOT-OR)
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The basic gates in Digital Electronics
• F = A + B A OR B
• F = A • B A AND B• NOT (A OR B) alternative notation: (A+B)’
• NOT (A AND B) (A • B)’ %$) +=%$) •=
�� %$$) +=Given+ draw the logic blocks+ write the truth table
• 3 inputs: NOT A, A, B•F1 = (NOT A) OR B•F = A AND F1
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Logic Synthesis
• So far, when given a logic blocks → generate the truth table
Can we reverse the process? Logic synthesis
• We need a certain truth table → Find the logic blocks to implement it• For example, a 2 inputs (A, B) and 1 output (F)
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Logic Synthesis
• Next, we can combine these blocks AB, AB’, A’B, (AB)’ through an “OR” gate → AB + AB’…• This is called the Sum-of-products method• Example F = A’B + AB can be implemented by the following:
• On the other hand, F = A’B + AB can be simplified into F = (A’ + A) B = (1) B = B
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Logic Synthesis (example)
• Use logic blocks to perform binary arithmetic (half adder):• 2 binary inputs A and B, the result is 2 bits CD
A+ B------------- C D
The truth table is: Input OutputA B C D0 0 0 00 1 0 11 0 0 11 1 1 0
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Logic Synthesis (example)
• Using Sum-of-product method:• We only tackle the C and D with a “one” in the truth table:
– for output D = 1 (second row in the table), A = 0, B = 1 → F1 = A’B
– for output D = 1 (third row in the table), A = 1, B = 0 → F2 = AB’
– for output C to be equal to 1, A=1, B=1 → F3 = AB
• These 3 entries can be “realized” by the following:
AB
AB
AB
AB
AB
D
D
CC
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Practical logic blocks
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Practical logic blocks: Electrical Characteristics
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Flips Flops (Sequential Blocks)
• Output of logic blocks depend on input at any instant*• Output of sequential blocks depend on the previous input as well as the current input (in other word, it has “memory”effect)
3 types of Flips Flops: S-R Flip Flops, D Flip Flops, J-K Flip Flops
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S-R Flips Flops• Rule 1
– If S=0 and R=0, Q does not change.• Rule 2
– If S=0 and R=1, then regardless of past history Q=0
• Rule 3– If S=1 and R=0, then regardless of past history Q=1
• Rule 4– If S=1 and R=1 is a meaningless instruction, which should not be used.
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Realization of S-R Flips Flops
• Truth Table
•Why do we need to guess Q and Q’? The reason is that FF needs morethan the current inputs, different current state of Q and Q’ will generate different Q, Q’ output. And we don’t know what is the current Q and Q’, sowe can guess it in conjunction with the inputs to generate a truth table.•S = 0 and R = 0 → no change in Q and Q’•S = 1 → Q = 1, Q’ = 0•R = 1 → Q = 0, Q’ = 1•S = 1 and R = 1 → Q = 1, Q’ = 1 (don’t use)
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S-R Flips Flops (example)
• S = 0 and R = 0 → no change in Q and Q’• S = 1 → Q = 1, Q’ = 0• R = 1 → Q = 0, Q’ = 1• S = 1 and R = 1 → Q = 1, Q’ = 1 (don’t use)
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D Flips Flops
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•Truth Table of D Flip Flops
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D Flips Flops (example & realization)
D Flip Flops realized using 6 NAND gates
16M RAM contains16×1024 ×1024 flip flops
Propagation delay - a smalldelay between the change CLK and the time Q actually changed. (this is not shown in the timing diagram)
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