•TMS470M Cost Effective Safety MCUs for Transportation Cortex™ M3 – 32bit ARM™

Presenters:•Justin Hua, TI China Field Applications Engineering•Haixiao Weng, TI Auto MCU Applications Engineering•Chuck Davenport, TI Auto MCU Applications Engineering•Brian Fortman, TI Auto MCU Marketing

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TMS470M Workshop Day-1 Agenda• Introduction and Roadmap• Development Tools: Hardware kits, Software tools• Safety Overview and Modules

– Lab 1:TMS470M Safety MCU Demos• TMS470M Architecture: Memory Map, Clocking, Exceptions• Embedded Flash Memory tools: nowECC, nowFlash, Application Programmer

Interface (API)• Real Time Interrupt (RTI)• Vectored Interrupt Manager (M3VIM)• General-purpose I/O (GIO)• Programmable Timer Unit (HET)

– Lab 2: Using HET as GIO• Multi-Buffered Serial Peripheral Interface (MibSPI)• Controller Area Network (DCAN)• Local Interconnect Network (LIN) / Serial Communication Interface (SCI)

– Lab 3: PC to SCI Communication• Multi-buffered Analog-to-Digital Converter (MibADC)• Support Structure: Web, Forum, WIKI

ARM Cortex Advanced ProcessorsArchitectural innovation, compatibility across diverse application spectrum

•ARM Cortex-A family:– Applications processors for feature-

rich OS and 3rd party applications

•ARM Cortex-R family:– Embedded processors for real-time

signal processing, control applications

•ARM Cortex-M family:– Microcontroller-oriented processors

for MCU, ASSP, and SoC applications

Cortex-R4(F)

Cortex-A8

SC300™

Cortex-M1Cortex™-M3

...2GHz

x1-4

Cortex-A9

x1-4

Cortex-A5

12k gates...Cortex-M0

Cortex-M4

•ARM® Cortex™•Embedded Processing Cores at Texas Instruments

• Proven processors cores with ongoing architectural innovation that simplifies the ease of use

•ARM Cortex-A family:

•ARM Cortex-M family•ARM Cortex-R family

•ARM•PRocessor

• High-performance, low power core • Multimedia, DSP acceleration• Mobile computing capabilities• Internet-enabled

• Real-time control• High-reliability• Built in redundancies• Safety-focused • Commitment to enhancing performance

and increasing memory footprint• System coherency

•ARM Processor

Family • Active/sleep power efficiency• Efficient gate counts for better price/performance• Optimized price/performance

• Interactive media and graphics experience

• Neon optimization• Full-featured OS support (Linux,

WinCE, etc…)

•Hercules• TMS570• RM5xx

•Hercules• TMS570• RM5xx

•Sitara• AMxx•Sitara• AMxx

•Stellaris®• LMxx

•Stellaris®• LMxx

• TMS470M for Transportation • TMS470M for Transportation

•5

•TMS470 – also good fit for Transportation & Safety

Automotive Safety Systems

Avionics

Railway

• High performance real time control using model based development flows

• Performance in harsh environments• Safety sensitive and high reliability• And…

• Scalability• System cost constraints• Software re-use and portability

•Ideal for applications requiring• Cost-Effective 32-bit ARM® Cortex™

- M3 –- TMS570 compatible • Developed specifically for safety

critical systems • Extends TMSx70 configurations

down to 320 KB flash . • Support for fast engineering ramp

and time to market.

•What’s new

What is TMS470M? Cost Effective ARM 32 – bit MCUs for Transportation

Offroad Vehicles

Hybrid &Electric Vehicles

Cortex-M3 – The New MCU Standard• An ARM7TDMI-S for the 21st century

– For extreme cost and power-sensitive complex applications– Comparable or better FMAX and gate count with r2p0 min config– 30% more DMIPS, 28% more geomean EEMBC– 85% more DMIPS per mW

• State-of-the-art functionality– Code everything in C– Thumb-2 ISA → 6X code density, 10X perf. v 8051– Integrated Nested Vectored Interrupt Controller

(NVIC) with lowest interrupt latency of any ARM– Configurable/optional memory protection, debug, trace– uA device stand-by enabled with integrated sleep modes,

ULL libraries, state retention

• Broad adoption within microcontroller and embedded SoC markets

High Performance ARM Cortex-M3 CPU

•Up to 80 MHz with roadmap to 200+

• 3 stage pipeline delivers

1.25 DMIPS/MHz•8 region memory protection

• > 96 DMIPS and roadmap to > 330• Superior Code Density• ARM-based: broad industry adoption

• > 96 DMIPS and roadmap to > 330• Superior Code Density• ARM-based: broad industry adoption

•ARM v7M Cortex® ISA •Upward compatible to

Cortex-R4F/TMS570

•Superior performance / code density

•Thumb-2 instructionsARM®

Cortex™- M3•80MHz

TMS470M Safety Features• Developed for safety applications• Reduces code size and complexity

• Developed for safety applications• Reduces code size and complexity

•ECC for flash / RAM •(SECDED)

•Parity on all Peripheral SRAMS

•Memory BIST on all RAMS allows fast

memory test at startup

•CPU Self Test Controller requires little S/W overhead

•CRC, Calibration, ADC Self Test, …

•Error Signaling Module w/ External

Error Pin•On-Chip Clock

Monitoring

•CPU Self Test

•TMS470M

•VREG•OSC PLL

•MBIST

•LBIST •RTI

•CRC

•Vectored Interrupt Management•Enhanced System Bus

•Memory

•Up to 640KB• Flash

•w/ ECC

•Up to 64 KB •RAM w/ ECC

•Power, Clock, & Safety

•Debug / Trace

•Memory Protection•JTAG Debug

•ARM®

Cortex™M3•80MHz

•Timers / IO•MibSPI1

•64 Buffers; 8 CS

•Serial I/F •Network I/F•CAN1 (16mb)

•ADC

•MibADC•64 Buffers

•10-bit, 16ch•CAN2 (32mb)

•UART1 (LIN1)

•High End Timer•(HET)

•64 words, 26 ch•MibSPI2•64 Buffers; 4 CS

•GIOA/INTA (8)•UART2 (LIN2)

•Embedded Trace

•SPI3 (4 CS)

Hercules TMSx70 Family Roadmap

Broad and Scalable for Transportation Applications

•Samples available   NOW

2011

2012

•Sampling

•Development

•Concept

•LS2x Series•LS2x Series• option

•LS3x Series•LS3x Series

•MC4x Series•MC4x Series

• Lower Cost Roadmap

•Lockstep or Multicore

Dual R4F•over 225MHz on R4•up to 4MB Flash; 512kB RAM•TMS 3Q13

•Perform

ance / M

emory / Features

•EMAC option

• option

•EMAC option

• option

•Lockstep dual R4F•up to 160MHz/250 DMIPS •up to 2MB Flash; 160kB RAM•TMS 4Q10

•Lockstep dual R4F•up to 180MHz/ •up to 3MB Flash; 256kB RAM•TMS 3Q12

•LS1x Series•LS1x Series• option

•TMS470M•TMS470M

•up to 80MHz/96 DMIPS •up to 640 kB

Flash; up to 128KB E2emu•up to 64kB RAM•80QFP (100 coming) •TMS 4Q10

TMS470M ARM® Cortex™‐M3 Family Lineup

Cost Effective Safety MCU for Transportation Applications

•Sampling

•Development

•Concept

•Perform

ance / M

emory / Features

•memory •428kB •640kB•320kB

•Features• Scalable Flash w/ ECC• Scalable RAM w/ ECC• EEPROM emulation capable• Single 3.3v Supply Voltage• High End Timer Co-Processor• 16ch, 10-bit ADC • Up to 2x Multi-Buffered SPI• 2x CAN Interfaces + 2x UART/LIN• -40c to 125c • AECQ100 Qualified• Sampling Now

•TMS470MF031•TMS470MF031

•48 MHz to 80MHz•320kB Flash or•256KB+64KB E2emu•16kB RAM•80 or 100 QFP  •TMS 2Q11

•TMS470MF042•TMS470MF042

•up to 80MHz/96 DMIPS •428KB Flash or•384KB+64KB E2emu•32kB RAM•100 QFP •TMS 2Q11

•TMS470MF066•TMS470MF066

•up to 80MHz/96 DMIPS •640KB Flash or•512KB+128KB E2emu•64kB RAM•100 or 144 QFP •TMS 4Q10

TMS470M Family Configurations

Device Speed FlashEEPROM

Or Flash*

RAM CAN MibSPI(CS) SPI UART

(LIN)HET (ch)

MibADC 10-b(ch) GIO Voltage Package Temp Q100

TMS470MF03106 48MHz 256kB 64kB 16kB 1 1 (8) 2(2) 11 14 8 3.3V 80QFP -40..+125C Yes

TMS470MF03107 80MHz 256kB 64kB 16kB 2 2 (12) 2(2) 16 16 4 3.3V 100QFP -40..+125C Yes

TMS470MF04207 80MHz 384kB 64kB 24kB 2 2 (12) 2(2) 16 16 4 3.3V 100QFP -40..+125C Yes

TMS470MF06607 80MHz 512KB 128kB 64kB 2 2 (12) 2(2) 16 16 4 3.3V 100QFP -40..+125C Yes

TMS470MF06608 80MHz 512KB 128kB 64kB 2 2 (12) 1 2(2) 26 16 8 3.3V 144QFP -40..+125C Yes

•Please note that the 100pin packages are pin compatible across the family.

•* EEPROM Flash bank can also be used as normal Flash program memory

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TMS470M Block Diagram TI Automotive Qualified ARM Cortex-M3 MCU

Packages: LQFP: 80pin, 100 pin, 144pin -40 to 125 C Temperature Range

•Sampling Now•Production 4Q10

Targeted Automotive Applications

Airbag

Braking – ABS / ESP

General Infrastructure Micro (ADAS, Chassis)

Performance / Memory• Up to 80 MHz ARM Cortex-M3• Up to 640KB Flash (128KB can be used as EEPROM)• Up to 64KB Data SRAMROM Emulation Capability• Features• Safety

• CPU Self Test Controller• Flash & RAM w/ ECC • Memory Built-in Self Test • Cyclic redundancy checker module (CRC)

• Reliability• Low PPM Production Flow Support • Extended Temp and AEC-Q100 Qualification

• On-chip VREG (only 3.3v required)• Enhanced I/O Control• High End Timer Coprocessor (HET)

• Up to 26ch (144QFP); 16ch (100QFP) • All pins can be used as PWM or Input Capture • Hardware Encoders & Time Stamping

• 10-bit MibADC (16 channels)• Continuous Conversion Channels• Buffered FIFO• Self Test on ADC

• Strong Communication Networks• 2 x CAN Interfaces • 2 Buffered SPI + 1 Standard SPI • 2 x LIN / UART (SCI)

HET: High End Timer Co-Processor•User Programmable

•64/128 word instruction RAM with Parity

•Conditional program execution based on pin

conditions and compares

•Up to 26 I/O pins for complex or typical

timing fns - capture, compare, PWM, GPIO

•Multiple 25-bit virtual counters for timers, event counters, and

angle counters

• Special Functions• SPI Emulation • TFT Display Timing

• Freq / Pulse Measurements

• Pulse and period measurement (same channel)

• Quadrature Decoding

• Timer/Counter Functions• Frequency Modulated Output • Pulse width count • Time stamp • Event counter • Pulse accumulator• Multi-resolution scheme

• Pulse Width Modulation• Single, multi channel PWMs• PWM with duty cycle update• PWM with sync/async update• Phase shift PWM's• Symmetrical & asymmetrical

PWM with deadband

• Frees CPU MHz• Supports typical/complex functions• Simplified development environment

• Frees CPU MHz• Supports typical/complex functions• Simplified development environment

16 I/O Channels

Hostinterface

Address/Data Bus

TimerRAM

ExecutionUnit

Input/Output

Unit

Compare

25 bit ALU

Register A, B, T

Instruction Register

Address Register

Interrupt Control

Operation Control

Program RAM Control RAM Data RAM

CPU wait control

Shadow registers Prescaler

Global & prescale control register

I/O ControlRegister

Synchronizers

22 High Resolution Channels

6 Standard Resolution Channels

TMS470M Development Tools

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•15

•05/08/08 •15

•Timer Co-Processor Development Tools

• Graphical Programming Environment• Output Simulation Tool• Generates CCS-ready software modules• Includes functional examples from TI

•Edit mode

•Internal Registers & Memory •Select pins for waveform

•Pins

•Clocks

•Instruction •drag and drop

•Example code palette

• Graphical Waveform Viewer• Input Generation Tool• Seamless interface to coding tool• Upgradable to Full SynaptiCAD

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Code Composer Studio v4.1

• Based on Eclipse industry standard for embedded debug tools

– Modern window environment– Advanced source code editor– Scalable multi-core/processor

environment– Program and Debug Application

via JTAG– Test Automation via Scripting

• Low cost tools enable developers to easily evaluate and start development

– Develop with CCS for <$100

• TMS470M Debug Features– 6 Hardware Breakpoints– Unlimited Software Breakpoints– Integrated Flash Programming

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Code Composer Studio Components: Fully Integrated, Easy to Use Development Tools

Memory Window

Watch Window

Disassembly Window

Target Connection

Source & object files

File dependencies

Compiler, assembler & linker build options

Menus or Icons

Help

CPU Window

Source Code View

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Features• User Input on High Abstraction Level

– Graphical-based code generation– Easy configuration– Quick start for new projects

• Generates C Source Code – ANSI Conforming– Clear, structured, coding style– Customizable code for user

maintenance• Supported Peripherals

– System Module– RTI– GIO– SCI/LIN– CAN– SPI– ADC– Timer Co-processor (nHET)

• Interactive Help System– Describes tool features and

functions – Provides detailed dependency

graphs– Provides useful example code– Tool tip help available

• Hierarchical project code viewing

HalCoGen: Hardware Abstraction Layer Code Generator

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TMS470M Tools

External Tools:• IDE’s

• Lauterbach, iSystems, CCS• Compiler

• ARM, CCS• Emulator

• Spectrum Digital, Lauterbach, iSystems, Blackhawk, Signum Systems, XDS100, XDS560 …

• Operating System• ETAS

• CAN• Vector

• Trace / Calibration• Lauterbach, iSystems

• Production Flash Programming• BP Microsystems, Data-IO

• TMDX470MSF066USB ($79) – Low Cost TMS470M Evaluation Kit• USB Powered• On Board USB XDS100v2 JTAG Debug • On Board SCI to PC Serial Communication• Access to Select Signal Pin Test Points• LEDs, Temp Sensor, Light Sensor and CAN transceiver• QFP Packaged CPU

• Software Included in Each:• CCStudio v4.1 IDE

– Includes C/C++ Compiler/Linker/Debugger• Flash programming integrated into CCS• HET GUI/Simulator/Assembler• Demo Project/Code Examples

•20

TMS470M Development and Evaluation Kits

TMS470M RTM Development Support Collateral Documentation• Data Sheets ‘MF066 Preview Available• Technical Reference Manual (TMS470M Series) Available• Errata Sheet Available• Application Notes (4 Available) Available

Hardware/Kits• TMS470M USB Development Stick Kit Production: 30-Sep-2010• TMS470M ABS Reference Design 4Q10

Virtual Support Network• TMS470M Safety MCU Forum Available• TMS470M Safety MCU Wiki Available

Software/Tools• nowFlash & CCS Config (Add M3 Support – Config file Rev1) Available• nowECC Available• HET Assembler Available• HET IDE Available• F035 FMzPLL Calculator Available• Demo Software, source code examples 30-Sep-2010• CCSv4 Device XML Files (Pre-rls 4.2) Available• CCSv4 Flash Programming Support (CCS 4.2) 4Q10• HALCoGen – Driver and Init code generator 1Q11

•TI Confidential – NDA Restrictions •21

TI Suggested ABS System

•ABS IC•TPIC7218

•ABS•MCU

•TMS470M/570

•ABS•MCU

•TMS470M/570•Chassis•CAN Bus

•Wheel•Speed•Sensor x4

•Power Management Module

•Battery

•Warning•Lamp

•LS Switch Driver

•LS Switch Driver•x4

•LS Switch Driver•PWM

•LS Switch Driver•PWM x4

•Lamp Driver

•Lamp Driver•x2

•Pump Motor Driver

•Main Relay Driver

M

•Solenoi d

•Solenoi d

•Diagnostic Systems•ISO K-Line

•CAN•Transceiver

•CAN•Transceiver

•Wheel Speed•Sensor

•Interface

•Wheel Speed•Sensor

•Interface

•K-Line•K-Line

•Watchdog•Monitor

•Watchdog•Monitor

•SPI•SPI

•Charge Pump•Charge Pump•Wake up

•Supervisor•Supervisor •Buck/LDO•Buck/LDO

TMS470M Safety Features

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25

STC STC DBISTCNTRL

CPU1

ROM

Clock controller

ESM

PCR

Test controller

CPU_nRESET

ERR

ROMinterface FSM

Clock cntrl

STC BYPASS/ATE Interface

REG Block&

CompareBlock

VBUSPinterface

• Provides High Diagnostic Coverage • Significantly Lowers S/W and Runtime Overhead • No SW BIST (Built In Self Test) Code overhead in Flash• Simple to configure and start BIST via register

CPU Self Test Controller (STC/LBIST)

26

Flash / RAM ECC Protection

Cortex-M3

Flash RAM

• ECC evaluated in the Memory Wrapper Logic– Single Bit Error Correction and Double Bit Error Detection

64 Data Bits

64b Inst.

ECC Logic

3 stage pipeline

64 Data

8 ECC Bits

ECC Logic

64 Data Bits8 ECC Bits

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Safety Aspects of Network Interfaces

• Networked peripherals (DCAN, and SCI/LIN) are considered grey-channel / black-channel communications

• In such communications application level protocols (time redundancy, CRC in data packet, etc.) are necessary

• When such assumption is made, the Dangerous Undetected Failure from the network is effectively not measurable (<0.001 Failure In Time (FIT))

• Detailed fault data available upon request

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Error Signaling Module (ESM)

INTEN INTLVL

Low-LevelInterrupt Handling

High-LevelInterrupt Handling

Errors for

Errors for

Low-Level

Interrupt

High-LevelInterrupt

From m

odules

To interrupt manager, M

3VIM

error _group1

error_group2

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TMS470M ESM Features

• ESM functions– Up to 64 error channels, divided into 2 different groups

• 32 channels with configurable output for interrupt and error behavior

• 32 channels with predefined output for interrupt and error behavior– Error forcing capability for self test

• ESM hardware– Hardware assistance for prioritizing error sources

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Additional Safety Features• On chip voltage regulator (VReg)

– Regulates core supply voltage (VCC) from digital I/O supply (VCCIOR)– Required operating range

• 3.0-3.6 V (nom=3.3 V) for VCCIOR• 1.4-1.7 V (nom=1.55 V) for VCC

• Clock monitoring– Oscillator monitor

• Detects failure if oscillator frequency exceeds defined min/max thresholds

• Selectable hardware response on oscillator fail– PLL slip detector

• Indicates PLL slip if phase lock is lost• Selectable hardware response on PLL slip• Internal backup ‘low power oscillator’ (LPO) clock source

– External clock prescaler• Allows external monitoring of CPU clock frequency

• CPU with dedicated Memory Protection Unit (MPU)

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Programmable Memory BIST (MBIST)

• All on-chip RAMS can be tested

• Run at startup

• Multiple Memory Test Algorithms

• Detects multiple failure modes

PBISTController

Data Logger

Extblock

Cfgblock

VBUS I/f

Tester I/fRAMData path/

CollarsTo / FromMemories(RAMgroups)

ROMblock

ROM I/f

Functional Read/Write Datapath

LAB1: TMS470M Safety Features Demo

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Lab1: TMS470M Safety MCU Demos